DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kawasaki et al. (US 2009/0002918 A1) in view of Satomi et al. (JP 2006-278557 A).
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Regarding claim 1, Kawasaki et al. disclose a multilayer ceramic capacitor comprising:
a multilayer body including a first principal surface (top or bottom) and a second principal surface (bottom or top) opposed to each other in a lamination direction (top-bottom), a first side surface (front) and a second side surface (back) opposed to each other in a width (front-back) direction that orthogonally or substantially orthogonally intersects the lamination direction, and a first end surface (left) and a second end surface (right) opposed to each other in a length direction (left-right) that orthogonally or substantially orthogonally intersects the lamination direction and the width direction; and
at least two outer electrodes (3, 4) on at least two surfaces of the multilayer body; wherein
a length of the multilayer body in the length direction is greater than a width of the multilayer body in the width direction [0011];
the multilayer body includes:
an inner-layer portion(22b-22k); and
two outer-layer portions (22a and ceramic and 22l and ceramic) between which the inner-layer portion is interposed in the lamination direction (top-bottom);
the inner-layer portion includes:
a plurality of first dielectric layers (2) laminated in the lamination direction; and
a first inner electrode (any 22b-22k) between two of the plurality of first dielectric layers (2) and exposed at at least one of the first end surface (left) and the second end surface (right);
each outer-layer portion (22a and ceramic; 22l and ceramic) includes:
at least one second dielectric layer (upper / lower ceramic layer); and
a second inner electrode (22a, 22l) in contact with the at least one second dielectric layer (upper / lower ceramic layer) and exposed at at least one of the first end surface (left) and the second end surface (right);
a length of the second inner electrode (22a, 22l) in the length direction (left-right) is less than a length of the first inner electrode in the length direction (see annotated figure 6 above).
Kawasaki et al. disclose the claimed invention except for each outer-layer portion is divided into two equal regions in the lamination direction, a porosity of a region near the inner-layer portion is less than a porosity of a region farther from the inner-layer portion.
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Satomi et al. disclose when each outer-layer portion is divided into two equal regions (41, 42) in a lamination direction, a porosity of a region near an inner-layer portion (42) is less than a porosity of a region (41) farther from the inner-layer portion.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the multilayer ceramic capacitor of Kawasaki et al. so that when each outer-layer portion is divided into two equal regions in the lamination direction, a porosity of a region near the inner-layer portion is less than a porosity of a region farther from the inner-layer portion, since such a modification would form a capacitor element having high resistance to distortion.
Regarding claim 2, Satomi et al. teaches when a first outer-layer portion (40) denotes one of the two outer-layer portions (40) that is closer to the first principal surface (bottom) and a second outer-layer portion (40) denotes one of the two outer-layer portion that is closer to the second principal surface (top), a height of the second outer-layer portion (40) in the lamination direction is greater than a height of the first outer-layer portion in the lamination direction.
Regarding claim 3, the modified Kawasaki et al. disclose a first outer-layer portion (40) denotes one of the two outer-layer portions that is closer to the first principal surface (top) and a second outer-layer portion denotes one of the two outer-layer portion that is closer to the second principal surface (bottom), the length of the second inner electrode (22a) in the first outer-layer portion in the length direction is greater than the length of the second inner electrode (22l) in the second outer-layer portion in the length direction.
Claim(s) 4-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kawasaki et al. (US 2009/0002918 A1) in view of Satomi et al. (JP 2006-278557 A) and Jitsuhara et al. (JP H09148174 A).
Regarding claim 4, Kawasaki et al. disclose a multilayer ceramic capacitor comprising:
a multilayer body including a first principal surface (top or bottom) and a second principal surface (bottom or top) opposed to each other in a lamination direction, a first side surface and a second side surface opposed to each other in a width direction that orthogonally or substantially orthogonally intersects the lamination direction (top-bottom), and a first end surface and a second end surface opposed to each other in a length direction that orthogonally or substantially orthogonally intersects the lamination direction and the width direction; and
the multilayer body includes: an inner-layer portion (22b-22k); and two outer-layer portions (22a, 22l) between which the inner-layer portion is interposed in the lamination direction (top-bottom);
the inner-layer portion includes:
a plurality of first dielectric layers (2) laminated in the lamination direction (top-bottom); and
a first inner electrode (22b) between two of the plurality of first dielectric layers (2) and exposed at at least one of the first end surface and the second end surface;
each outer-layer portion includes:
at least one second dielectric layer (top/bottom ceramic); and
a second inner electrode (22a, 22l) in contact with the at least one second dielectric layer and exposed at at least one of the first end surface (left) and the second end surface (right);
a length of the second inner electrode in the length direction is less than a length of the first inner electrode in the length direction (see annotated figure above).
Kawasaki et al. disclose the claimed invention except for:
A) when each outer-layer portion is divided into two equal regions in the lamination direction, a porosity of a region near the inner-layer portion is less than a porosity of a region farther from the inner-layer portion.
B) wherein a width of the multilayer body in the width direction is greater than a length of the multilayer body in the length direction.
A) Satomi et al. disclose when each outer-layer portion is divided into two equal regions (41, 42) in a lamination direction, a porosity of a region near an inner-layer portion (42) is less than a porosity of a region (41) farther from the inner-layer portion.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the multilayer ceramic capacitor of Kawasaki et al. so that when each outer-layer portion is divided into two equal regions in the lamination direction, a porosity of a region near the inner-layer portion is less than a porosity of a region farther from the inner-layer portion, since such a modification would form a capacitor element having high resistance to distortion.
B) Jitsuhara et al. disclose an improved multilayer ceramic capacitor [0001], wherein a width (L) of the multilayer body (10) in the width direction (L) is greater than a length (W) of the multilayer body in the length direction (W).
It would have been obvious to person of ordinary skill in the art before the effective filing date of the invention to modify the capacitor of Kawasaki et al. so that a width of the multilayer body (10) in the width direction is greater than a length of the multilayer body in the length direction, since such a modification would form a multilayer ceramic capacitor having low inductance and low impedance in a high frequency range.
Regarding claim 5, Satomi et al. teaches when a first outer-layer portion (40) denotes one of the two outer-layer portions (40) that is closer to the first principal surface (bottom) and a second outer-layer portion (40) denotes one of the two outer-layer portion that is closer to the second principal surface (top), a height of the second outer-layer portion (40) in the lamination direction is greater than a height of the first outer-layer portion in the lamination direction.
Regarding claim 6, the modified Kawasaki et al. disclose a first outer-layer portion (40) denotes one of the two outer-layer portions that is closer to the first principal surface (top) and a second outer-layer portion denotes one of the two outer-layer portion that is closer to the second principal surface (bottom), the length of the second inner electrode (22a) in the first outer-layer portion in the length direction is greater than the length of the second inner electrode (22l) in the second outer-layer portion in the length direction.
Claim(s) 4-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Satomi et al. (JP 2006-278557 A) in view of Kim et al. (US 2021/0065977) and Jitsuhara et al. (JP H09-148174A).
Regarding claim 4, Satomi et al. disclose a multilayer ceramic capacitor comprising:
a multilayer body (10) including a first principal surface (top or bottom) and a second principal surface (bottom or top) opposed to each other in a lamination direction (top-bottom), a first side surface (front) and a second side surface (back) opposed to each other in a width direction (front-back) that orthogonally or substantially orthogonally intersects the lamination direction (top-bottom),
and a first end surface (left) and a second end surface (right) opposed to each other in a length direction (left-right) that orthogonally or substantially orthogonally intersects the lamination direction (top-bottom) and the width direction (front-back); and
at least two outer electrodes (71, 72) on at least two surfaces of the multilayer body;
the multilayer body includes:
an inner-layer portion (20); and
two outer-layer portions (40, 40) between which the inner-layer portion (20) is interposed in the lamination direction (top-bottom);
the inner-layer portion (20) includes:
a plurality of first dielectric layers (30) laminated in the lamination direction; and
a first inner electrode (301, 302) between two of the plurality of first dielectric layers (30) and exposed at at least one of the first end surface (left) and the second end surface (right);
each outer-layer portion (40) includes:
at least one second dielectric layer (42); and
when each outer-layer portion is divided into two equal regions in the lamination direction, a porosity of a region near the inner-layer portion (41) is less than a porosity of a region farther from the inner-layer portion (42).
Satomi et al. disclose the claimed invention except for:
A) a second inner electrode in contact with the at least one second dielectric layer and exposed at at least one of the first end surface and the second end surface; a length of the second inner electrode in the length direction is less than a length of the first inner electrode in the length direction; and
B) wherein a width of the multilayer body (10) in the width direction is greater than a length of the multilayer body in the length direction.
A) Kim et al. disclose an improved multilayer ceramic capacitor comprising internal electrode (121, 122, 141, 142) wherein a second inner electrode (141 or 142) is in contact with at least one second dielectric layer (111) and exposed at at least one of a first end surface (left) and the second end surface (right); and a length of the second inner electrode (141, 142) in the length direction (x) is less than a length of a first inner electrode (121) in the length direction (x).
It would have been obvious to a person of ordinary skill in the ceramic capacitor art to modify the capacitor of Satomi et al. so that a second inner electrode in contact with the at least one second dielectric layer and exposed at at least one of the
first end surface and the second end surface; and a length of the second inner electrode in the length direction is less than a length of the first inner electrode in the length direction, since such a modification would form a multilayer ceramic capacitor having improved reliability and strength characteristics.
B) Jitsuhara et al. disclose an improved multilayer ceramic capacitor [0001], wherein a width (L) of the multilayer body (10) in the width direction (L) is greater than a length (W) of the multilayer body in the length direction (W).
It would have been obvious to person of ordinary skill in the art before the effective filing date of the invention to modify the capacitor of Satomi et al. so that a width of the multilayer body (10) in the width direction is greater than a length of the multilayer body in the length direction, since such a modification would form a multilayer ceramic capacitor having low inductance and low impedance in a high frequency range.
Regarding claim 5, Satomi et al. disclose when a first outer-layer portion (40) denotes one of the two outer-layer portions (40) that is closer to the first principal surface (bottom) and a second outer-layer portion (40) denotes one of the two outer-layer portion that is closer to the second principal surface (top), a height of the second outer-layer portion (40) in the lamination direction is greater than a height of the first outer-layer portion in the lamination direction.
Claim(s) 7-8, 10-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muramatsu (US 2020/0234887 A1) in view of Satomi et al. (JP 2006-278557 A).
Regarding claim 7, Muramatsu discloses a multilayer ceramic capacitor (title) comprising:
a multilayer body (12) including a first principal surface (12a) and a second principal surface (12b) opposed to each other in a lamination direction (T), a first side surface (12e) and a second side surface (12f) opposed to each other in a width direction (W) that orthogonally or substantially orthogonally intersects the lamination direction (T),
and a first end surface (12c) and a second end surface (12d) opposed to each other in a length direction (L) that orthogonally or substantially orthogonally intersects the lamination direction (T) and the width direction (W); and
four outer electrodes (14a, 14b, 15a, 15b) on corner region of the multilayer body (12); wherein
a ratio W/L which is a ratio of the width W to the length of the multilayer ceramic capacitor is about 0.85 or more and about 1.0 or less [0058];
the multilayer body includes:
an inner-layer portion (16b); and
two outer-layer portions (16a, 16a) between which the inner-layer portion (16b) is interposed in the lamination direction (T, x);
the inner-layer portion (16b) includes: a plurality of first dielectric layers (16) laminated in the lamination direction (T); and
a first inner electrode (18, 20b) between two of the plurality of first dielectric layers (16b) and exposed at at least one of the first end surface (12c) and the second end surface (12d);
each outer-layer portion (16a, 16a) includes: at least one second dielectric layer (16a); and
a second inner electrode (uppermost 20a) in contact with the at least one second dielectric layer (16, @16a) and exposed at at least one of the first end surface (12c) and the second end surface (12d);
“a length” of the second inner electrode (see annotated figure below) in the length direction (L) is less than “a length” of the first inner electrode (see annotated figure below) in the length direction (L);
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Muramatsu discloses when each outer-layer portion is divided into two equal regions in the lamination direction, a porosity of a region near the inner-layer portion is less than a porosity of a region farther from the inner-layer portion.
Satomi et al. discloses a multilayer ceramic capacitor comprising outer-layer portions (40, 40), when each outer-layer portion is divided into two equal regions (41, 42) in the lamination direction, a porosity of a region near the inner-layer portion (41) is less than a porosity of a region farther from the inner-layer portion (42) – [0012].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the multilayer ceramic capacitor of Muramatsu so that when each outer-layer portion is divided into two equal regions in the lamination direction, a porosity of a region near the inner-layer portion is less than a porosity of a region farther from the inner-layer portion, since such a modification would form a capacitor element having resistance to distortion.
Regarding claim 8, Satomi et al. teach when a first outer-layer portion (40) denotes one of the two outer-layer portions (40) that is closer to the first principal surface (bottom) and a second outer-layer portion (40) denotes one of the two outer-layer portion that is closer to the second principal surface (top), a height of the second outer-layer portion (40) in the lamination direction is greater than a height of the first outer-layer portion in the lamination direction.
Regarding claim 10, Muramatsu disclose “a width” of the second inner electrode (20b) in the width direction is less than “a width” of the first inner electrode (20a) in the width direction (similar to the annotate figure above).
Regarding claim 11, Muramatsu discloses the multilayer ceramic capacitor includes a first surface electrode (32).
Regarding claim 12, Muramatsu discloses the multilayer ceramic capacitor includes a second surface electrode (32).
Allowable Subject Matter
Claims 9, and 13-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art does not teach or suggest a multilayer ceramic capacitor:
when a first outer-layer portion denotes one of the two outer-layer portions that is closer to the first principal surface and a second outer-layer portion denotes one of the two outer-layer portion that is closer to the second principal surface, the length of the second inner electrode in the first outer-layer portion in the length direction is greater than the length of the second inner electrode in the second outer-layer portion in the length direction (claim 9);
the first surface electrode and the second internal electrode have a same or substantially a same shape (claim 13);
the second surface electrode and the second internal electrode have a same or substantially a same shape (claim 14);
the first surface electrode and the second internal electrode have a same or substantially a same size (claim 15); and
the second surface electrode and the second internal electrode have a same or substantially a same size (claim 16).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2010/0103586 – multilayer ceramic capacitor having terminal electrodes formed on two diagonal corners
US 2016/0240314 A1 – multilayer ceramic capacitor comprising terminal electrodes formed on 4 corners
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC THOMAS whose telephone number is (571)272-1985. The examiner can normally be reached Monday-Friday, 6:00 AM-2:30 PM.
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/ERIC W THOMAS/Primary Examiner, Art Unit 2847
ERIC THOMAS
Primary Examiner
Art Unit 2847
