DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1 – 10 are pending.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 – 3, and 9 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Fujita et al (US11245548) hereinafter Fujita.
As to claim 1, Fujita discloses A communication circuit, comprising: a master control chip (Fig. 1with master device 10); a first data bus transceiver having one end connected to the master control chip and the other end connected to a first external device (Fig. 1, and slave device 20a (with transceiver as illustrated in Fig. 4) coupled to master device via share bus 42A/ 41); a second data bus transceiver having one end connected to the master control chip and the other end connected to a second external device (Fig. 2 with second device 20b (comprising transceiver as illustrated in Fig. 4) coupled to master device 10 via 42b/41); and a switch circuit connected to the first data bus transceiver and the second data bus transceiver (Fig. 1 with branching unit 30a, COL. 2, lines 40 – 45).
As to claim 2, Fujita discloses the communication circuit, wherein the master control chip is connected to the switch circuit to control on/off of the switch circuit (Fig. 3, with transceiver 25 coupled to communicator 24, COL. 3, lines 45 – 55).
As to claim 3, Fujita discloses the communication circuit, wherein the first data bus transceiver is a first RS485 chip, and the second data bus transceiver is a second RS485 chip (Fig. 3 where transceivers are RS485, COL. 4, lines 5 – 10).
As to claim 9, Fujita discloses a communication system, comprising: a central controller (Fig. 1, and host 10); a slave control chip (Fig. 4 illustrates the detail innards of slave device 20a of Fig. 1, with module 24 of Fig. 4 is the controller); and the communication circuit, wherein a first data bus transceiver is connected to the central controller, and a second data bus transceiver is connected to the slave control chip (Fig. 1, and branching unit 30a, COL. 2, lines 50 – 62).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Fujita in view of Kielowski et al (US20230283320) hereinafter Kielkowski.
As to claim 10, Fujita disclose a system, comprising: a host (Fig. 1, and host 10, COL. 2, lines 40 – 45); a first external device(Fig. 1, and slave device 20a); and at least one second external device, wherein the host includes the communication circuit (Fig. 1, and branching unit , 30a), a first data bus transceiver is connected to the first external device, and a second data bus transceiver is connected to the at least one second external device (Fig. 1, with plurality of slave devices, 20a, and 20b, COL. 2, lines 20 – 60. Both devices comprise transceivers as illustrated in Fig. 3).
Fujita does not disclose an air condition system.
Kielkowski teaches in Fig. 1 of a HVAC system that is an air condition system, (para. 0021). One of ordinary skill in the art before the effective filing date of the claimed invention would install the communication system of Fujita into Kielkowski to repurpose the existing wiring of a system to enable data transmission, enabling smart systems, (para. 0002).
Allowable Subject Matter
Claims 4 – 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US12438357, US20210165443, and 20110208362 teaches the communication paths of a system with a switch to manage the communication options.
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/C.A.D/ Examiner, Art Unit 2184
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
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