Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/04/2025 & 03/19/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claims 8, 15 & 18 are objected to because of the following informalities:
Claim 8 is objected to because the recitation “the second end of the secondary transformer” contains an apparent terminology error identifying an end of the transformer rather than an end of its secondary winding. Correction is required. It is suggested that “the second end of the secondary transformer” be amended to read “the second end of the secondary winding”.
In addition, the recitation “the second terminal of the series resistor” contains an inconsistent designation of the resistor connection previously introduced as its opposing second end. Correction is required. It is suggested that “the second terminal of the series resistor” be amended to read “the second end of the series resistor”.
Claim 15 is objected to because the recitation “wherein the rectifier circuit comprises:” contains a grammatical mismatch in which a circuit is said to comprise the recited acts of rectifying and generating. Correction is required. It is suggested that “wherein the rectifier circuit comprises:” be amended to read “wherein operation of the rectifier circuit comprises:”.
Claim 18 is objected to because the recitation “obtain a samples” contains an incorrect singular article preceding a plural noun. Correction is required. It is suggested that “obtain a samples” be amended to read “obtain samples”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 10, 11 & 17-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 10 & 17, the claim recites the sampling operation determines an accuracy of the input voltage . It is unclear whether the sampling operation must determine the error or precision of an estimated input-voltage measurement, determine whether the input voltage conforms to a reference value, or merely determine the input-voltage amplitude with increased accuracy. These alternatives require different operations and establish different claim boundaries. The original specification paragraph [0053] describes averaging voltage samples and calculating the input-voltage amplitude, while paragraphs [0062] and [0063] describe avoiding stale capacitor measurements and increasing measurement accuracy by allowing more charging time. Those passages do not identify what quantity or assessment constitutes the claimed determination of an accuracy. Neither the claim nor the disclosure resolves whether amplitude estimation alone satisfies the limitation or whether a separate accuracy assessment is required.
For purposes of examination, the limitation the sampling operation determines an accuracy of the input voltage is interpreted as assessing the measurement accuracy of an input-voltage estimate obtained by sampling. This interpretation follows the discussion of measurement error and accuracy in paragraphs [0062] and [0063]. This interpretation is made solely to permit examination on the merits and does not resolve the indefiniteness.
Claims 11 & 18 depend from claims 10 & 17 and incorporates the sampling operation determines an accuracy of the input voltage . The data sampling, analyzing, discharge and charging phases do not identify the accuracy quantity or assessment to be determined. Analyzing the input voltage based on monitored-voltage samples does not resolve whether the claim requires estimating amplitude, evaluating measurement error or precision, or determining conformity to a reference value.
For purposes of examination, the limitation the sampling operation determines an accuracy of the input voltage is interpreted as assessing the measurement accuracy of an input-voltage estimate obtained by sampling. This interpretation follows the discussion of measurement error and accuracy in paragraphs [0062] and [0063]. This interpretation is made solely to permit examination on the merits and does not resolve the indefiniteness.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-7 & 12-15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Behjati et al., (US 2023/0216417 A1).
Regarding claim 1, Behjati et al. disclose a direct current voltage monitoring circuit as seen in Figs. 1-2 comprising: a switch mode power supply configured to provide an input voltage (see paragraph [0020], Figure 2, explaining that the DC input is applied to winding P by the flyback switching stage comprising switch 108a and its controller); a transformer including a primary winding in signal communication with the switch mode power supply (see paragraph [0020], Figure 2, explaining that transformer T includes primary winding P coupled to the controlled primary-side switching circuit); the transformer configured to store energy induced by a primary voltage applied across the transformer by the input voltage in response to the switch mode power supply operating in the “ON” state, and to release the energy as a secondary voltage to be used as an output voltage in response to the switch mode power supply operating in the “OFF” state (see paragraph [0023], Figure 2, explaining that closing the switch applies the primary voltage and stores energy in T, and opening the switch releases stored energy through secondary winding S to charge output capacitor C1); a rectifier circuit in signal communication with a secondary winding of the transformer, the rectifier circuit configured to generate a monitored voltage indicative of the input voltage in response to the switch mode power supply operating in the “ON” state, and to rectify the output voltage generated by the transformer in response to the switch mode power supply operating in the “OFF” state (see paragraph [0007], Figure 2, explaining that the secondary-coupled sensing branch establishes a voltage representative of the primary volta(Dge while the switch conducts and D1 is reverse biased, and D1 conducts when the switch opens to deliver stored energy to the output capacitor).
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Regarding claim 2, Behjati et al. disclose the switch mode power supply includes a flyback converter (see paragraph [0020], Figure 2, explaining that the switching supply is expressly a flyback converter circuit).
Regarding claim 3, Behjati et al. disclose the flyback converter comprises a first switch configured to continuously switch between an “ON” state and an “OFF” state at a switching frequency (see paragraph [0023], Figure 2, explaining that the controller repeatedly cycles switch 108a between closed and open states at a predetermined frequency).
Regarding claim 4, Behjati et al. disclose the transformer comprises: a primary winding configured to realize a primary voltage based on the input voltage (see paragraph [0020], Figure 2, explaining that DCin is applied through primary winding P and switch 108a, establishing primary winding voltage Vp); and a secondary winding configured to deliver the secondary voltage to the rectifier circuit (see paragraph [0023], Figure 2, explaining that secondary winding S provides its induced voltage to D1, which conducts during energy release and charges C1).
Regarding claim 5, Behjati et al. disclose the flyback converter is configured to apply the input voltage across the primary winding to induce the transformer to store energy when the first switch operates in the “ON” state and is configured to release the stored energy to apply the secondary voltage across the secondary winding when the first switch operates in the “OFF” state (see paragraph [0023], Figure 2, explaining that switch closure stores transformer energy and switch opening induces the secondary voltage and transfers the stored energy through the secondary winding).
Regarding claim 6, Behjati et al. disclose the rectifier circuit comprises: a half rectifier configured to rectify the output voltage (see paragraph [0023], Figure 2, explaining that D1 conducts on the output-power polarity during the open-switch interval and charges C1); and a voltage monitoring circuit configured to generate the monitored voltage (see paragraph [0024], Figure 2, explaining that the secondary-coupled primary voltage sensing circuit establishes a monitored voltage representative of the primary voltage).
Regarding claim 7, Behjati et al. disclose a first diode including an anode in signal communication with a first end of the secondary winding and a cathode in signal communication with a voltage output (see paragraph [0022], Figure 2, explaining that D1 has its anode at the ungrounded end of S and its cathode at DCout and the upper terminal of C1, as shown in the schematic); an output capacitor including a first terminal connected in common with the cathode of the first diode and the voltage output, and a second terminal connected to a ground reference point (see paragraph [0022], Figure 2, explaining that C1 is connected between the D1 cathode/DCout node and secondary-side ground, as shown in the schematic).
Regarding claim 12, Behjati et al. disclose the following method limitations using the Figure 2 circuit: a method of monitoring direct current voltage, the method comprising: providing an input voltage from a switch mode power supply (see paragraph [0020], Figure 2, explaining that the primary switching circuit applies DCin to primary winding P); storing energy in a transformer including a primary winding in signal communication with the switch mode power supply, the storing of the energy induced by applying a primary voltage in response to the switch mode power supply operating in the “ON” state (see paragraph [0023], Figure 2, explaining that closing the primary switch establishes Vp and stores energy in transformer T); releasing the energy from the transformer as a secondary voltage to be used as an output voltage in response to the switch mode power supply operating in the “OFF” state (see paragraph [0023], Figure 2, explaining that opening the primary switch induces the secondary voltage and releases stored energy to charge C1 and supply DCout); generating a monitored voltage from a rectifier circuit configured to generate a monitored voltage indicative of the input voltage in response to the switch mode power supply operating in the “ON” state (see paragraph [0043], Figure 2, explaining that the method closes the primary switch, reverse biases D1, establishes the secondary sensing-circuit voltage and estimates the primary voltage from that monitored voltage); and rectifying the output voltage using the rectifier circuit in response to the switch mode power supply operating in the “OFF” state (see paragraph [0025], Figure 2, explaining that the open-switch interval blocks sensing-branch current and forward biases D1 to deliver the released transformer energy to output capacitor C1).
Regarding claim 13, Behjati et al. disclose the following added limitations:
further comprising continuously switching a first switch included in a flyback converter between an “ON” state and an “OFF” state at a switching frequency (see paragraph [0023], Figure 2, explaining that the controller repeatedly opens and closes the flyback primary switch at a predetermined frequency).
Regarding claim 14, Behjati et al. disclose applying the input voltage using the flyback converter across a primary winding of the transformer to induce the storage of the energy when the first switch operates in the “ON” state (see paragraph [0023], Figure 2, explaining that closing the switch applies the DC input to primary winding P and stores energy in T); and releasing the energy stored in the transformer to apply the secondary voltage across a secondary winding of the transformer when the first switch operates in the “OFF” state (see paragraph [0023], Figure 2, explaining that opening the switch causes release of the stored energy through secondary winding S to the output rectifying branch).
Regarding claim 15, Behjati et al. disclose the rectifier circuit comprises: rectifying the output voltage using a half rectifier (see paragraph [0025], Figure 2, explaining that D1 is forward biased in the open-switch interval and rectifies the released secondary energy into C1); and generating the monitored voltage using a voltage monitoring circuit (see paragraph [0024], Figure 2, explaining that the primary voltage sensing circuit connected to S establishes the monitored voltage from which the primary voltage is estimated).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 16-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Behjati et al., (US 2023/0216417 A1) in view of Murugensan et al. (U.S. 2020/0412265 A1).
Regarding claim 16, Behjati et al. disclose performing a sampling operation to sample the input voltage (Vin), the sampling operation comprising operating a discharge switch (see paragraph [0032], Figure 2, explaining that the secondary-side sensing voltage representing the primary input voltage is scaled and shifted for measurement by microcontroller 116 through its analog-to-digital converter channels).
Behjati does not disclose operating a discharge switch configured in a “discharge OFF” state that activates the sampling operation to sample the input voltage (Vin) and a “discharge ON” state that deactivates the sampling operation.
Murugesan discloses a discharge switch configured in a “discharge OFF” state that activates the sampling operation to sample the input voltage (Vin) and a “discharge ON” state that deactivates the sampling operation (see Figs. 1-3, wherein reset switch 636 connected in parallel with sample-and-hold capacitor 634 and controlled by reset comparator 638 and optional reset timer 640 to discharge the capacitor in preparation for the next sample-and-hold operation (Murugesan, paragraph [0070], Figure 6, explaining the controlled capacitor-reset switch and reset pulse). Murugesan senses secondary-side ringing peaks for flyback switching control. Its capacitor-reset technique supplies the proposed modification; it does not expressly disclose the entire added limitation concerning sampling the input voltage).
It would have been obvious to one skilled in the art, prior to the effective filing date of the claimed invention, to modify Behjati by adding a controlled discharge switch across sensing capacitor C2 and coordinating ADC sample collection to occur while the discharge switch is OFF and to be suspended while it is ON, as taught by Murugesan’s separation of reset from the next sample-and-hold operation, as doing so would prepare the sensing capacitor to store a fresh voltage peak for the next input-voltage measurement because Murugesan explains in paragraph [0076] that discharging the sample-and-hold capacitor makes it ready to store the next sensed peak voltage.
As to claim 17, Behjati et al. & disclose the method of claim 16, wherein Behjati et al. further disclose the sampling operation determines an accuracy of the input voltage (see paragraph [0020], Figure 2, explaining that DCin is applied through primary winding P and switch 108a, establishing primary winding voltage Vp); and a secondary winding configured to deliver the secondary voltage to the rectifier circuit (see paragraph [0023], Figure 2, explaining that secondary winding S provides its induced voltage to D1, which conducts during energy release and charges C1).
Allowable Subject Matter
Claims 8-11 & 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
In terms of claim 8, the prior art of record does not teach alone or in combination of “wherein the voltage monitoring circuit comprises: a second diode including an anode connected to the ground reference point and including a cathode connected in common with the first end of the secondary winding; a third diode including an anode connected in common with the anode of the second diode and the ground reference point, and including a cathode connected to the second end of the secondary transformer; a fourth diode including an anode connected in common with the second end of the secondary winding; a series resistor having a first end connected to a cathode of the fourth diode and having an opposing second end configured to deliver the monitored voltage to an analog-to-digital converter (ADC); and a sampling capacitor including a first terminal connected to the ground reference point and an opposing second terminal connected to the second terminal of the series resistor” in combination with all other elements in claims 1-6.
In terms of claim 18, the prior art of record does not teach alone or in combination of “wherein the sampling operation further comprises: obtaining samples of the monitored voltage (Vmon) discharged from a sampling capacitor during a data sampling phase configured to obtain a samples of the monitored voltage (Vmon); analyzing the input voltage based on the samples of the monitored voltage (Vmon); resetting the monitored voltage (Vmon) during a discharge cycle phase; and charging the sampling capacitor during a charging phase” in combination with all other elements in claims 13-17.
Claims 9-11 variously depending from claim 8 are allowable for the same above reasons.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled "Comments on Statement of Reasons for Allowance."
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
U.S. 9,780,646 B2 to Youssef discloses a device and system for converting a three phase power input to a direct current output, and method of operating the device and system, are provided. The device includes a rectifier circuit for rectifying the three phase power input into a plurality of rectified outputs, a converter circuit for converting each of the rectified outputs, and a control circuit for generating the control signal based at least in part on the single direct current output. Each of the rectified outputs may have a common first mean voltage level, which is converted to a second mean voltage level based on a control signal. Each of the rectified outputs at the second mean voltage level are capable of being combined into a single direct current output.
U.S. 2016/0181931 A1 to Song et al. disclose a switching power supply and a method for controlling a voltage of a Bulk capacitor in the switching power supply are provided. The switching power supply includes: a rectifying unit; a Bulk capacitor; a converter; a monitoring circuit; a control circuit, controlling discharging of the Bulk capacitor, being configured to perform controls such that the voltage across the Bulk capacitor maintains the peak value after the Bulk capacitor having been charged to a peak value of AC voltage, and to perform controls such that the Bulk capacitor discharges from a peak value when the instantaneous absolute value of the AC voltage is smaller than or equal to the preset voltage. Using the technical solution of the present disclosure, a discharging time of the Bulk capacitor can be shortened, and thereby the volume of the Bulk capacitor is reduced. Consequently, it is conducive to realize miniaturization of the switching power supply.
U.S. 7,696,739 B2 to Bacchi et al. disclose an electronic switch circuit includes an electronic switch having a first terminal, a second terminal and a third terminal, control means for applying to the first terminal a cyclic drive waveform which causes the electronic switch to conduct between the second and third terminals during a selected portion of each cycle of the waveform, operably coupled to the control means to control synchronisation of the cyclic drive waveform a detector operable to detect a change of direction of current flow at the second terminal of the electronic switch and means for monitoring and, where required, compensating for offset error of the detector. The electronic switch may beneficially be a synchronous rectifier. The synchronous rectifier may be used in DC-DC power converters to improve efficiency.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TRUNG NGUYEN whose telephone number is (571)272-1966. The examiner can normally be reached on Mon- Friday 8AM - 4:00PM Eastern Time. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached on 571-272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
Examiner: /Trung Q. Nguyen/- Art 2858
/HUY Q PHAN/Supervisory Patent Examiner, Art Unit 2858
