DETAILED ACTION
DETAILED ACTION
Obviousness Type Double Patenting Rejection
1. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
2. Claims 1-20 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claim 1 of U.S. Patent No. 12289970 in view of Kwak (US 20200044009 A1).
See the comparison bellow:
Patent No: 12289970
1. A display panel, comprising a plurality of pixel-driving circuits, wherein the display panel further comprises: a base substrate;
a second conductive layer, located on a side of the base substrate, wherein the second conductive layer comprises first initial signal lines, and the first initial signal lines are configured to provide first initial signals to the pixel-driving circuits; and
a third conductive layer, located on a side of the second conductive layer distal to the base substrate, wherein the third conductive layer comprises second initial signal lines, and
the second initial signal lines are configured to provide second initial signals to the pixel-driving circuits;
wherein an orthographic projection of at least a part of one of the first initial signal lines on the base substrate extends along a first direction;
an orthographic projection of at least a part of one of the second initial signal lines on the base substrate extends along a second direction, and the first direction and the second direction intersect;
the first initial signal lines are configured to provide the first initial signals to the plurality of pixel-driving circuits distributed along the first direction, respectively; and
the second initial signal lines are configured to provide the second initial signals to the plurality of pixel-driving circuits distributed along the second direction, respectively.
Claim 1 (should 15) corresponding to claim 15
Current Application 19048825
1. A display panel, comprising a plurality of pixel-driving circuits, wherein the display panel further comprises: a base substrate;
a second conductive layer, located on a side of the base substrate, wherein the second conductive layer comprises first initial signal lines, and the first initial signal lines are configured to provide first initial signals to the pixel-driving circuits; and
a third conductive layer, located on a side of the second conductive layer distal to the base substrate, wherein the third conductive layer comprises second initial signal lines, and
the second initial signal lines are configured to provide second initial signals to the pixel-driving circuits;
an orthographic projection of at least a part of the first initial signal line on the base substrate extends along a first direction;
an orthographic projection of at least a part of the second initial signal line on the base substrate extends along a second direction, and the first direction and the second direction intersect;
the first initial signal line is configured to provide the first initial signal to the plurality of pixel-driving circuits distributed along the first direction; and the second initial signal line is configured to provide the second initial signal to the plurality of pixel-driving circuits distributed along the second direction.
Claim 15.
Although the claims at issue patent are not identical, they are not patentably distinct from each other because except for minor wording and insignificant changes in terminology, each claim limitation of Patent 12289970 reads on the corresponding limitation of Application 19048825 accept the limitations “wherein the second conductive layer is located in a second gate layer of the display panel, and the third conductive layer is located in a source-drain layer of the display panel”.
However, Kwak (US 20200044009 A1) discloses wherein the second conductive layer (conductive layer of T4) is located in a second gate layer of the display panel, and the third conductive layer (conductive layer of T7) is located in a source-drain layer of the display panel (([0052], [0071-0075], see Fig. 5).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify 12289970 with the teaching of Kwak, thereby providing a high efficient data transmission in the display device.
How about claims 2-20.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e. changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
5. Claims 1-5 and 13-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kwak (US 20200044009 A1).
Regarding claim 1:
Kwak (US 20200044009 A1) discloses a display panel (see Fig. 1), comprising a plurality of pixel-driving circuits (Fig. 2), wherein the display panel further comprises:
a base substrate (display substrate e.g. 100, Fig. 5) ([0065]);
a second conductive layer (conductive layer of transistor T4 see Fig. 2), the gate electrode has a layered structure including conductive layers) ([0065-0067], [0071]), located on a side of the base substrate ([0071-0075]);
wherein the second conductive layer comprises first initial signal lines (Vint1), and the first initial signal lines are configured to provide first initial signals to the pixel-driving circuits ([0052, Fig.2]); third conductive layer (conductive layer of T7, which Fig. 2 ), located on a side of the second conductive layer distal (away) to the base substrate (Fig. 5), wherein the third conductive layer comprises second initial signal lines (Vint2), and the second initial signal lines are configured to provide second initial signals to the pixel- driving circuits ([0052], [0071-0075]);
wherein the second conductive layer (conductive layer of T4) is located in a second gate layer of the display panel, and the third conductive layer (conductive layer of T7, Fig. 2) is located in a source-drain layer of the display panel (([0052], [0071-0075], see Fig. 5);
wherein an orthographic projection of at least a part of the first initial signal line (Vint1) on the base substrate extends along a first direction (i.e. D1 direction); an orthographic projection of at least a part of the second initial signal line (Vint2) on the base substrate extends along a second direction (D2 direction), and the first direction and the second direction intersect (see Figs. 3-5); the first initial signal line is configured to provide the first initial signal to a-the plurality of pixel-driving circuits distributed along the first direction; and the second initial signal line is configured to provide the second initial signal to the plurality of pixel-driving circuits distributed along the second direction ([0055-0057], Fig. 2-3).
Regarding claim 15:
Kwak discloses a display device (in Fig. 1), comprising a display panel, the display panel comprises a plurality of pixel-driving circuits (Fig. 2 for each pixel of the plurality of pixels), and further comprises: a base substrate (100); a second conductive layer (conductive layer corresponding to T4), ([0065-0067], [0071]), located on a side of the base substrate ([0071-0075]);
wherein the second conductive layer comprises first initial signal lines (vint1 for each pixel) (([0052], Vint1 Fig.2); and the first initial signal lines are configured to provide first initial signals to the pixel-driving circuits (([0052], [0071-0075]);
and a third conductive layer (conductive layer of T7, Fig.2), located on a side of the second conductive layer distal (away) to the base substrate (see Fig. 5), wherein the third conductive layer comprises second initial signal lines (Vint2), and the second initial signal lines are configured to provide second initial signals to the pixel-driving circuits; wherein the second conductive layer is located in a second gate layer of the display panel, and the third conductive layer is located in a source-drain layer of the display panel ([0052], [0071-0075]);
an orthographic projection of at least a part of the first initial signal line (Vint1) on the base substrate extends along a first direction (i.e. D1 direction); an orthographic projection of at least a part of the second initial signal line (Vint2) on the base substrate extends along a second direction (D2 direction), and the first direction and the second direction intersect; the first initial signal line is configured to provide the first initial signal to a-the plurality of pixel-driving circuits distributed along the first direction; and the second initial signal line is configured to provide the second initial signal to the plurality of pixel-driving circuits distributed along the second direction ([0055-0057], Figs. 2-3), and the first direction and the second direction intersect (i.e. D1 and D2 intersect, see Fig. 4-5);
the first initial signal line (Vint1) is configured to provide the first initial signal to the plurality of pixel-driving circuits distributed along the first direction (i.e. D1) (see Fig. 2, D1, D2 not in Fig. 2, it is on Fig. 3); and the second initial signal line is configured to provide the second initial signal to the plurality of pixel-driving circuits distributed along the second direction (D2, see Fig. 3 [0055-0056]).
Regarding claims 2 and 16:
Kwak discloses wherein an effective level voltage of the first initial signal (Vint) and an effective level voltage of the second initial signal (Vint2) are different. ([0055-0057], Fig. 2).
Regarding claims 3 and 17:
Kwak discloses wherein a part of the second conductive layer (conductive layer of T4, Fig. 2) is configured to form an electrode of a capacitor (C) in the pixel-driving circuit, and a part of the third conductive layer (conductive layer of T7) is configured to form a power supply line or a data line (ELVDD, [0055-0057] see Fig. 2).
Regarding claims 4 and 18:
Kwak discloses wherein the pixel-driving circuit is configured to drive a light-emitting unit (OLED) to emit light, the pixel-driving circuit comprises a driving transistor (T1), a first transistor (T4); a seventh transistor (T7); and an active layer (ACT), wherein the active layer is located between the base substrate (110) and the third conductive layer (conductive part of T7, see Figs. 2-3, 5 [0069-0071]), a part of the active layer is configured to form channel regions (C) of the driving transistor (T1), the first transistor (T4) and the seventh transistor (T7), wherein the active layer comprises:
a first active part group (active group of T6), comprising a plurality of first active parts (Source Darain and channel), wherein orthographic projections of the plurality of first active parts on the base substrate (100) are distributed at intervals in the second direction ([0069-0070], Fig. 5), and orthographic projection of a part of each of the first active parts on the base substrate extends along the second direction; and the second initial signal ( vint2 on 130, [0076] ) line comprises:
a plurality of first extending parts (VC, CE1, CSTE), arranged in a one-to-one correspondence with the first active parts, wherein any segment of orthographic projection of each of the first extending parts on the base substrate along an extending direction of the first extending part at least partially overlaps with an orthographic projection of the first active part corresponding to the first extending part on the base substrate (100), [0069-0076], Fig. 5).
a first active part group (active part of Transistor), comprising a plurality of first active parts, wherein orthographic projections of the plurality of first active parts on the base substrate (100) are distributed at intervals in the second direction (Y direction), and orthographic projection of a part of each of the first active parts on the base substrate extends along the second direction ([0069-0076], Fig. 5).
Regarding claims 5 and 19:
Kwak discloses wherein the pixel-driving circuit further comprises
a second transistor (T3) and a sixth transistor (T2);
the second transistor is provided with a first end connected to a gate end of the driving transistor (T1), a second end connected to a first end of the driving transistor (T1), and a gate end (gate of T3) connected to a gate-driving signal end (GW) ; the sixth transistor (T6) is provided a first end connected to the first end of the driving transistor (T1), a second end connected to an anode of the light-emitting unit (OLED, and a gate end (gate of T5) connected to an enable signal end (EM) [0069-0074];
wherein each of the first active parts comprises:
a first sub-active part (e.g. active part of the transistor T3), wherein an orthographic projection of the first sub-active part on the base substrate (100) extends along the first direction (X direction), and a part of the first sub-active part is configured to form a first channel region (gate region) of the second transistor (T3) ([0069-0074, Fig. 5]); and
a second sub-active part (active part of the transistor T6), connected to the first sub-active part (gate of T3), wherein an orthographic projection of at least a part of the second sub-active part on the base substrate extends along the second direction (gate of transistor extended in Y direction), and a part of the second sub-active parts are configured to form channel regions of the sixth transistor (T2) and the seventh transistor (T7) ([0069-0074, Fig. 5)
wherein, in the same first active part group (e.g. active part of T3), orthographic projections of the plurality of first sub-active parts on the base substrate and orthographic projections of a plurality of the second sub-active parts (e.g. active part of T6) on the base substrate are alternately distributed in sequence in the second direction (see Fig. 5, [0069-0074]).
Regarding claim 13:
Kwak discloses wherein the third conductive layer (conductive layer of T7) further comprises: a power supply line (power supply line corresponding to Vint2), wherein an orthographic projection of the power supply line on the base substrate extends along the second direction ([0052], [0071-0075]);
Regarding claim 14:
Kwak discloses wherein the pixel-driving circuit is configured to drive a light-emitting unit to emit light ((see Fig. 2) [0055]), the pixel-driving circuit comprises a driving transistor (T1), a first transistor (T4) and a seventh transistor (T7), the first transistor is provided with a second end configured to receive the second initial signal (Vint1) and a first end connected (connected through N1) to a gate end of the driving transistor, and the seventh transistor is provided a first end configured to receive the first initial signal (Vin2) and a second end configured to connect an anode of the light-emitting unit (OLED) ((see Fig. 2, [0055-0057]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. Claims 6-12 and 20 are rejected over Kwak (US 20200044009) in view of Kim (US 20180006105).
Regarding claims 6 and 20:
Kwak does not specifically disclose wherein orthographic projections of the plurality of third initial signal lines on the base substrate extend along the first direction and are distributed at intervals along the second direction; wherein at least a part of the third initial signal line is connected to at least a part of the second initial signal line through a via hole.
However, Kim et al teaches a plurality of third initial signal lines(CNL22), configured to provide the second initial signal(Vint2) to the pixel-driving circuits(PXC)(see Figs. 4-5, 7-8, 13; [0195, 0232]), and orthographic projections of the plurality of third initial signal lines on the base substrate (SUB) extend wherein at least a part of the third initial signal line is connected to at least a part of the second initial signal line(Vint2) through via holes(CH)(See Figs. 7-8, 13; [0195, 0232]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kwak as modified by Asano and Kim, so as to provide initial voltage to a display properly.
Regarding claim 7:
Kwak as modified by Kim discloses (CNL22), configured to provide the second initial signal(Vint2) to the pixel-driving circuits(PXC)(see Figs. 4-5, 7-8, 13; [0195, 0232]). Same motivation as applied to claim 6.
Regarding claim 8:
Kwak as modified by Kim discloses wherein each of the second initial signal lines is respectively connected to each of the third initial signal lines through a via hole (see Figs. 2-4, 13 and [0232]). Same motivation as applied to claim 6.
Regarding claim 9:
Kwak in view of Kim discloses, wherein the display panel further comprises a circuit integrated area (see Fig. 3), a bending area (EVD corresponding to Pix2), and a bonding area (PPA), wherein the circuit integration area is configured to integrate the pixel-driving circuits (PXC), the bending area is bent to bend the binding area to a back of the display panel ([0057-0058], [0104]), and the bonding region is configured to provide driving signals to the pixel-driving circuits through a chip (Scan driving); wherein the first initial signal lines (Vint1) are connected to a first signal transmission line (PI ) extending along the second direction, the first signal transmission line at least extends to a side of the pixel-driving circuit close to the bonding area (PPA), and the first signal transmission line does not overlap with the pixel-driving circuits (PXC in the pixels) (see Fig. 3-4, and [0027-0058], [0104]).
Regarding claim 10
Kwak in view of Kim discloses wherein the display panel further comprises a circuit integrated area (see Fig. 3), a bending area (PPA) ([0104]), and a bonding area (EVD corresponding to Pix2), wherein the circuit integration area is configured to integrate the pixel-driving circuits (see Fig. 3) ([0104]), the bending area is bent to bend the binding area to a back of the display panel, and the bonding region is configured to provide driving signals to the pixel-driving circuits through a chip (scan driver); wherein the third initial signal lines (initial signal line corresponding to PI2, see Fig. 3) are connected to a second signal transmission line (PI1) extending along the second direction, the second signal transmission line at least extends to a side of the pixel-driving circuit close to the bonding area, and the second signal transmission line does not overlap with the pixel-driving circuits (SDW) ([0057-0058], [0104], Fig. 3).
Regarding claim 11:
Kwak in view of Kim discloses wherein the display panel further comprises a circuit integrated area (P1, [0084]), a bending area (EVD corresponding to Pix2), and a bonding area (PPA), wherein the circuit integration area is configured to integrate the pixel-driving circuits, the bending area is bent to bend the binding area to a back of the display panel, and the bonding region is configured to provide driving signals to the pixel-driving circuits through a chip (scan driver SDV) wherein the second initial signal lines (Vin2) extend along the second direction to and beyond a side of the pixel-driving circuit close to the bonding area ( [0057-0058], [0104]).
Regarding claim 12:
Kwak in view of Kim discloses wherein the second direction is a column direction, and at least two pixel-driving circuits (PXs) correspond to one second initial signal line (see Kim [0073], Fig. 2-3). Same motivation as Applied to claim 6.
Pertinent art
7. Pertinent art of record Kim US 10629130 B2 discloses display device.
Inquiry
8. Any inquiry concerning this communication or earlier communication from the examiner should be directed to Shaheda Abdin whose telephone number is (571) 270-1673.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LunYi Lao could be reached at (571) 272-7671. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHAHEDA A ABDIN/Primary Examiner, Art Unit 2619