Prosecution Insights
Last updated: September 17, 2026
Application No. 19/084,964

ELECTRICAL ISOLATION MODULE FOR POWER OVER ETHERNET AND CONNECTOR SOCKET AND ELECTRONIC DEVICE FOR SAME

Non-Final OA §102
Filed
Mar 20, 2025
Priority
Mar 21, 2024 — TW 113110614
Examiner
THOMAS, LUCY M
Art Unit
Tech Center
Assignee
Futurewafer Tech Co. Ltd.
OA Round
1 (Non-Final)
62%
Grant Probability
Moderate
1-2
OA Rounds
1y 7m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allowance Rate
510 granted / 817 resolved
+2.4% vs TC avg
Strong +18% interview lift
Without
With
+18.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
36 currently pending
Career history
846
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
54.9%
+14.9% vs TC avg
§102
29.1%
-10.9% vs TC avg
§112
12.7%
-27.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 817 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Buckmeier et al. (US 2005/0201035). Regarding Claim 1, Buckmeier discloses an electrical isolation module for power over Ethernet (Figures 1-10, please note that not all Figures include all the labelling for similar elements), comprising: a network terminal connection section, comprising a plurality of first pins (270 comprising pins J1-J8, Figures 1-9); a network chip connection section, comprising a plurality of second pins (271 comprising pins P1-P12, Figures 1-9); and at least one isolation circuit, wherein the isolation circuit comprises: a transformer (comprising 302, Figures 1-9); a common mode choke (comprising 300, Figures 1-9), connected between the transformer and the network terminal connection section (300 connected between 302 and 270, Figures 1-9); and a transient voltage suppressor (TVS diode, Figures 3-9), connected between the transformer and the network chip connection section (TVS diode connected between 302 and 271 comprising P1-P12, Figures 3-5, 7, 9). Regarding Claim 2, Buckmeier discloses the electrical isolation module according to Claim 1, wherein the transformer comprises a first winding and a second winding, the first winding is connected to the common mode choke (a first winding of 302 connected to the common mode choke 300, Figures 3-5, 7, 9), the second winding is connected to the transient voltage suppressor (a second winding of 302 connected to TVS diode 310, Figures 3-5, 7, 9), wherein the transient voltage suppressor is connected in parallel with the second winding, and two ends of the transient voltage suppressor are respectively connected to two of the second pins (310 connected in parallel with the second winding and two ends of 310 are respectively connected to two of the second pins P-P12, Figure 4). Regarding Claim 3, Buckmeier discloses the electrical isolation module according to Claim 2, wherein the common mode choke comprises two third windings, and each third winding is connected in series with the first winding and one of the first pins (third windings of 300 connected in series between the first winding and the one of the pins 270, Figure 4). Regarding Claim 4, Buckmeier discloses the electrical isolation module according to Claim 1, wherein a parasitic capacitance value of the transient voltage suppressor is in negative correlation with a support transmission speed of a network connection port for power over Ethernet (Figures 3-4, Paragraphs 19-20). Regarding Claim 5, Buckmeier discloses a connector socket (250, Figure 1, Figures 2-10), comprising: a socket body (68, Figure 1), comprising a plug interface and an accommodating chamber relative to the plug interface (70 and associated chamber, Figure 1); and at least one electrical isolation module, located in the accommodating chamber (Figure 1, circuit details in Figures 2-9), where in the electrical isolation module comprises: a network terminal connection section, comprising a plurality of first pins (270 comprising pins J1-J8, Figures 1-9); a network chip connection section, comprising a plurality of second pins (271 comprising pins P1-P12, Figures 1-9); and at least one isolation circuit, wherein the isolation circuit comprises: a transformer (comprising 302, Figures 1-9); a common mode choke (comprising 300, Figures 1-9), connected between the transformer and the network terminal connection section (300 connected between 302 and 270, Figures 1-9); and a transient voltage suppressor (TVS diode, Figures 3-9), connected between the transformer and the network chip connection section (TVS diode connected between 302 and 271 comprising P1-P12, Figures 3-5, 7, 9). Claims 6-8 recite the same limitations as Claims 2-4, except for the dependency to Claim 5. Therefore, Claims 6-8 are rejected for the same reasons as Claims 2-4. Regarding Claim 9, Buckmeier discloses the connector socket according to Claim 6, further comprising at least one filter circuit (comprising capacitor 306 and resistor 309, 304, Figures 3-9, not labelled in all Figures), wherein at least one of the first winding and the second winding is provided with a center tap, and each center tap is connected to one of the at least one filter circuit (306, 304 connected to 309 which connected to the center tap of 302, Figure 3). Regarding Claim 19, Buckmeier discloses an electronic device (Figures 1-10), comprising: a connector socket (250, Figure 1, Figures 2-10), wherein the connector socket comprises: a socket body (68, Figure 1), comprising a plug interface and an accommodating chamber relative to the plug interface (70 and associated chamber, Figure 1); and at least one electrical isolation module, located in the accommodating chamber (Figure 1, circuit details in Figures 2-9), where in the electrical isolation module comprises: a network terminal connection section, comprising a plurality of first pins (270 comprising pins J1-J8, Figures 1-9); a network chip connection section, comprising a plurality of second pins (271 comprising pins P1-P12, Figures 1-9); and at least one isolation circuit, wherein the isolation circuit comprises: a transformer (comprising 302, Figures 1-9); a common mode choke (comprising 300, Figures 1-9), connected between the transformer and the network terminal connection section (300 connected between 302 and 270, Figures 1-9); and a transient voltage suppressor (TVS diode, Figures 3-9), connected between the transformer and the network chip connection section (TVS diode connected between 302 and 271 comprising P1-P12, Figures 3-5, 7, 9). Claims 11-13 recite the same limitations as Claims 2-4, except for the dependency to Claim 10. Therefore, Claims 11-13 are rejected for the same reasons as Claims 2-4. Claim 14 recites the same limitations as Claim 9, except for the dependency to Claim 10. Therefore, Claim 14 is rejected for the same reasons as Claim 9. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Crawley et al. (US 2009/0207538) discloses an electrical isolation module for power over Ethernet (Figures 1-13), comprising: a network terminal connection section, comprising a plurality of first pins (pins connecting LINE, 108, Figures 1-2); a network chip connection section, comprising a plurality of second pins (Pins at 104T, 104R connecting 106, Figures 1-2); and at least one isolation circuit (Figures 1-2), wherein the isolation circuit comprises: a transformer (210, Figure 2); a common mode choke, connected between the transformer and the network terminal connection section (common choke, not labelled in Figure 2, connected between 210 and LINE, Figure 2); and a transient voltage suppressor (202, Figure 2), connected between the transformer and the network chip connection section (202 connected between 210 and 206, Figure 2); Rostamzadeh et al. (US 11,303,115) discloses an electrical isolation module for power over Ethernet (Figures 1-11), comprising: a network terminal connection section, comprising a plurality of first pins (pins 14A, 14B connecting 8, Figure 1); a network chip connection section, comprising a plurality of second pins (Pins 12A, 12Bconnecting 6, Figure 1); and at least one isolation circuit (10, Figures 1-6), wherein the isolation circuit comprises: a transformer (16, Figures 1-6); a common mode choke, connected between the transformer and the network terminal connection section (common mode choke 18, connected between 16 and 14A, 14B connection section, Figures 1-6); and a transient voltage suppressor (20, Figure 2), connected between the common mode choke and network terminal connection section (20 connected between 18 and 14A, 14B, Figures 1-6). . Any inquiry concerning this communication or earlier communications from the examiner should be directed to LUCY M THOMAS whose telephone number is (571)272-6002. The examiner can normally be reached Mon-Fri 9:30 am - 5:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal L Hammond can be reached at (571)270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LUCY M THOMAS/Examiner, Art Unit 2838, 9/02/2026 /CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
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Prosecution Timeline

Mar 20, 2025
Application Filed
Sep 09, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
62%
Grant Probability
81%
With Interview (+18.2%)
3y 1m (~1y 7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 817 resolved cases by this examiner. Grant probability derived from career allowance rate.

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