DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 6-10, 12 and 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tan et al. (US 2008/0235461) and further in view of Goodman et al. (US 2015/0143059).
Consider claim 1, Tan et al. discloses a device, comprising: a buffer to store a data to be written to memory; and a command parser configured to receive a feedback from the buffer and to output a command based at least in part on the feedback, the feedback identifying a state of the buffer, wherein the command includes a first type, (Abstract, [0008]-[0019], incoming writes to the same cache line as a request are buffered/queue and a determination is made so to whether they should be merged or not based on feedback to the controller.).
As for the limitations: “the command parser is further configured to prioritize the command over a second command that includes a second type based on the feedback, and wherein one of the first type and the second type is a read command and another of the first type and the second type is a write command. however, Goodman et al. does teach that reads and writes can both have priority. Writes can be given priority to maintain an optimal stream of memory writes for efficient processing and that reads are typically prioritized over writes ([0024] and [0035]).
It would have been obvious to one of ordinary skill in the art at the time of filing for a read or write command to have priority over the other in Tan et al. because Goodman et al. discloses that it is typical for reads to have priority and for writes to have priority to improve processing performance with an optimal steam of writes (Goodman et al.: [0024] and [0035]).
Consider claim 2, Tan et al. discloses a device according to claim 1, further comprising a second buffer to merge a partial write request with another data, the other data drawn from a set including a second data in the memory or the data in the buffer (Abstract, [0008]-[0019], partial writes can be merged.).
Consider claim 6, Tan et al. discloses a device according to claim 1, wherein the command parser is further configured to prioritize the command based at least in part on the feedback (Abstract, [0008]-[0019], merging partial transactions is considered prioritizing them.).
Consider claim 7, Tan et al. discloses a device according to claim 1, further comprising a first command queue associated with the command parser and a second command queue associated with the command parser (Abstract, [0008]-[0019], there are multiple queues/buffers with all have some association to the system as a whole.).
Consider claim 8, Tan et al. discloses a device according to claim 1, wherein the feedback is based at least in part on the data in the buffer (Abstract, [0008]-[0019]).
Consider claim 9, Tan et al. discloses a method, comprising: receiving a data at a device for memory from a host computer; storing the data in a buffer; receiving a feedback from the buffer at a command parser, the feedback identifying a state of the buffer; and outputting a command based at least in part on the feedback, (Abstract, [0008]-[0019], incoming writes to the same cache line as a request are buffered/queue and a determination is made so to whether they should be merged or not based on feedback to the controller.).
As for the limitations: “including prioritizing the command over a second command based at least in part on the feedback and the command including a first type and the second command including a second type, wherein one of the first type and the second type is a read command and another of the first type and the second type is a write command”. Tan et al. does not explicitly state that a read or write command is given priority over the other type. however, Goodman et al. does teach that reads and writes can both have priority. Writes can be given priority to maintain an optimal stream of memory writes for efficient processing and that reads are typically prioritized over writes ([0024] and [0035]).
It would have been obvious to one of ordinary skill in the art at the time of filing for a read or write command to have priority over the other in Tan et al. because Goodman et al. discloses that it is typical for reads to have priority and for writes to have priority to improve processing performance with an optimal steam of writes (Goodman et al.: [0024] and [0035]).
Consider claim 10, Tan et al. discloses a method according to claim 9, further comprising: determining that a buffer includes a page including a second data for a pending write request; and merging the data with the second data in the page in the buffer, including changing a portion of the page in the buffer (Abstract, [0008]-[0019]).
Consider claim 12, Tan et al. discloses a device according to claim 10, further comprising: receiving a notification from the memory that the command was removed from a queue; and changing an entry in a table for the command to indicate that the entry is sent to the memory (Abstract, [0008]-[0019], transactions can be left in memory completed as a cache and also evicted/written to memory.).
Consider claim 17, Tan et al. discloses a device according to claim 9, wherein outputting the command based at least in part on the feedback includes prioritizing the command based at least in part on the feedback (Abstract, [0008]-[0019], merging partial transactions is considered prioritizing them.).
Consider claim 18, Tan et al. discloses an article, comprising a non-transitory storage medium, the non-transitory storage medium having stored thereon instructions that, when executed by a machine, result in: receiving a data at a device for memory from a host computer; storing the data in a buffer; receiving a feedback from the buffer at a command parser, the feedback identifying a state of the buffer; and outputting a command based at least in part on the feedback (Abstract, [0008]-[0019], incoming writes to the same cache line as a request are buffered/queue and a determination is made so to whether they should be merged or not based on feedback to the controller.).
As for the limitations: “including prioritizing the command over a second command based at least in part on the feedback and the command including a first type and the second command including a second type, wherein one of the first type and the second type is a read command and another of the first type and the second type is a write command”. Tan et al. does not explicitly state that a read or write command is given priority over the other type. however, Goodman et al. does teach that reads and writes can both have priority. Writes can be given priority to maintain an optimal stream of memory writes for efficient processing and that reads are typically prioritized over writes ([0024] and [0035]).
It would have been obvious to one of ordinary skill in the art at the time of filing for a read or write command to have priority over the other in Tan et al. because Goodman et al. discloses that it is typical for reads to have priority and for writes to have priority to improve processing performance with an optimal steam of writes (Goodman et al.: [0024] and [0035]).
Consider claim 19, Tan et al. discloses a method according to claim 18, wherein outputting the command based at least in part on the feedback includes prioritizing the command based at least in part on the feedback (Abstract, [0008]-[0019], merging partial transactions is considered prioritizing them.).
Claim(s) 11 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tan et al. (US 2008/0235461) in view of Goodman et al. (US 2015/0143059).
Consider claim 11, Tan et al. discloses the method according to claim 9, Tan et al. does not explicitly state: “sending an early acknowledgement to the host computer.”. The ability to send an acknowledgement to a host early is well known to one of ordinary skill in the art and has the benefit of allowing the host to shift to its new process earlier. Therefore the Examiner is taking official notice to this feature.
It would have been obvious to one of ordinary skill in the art at the time of filing to send an acknowledgement early as claimed, because doing so has the benefit of allowing the host to shift to its next process earlier, therefore improving system efficiency.
Consider claim 16, Tan et al. discloses the method according to claim 10, further comprising: receiving a full data at a second address; writing the full data to a second page in the buffer; placing a second command in a queue in the device for the memory; and adding an entry to a table indicating that the second page in the buffer is in the queue (Abstract, [0008]-[0019]).
Allowable Subject Matter
Claims 3-5 and 13-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ALSIP whose telephone number is (571)270-1182. The examiner can normally be reached M-F 9-5.
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/MICHAEL ALSIP/Primary Examiner, Art Unit 2136
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