Prosecution Insights
Last updated: August 16, 2026
Application No. 19/087,566

SPATIAL LIGHT MODULATOR AND HOLOGRAPHIC 3D DISPLAY DEVICE

Non-Final OA §103
Filed
Mar 23, 2025
Priority
Mar 25, 2024 — JP 2024-047720
Examiner
HODGES, SUSAN E
Art Unit
2425
Tech Center
2400 — Computer Networks
Assignee
Tohoku University
OA Round
1 (Non-Final)
67%
Grant Probability
Favorable
1-2
OA Rounds
1y 2m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
257 granted / 384 resolved
+8.9% vs TC avg
Moderate +14% lift
Without
With
+13.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
25 currently pending
Career history
418
Total Applications
across all art units

Statute-Specific Performance

§101
6.3%
-33.7% vs TC avg
§103
49.5%
+9.5% vs TC avg
§102
18.4%
-21.6% vs TC avg
§112
25.1%
-14.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 384 resolved cases

Office Action

§103
DETAILED ACTION This office action is in response to the application filed on March 23, 2025. Claims 1 – 6 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. JP2024-047720, filed on March 25, 2024. Information Disclosure Statement The information disclosure statement (IDS) was submitted on March 23, 2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Examiner. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 – 3, 5 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over BYUN et al. (US 2016/0209808 A1) referred to as BYUN hereinafter, in view of Yoshitomo Isomae “Design of 1-μm-pitch liquid crystal spatial light modulators having dielectric shield wall structure for holographic display with wide field of view” March 2017, Springer Natural Link Opt Rev, Volume 24, pages 165–176 referred to as Isomae hereinafter. Regarding Claim 1, BYUN teaches a spatial light modulator (Fig. 2, Par. [0042] a spatial light modulator 300b) comprising: a first substrate (Fig. 3, Par. [0047] The spatial light modulator 300b may include a first base substrate BS1); a second substrate facing the first substrate (Par [0047] The spatial light modulator 300b may include a second base substrate BS2. Par. [0048] The first base substrate BS1 and the second base substrate BS2 may be opposed to each other (i.e. facing)); and a liquid crystal layer (Par. [0047] The spatial light modulator 300b may include a first base substrate BS1, a second base substrate BS2, a thin-film transistor TR, a pixel electrode PE, a liquid crystal layer LC) located between the first substrate and the second substrate (See Fig. 3), wherein the first substrate has, on a substrate surface thereof, driving electrodes (Fig.4 , Par. [0049] The thin-film transistor TR may be disposed on the first base substrate BS1. The thin-film transistor TR may include a gate electrode GE, an active pattern AP, a first electrode E1, and a second electrode E2. A planarizing layer PL may be disposed on the second insulating layer IL2. Par. [0050] The pixel electrode PE may be disposed on the planarizing layer PL. The pixel electrode PE may be electrically connected to the second electrode E2 via a contact hole that passes through the planarizing layer PL. The pixel electrode PE may include a light reflective material) located on both sides of each of pixels arranged in a first direction among pixels arranged in a matrix (Par. [0058] The spatial light modulator 310 may include a plurality of data lines DL1 to DLm, a plurality of gate lines GL1 to GLn, and a plurality of pixels PX (i.e. arranged in a matrix, see Fig. 4 and Fig. 5). Par. [0059] The data lines DL1 to DLm and the gate lines GL1 to GLn may define pixel regions, each of which may be provided with a pixel PX for displaying an image) and electrodes (Par. [0053] the pixel electrode PE and the common electrode CE may be arranged on the same base substrate. For example, the pixel electrode PE and the common electrode CE may be arranged on the first base substrate BS1. Par. [0052], The pixel electrode PE and the common electrode CE may induce an electric field in the liquid crystal layer LC). BYUN does not specifically teach ground electrodes. Therefore, BYUN fails to explicitly teach the first substrate has ground electrode located between rows of driving electrodes arranged in the first direction. However, Isomae teaches the first substrate has ground electrode located between rows of driving electrodes arranged in the first direction (Page 9, Section 4.1, Metal shield wall structure, We simulated a conventional electrode with a metal shield wall structure. The metal walls are placed between driving electrodes to prevent leakage of the fringe electric field, as shown in Fig. 14a. We determined that the voltage of the metal wall was O V for shielding the electric field). References BYUN and Isomae are considered to be analogous art because they relate to a liquid crystal display panels with spatial light modulators. Therefore, it would have been obvious that one of ordinary skill in the art, before the effective filing date of the claimed invention, would recognize the advantage of further specifying the location of the ground electrodes as suggested by Isomae in the invention of BYUN in order that metal walls can completely shield the fringe electric field (See Isomae, Page 9, Section 4.1). Regarding Claim 2, BYUN in view of Isomae teaches Claim 1. BYUN further teaches a holographic 3D display device comprising the spatial light modulator (Fig. 2, Par. [0042] the holographic display apparatus of FIG. 2 includes a reflective spatial light modulator 300b, Par. [0046] The spatial light modulator 300b may modulate a phase and amplitude of incident light while reflecting the incident light, so as to display the hologram image IMG (i.e. 3D)), wherein the liquid crystal layer is driven by a horizontal electric field between the driving electrodes located on both sides of each of the pixels arranged in the first direction (Par. [0053] the liquid crystal molecules of the liquid crystal layer LC are operated by the lateral (i.e. horizontal) electric field). Regarding Claim 3, BYUN in view of Isomae teaches Claim 2. BYUN further teaches wherein the liquid crystal layer is driven by a potential difference between the driving electrodes located on both sides of each of the pixels arranged in the first direction. (Par. [0053] when voltages are applied to the pixel electrode PE and the common electrode CE, a lateral electric field is induced between (i.e. potential difference) the pixel electrode PE and the common electrode CE, and the liquid crystal molecules of the liquid crystal layer LC are operated by (i.e. driven by) the lateral electric field). Regarding Claim 5, BYUN in view of Isomae teaches Claim 2. BYUN further teaches wherein a pixel pitch of the pixels in the first direction (Par. [0004] A pitch between pixels of an SLM may be reduced to obtain a hologram image with a wide viewing angle. See Fig. 4, PP – pixel pitch). However, BYUN does not specifically teach pixel pitch of 1 μm or less. Therefore, BYUN fails to explicitly teach a pixel pitch of the pixels in the first direction is 1 μm or less. However, Isomae teaches a pixel pitch of the pixels in the first direction is 1 μm or less (Fig. 14a, pixel pitch = 1 μm). References BYUN and Isomae are considered to be analogous art because they relate to a liquid crystal display panels with spatial light modulators. Therefore, it would have been obvious that one of ordinary skill in the art, before the effective filing date of the claimed invention, would recognize the advantage of further specifying the pixel pitch as suggested by Isomae in the invention of BYUN in order to create an electronic holographic display with a wide field of view (See Isomae Introduction Section, Page 2, Col. 1, 1st paragraph). Regarding Claim 6, BYUN in view of Isomae teaches Claim 2. BYUN further teaches having a viewing zone angle (Par. [0004] A pitch between pixels of an SLM may be reduced to obtain a hologram image with a wide viewing angle (i.e. viewing zone angle)). However, BYUN does not specifically teach the degree of the angle of the viewing zone. Therefore, BYUN fails to explicitly teach having a viewing zone angle of 30° or more. However, Isomae teaches having a viewing zone angle of 30° or more (Fig. 2, Page 11, Conclusion, To realize electronic holographic displays with a viewing angle of 30°, it is necessary to fabricate a 1-μm-pitch SLM (using LCOS)). References BYUN and Isomae are considered to be analogous art because they relate to a liquid crystal display panels with spatial light modulators. Therefore, it would have been obvious that one of ordinary skill in the art, before the effective filing date of the claimed invention, would recognize the advantage of further specifying the view angle as suggested by Isomae in the invention of BYUN in order that a pixel structure which realizes individual pixel driving to create electronic holographic displays with a wide field of view (See Isomae Introduction Section, Page 2, Col. 2, 1st paragraph). Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over BYUN et al. (US 2016/0209808 A1), in view of Isomae, and in further view of Yoshida et al. (US 2004/0066480 A1) referred to as Yoshida hereinafter. Regarding Claim 4, BYUN in view of Isomae teaches Claim 2. BYUN further teaches in alignment of the liquid crystal molecules is changed by the horizontal electric field (Par. [0053] when voltages are applied (i.e. molecules change) to the pixel electrode PE and the common electrode CE, a lateral electric field is induced between the pixel electrode PE and the common electrode CE, and the liquid crystal molecules of the liquid crystal layer LC are operated by the lateral electric field). BYUN in view of Isomae does not specifically teach initial alignment of liquid crystal layer. Therefore, BYUN in view of Isomae fails to explicitly teach in an initial alignment state in which liquid crystal molecules in the liquid crystal layer are aligned perpendicularly to the substrate, alignment of the liquid crystal molecules is changed by the horizontal electric field. However, Yoshida teaches in an initial alignment state in which liquid crystal molecules in the liquid crystal layer are aligned perpendicularly to the substrate (Par. [0195] The liquid crystal layer 16 includes a liquid crystal of vertical alignment type having a positive anisotropy of dielectric constant. Thus, when no voltage is applied thereto (i.e. initial alignment state), the liquid crystal molecules are aligned in the direction substantially perpendicular to the substrate surface. Upon application of a voltage thereto, on the other hand, as shown in FIG. 5B, a horizontal electric field running from the first electrode 23a toward the second electrode 23b is formed), alignment of the liquid crystal molecules is changed by the horizontal electric field (Par. [0195] Upon application of a voltage thereto, on the other hand, as shown in FIG. 5B, a horizontal electric field running from the first electrode 23a toward the second electrode 23b is formed. The liquid crystal molecules are aligned parallel (i.e. alignment is changed) to the horizontal electric field). References BYUN, Isomae and Yoshida are considered to be analogous art because they relate to a liquid crystal display panels. Therefore, it would have been obvious that one of ordinary skill in the art, before the effective filing date of the claimed invention, would recognize the advantage of further specifying the initial alignment of the liquid crystal molecules as suggested by Yoshida in the inventions of BYUN and Isomae in order that upon application of a voltage the liquid crystal molecules having a positive dielectric anisotropy are aligned in parallel to the electric field (See Yoshida Par. [0193]). Conclusion The prior art references made of record are not relied upon but are considered pertinent to applicant's disclosure. JIANG et al. (US 2014/0217411 A1) teaches array substrate and liquid crystal display panel. Yang et al. (US 2008/0297708 A1) teaches an LCD and an electronic apparatus having a photo-alignment film and patterned pixel electrodes with micro slits. Any inquiry concerning this communication should be directed to SUSAN E HODGES whose telephone number is (571)270-0498. The Examiner can normally be reached on Monday - Friday from 8:00 am (EST) to 4:00 pm (EST). If attempts to reach the Examiner by telephone are unsuccessful, the Examiner's supervisor, Brian T. Pendleton, can be reached on (571) . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://portal.uspto.gov/external/portal. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /Susan E. Hodges/Primary Examiner, Art Unit 2425
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Prosecution Timeline

Mar 23, 2025
Application Filed
Aug 05, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
67%
Grant Probability
81%
With Interview (+13.9%)
2y 7m (~1y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 384 resolved cases by this examiner. Grant probability derived from career allowance rate.

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