Prosecution Insights
Last updated: October 01, 2026
Application No. 19/087,694

MULTI-INPUT POWER SUPPLY CIRCUIT AND ELECTRONIC DEVICE

Non-Final OA §103
Filed
Mar 24, 2025
Priority
Sep 28, 2022 — CN 202211190839.7 +1 more
Examiner
SWEET, JOSHUA JAMES
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Huawei Technologies Co., Ltd.
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
12 granted / 16 resolved
+7.0% vs TC avg
Strong +31% interview lift
Without
With
+30.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
5 currently pending
Career history
31
Total Applications
across all art units

Statute-Specific Performance

§101
4.3%
-35.7% vs TC avg
§103
50.0%
+10.0% vs TC avg
§102
31.9%
-8.1% vs TC avg
§112
10.6%
-29.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 16 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 03/26/2025, 11/24/2025 and 03/17/2026 were filed. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the ability of a first switch to be able to switch between different inputs or placing the input in a series connection found in claim 7-10 and 17, a wiring diagram for example, must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections Claim objected to because of the following informalities: Claim 2 states "an input end each resistor of the plurality of resistors" and should read "an input end of each resistor of the plurality of resistors" or "each input end of the plurality of resistors". Furthermore, "an input end each resistor of the plurality of resistors is connected to a positive electrode or a negative electrode of each input interface" would imply that every resistor is directly connected to an input, but fig 4 and 5 show that only the first resistor is connected to input and the last resistor is connected to the control circuit. Appropriate correction is required. Claim 11 is objected to because of the following informalities: Claim 11 states that the power conversion circuit further comprises a direct current conversion circuit but does not state whether it is a direct current to direct current conversion, a direct current to alternating current conversion or an alternating current to direct current conversion. Examiner will assume it is an alternating current to direct current conversion due the circuit comprising a power factor correction circuit found in AC/DC conversion. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 4-6, 13-16 and 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Luo (US 2007/0241732 A1) in view of Tran (US 2016/0359424 A1). Regarding Claim 1, Luo teaches a multi-input power supply circuit comprising: a plurality of input interfaces (see Luo fig 7 “Power Source 1-N” and para 0031); a first switch, wherein an input end of a plurality of input ends of the first switch is respectively connected to a corresponding input interface of the plurality of input interfaces (see Luo fig 7 “SW1” and para 0033); a power conversion circuit, wherein an output end of the first switch is connected to an input end of the power conversion circuit (see Luo fig 4, 7 and para 0031); a sampling circuit, wherein an input end of a plurality of input ends of the sampling circuit is respectively connected to a corresponding input interface of the plurality of input interfaces (see Luo fig 7 “Sensing Unit 706” and para 0034); and a control circuit, wherein an output end of the sampling circuit is connected to the control circuit (see Luo fig 7 “Control Logic 704” and para 0033): and the control circuit is configured to control the first switch based on the voltage feedback signals (see Luo para 0033). But Luo is silent on teaching the sampling circuit further comprises at least one resistor configured to provide voltage feedback signals for the control circuit based on voltage values of input voltages of the plurality of input interfaces. However, Tran teaches a power converter with a measurement device “24” that comprises multiple resistors to provide voltage signals to a control circuit based on the input voltages (see Tran fig 2C “Voltage dividers 240-242” and para 0035-0036) It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of Luo to include the measurement device from Tran to monitor the input voltages and adjust the power conversion based on the input voltages. Regarding Claim 2, the combination of Luo and Tran teaches the multi-input power supply circuit according to claim 1, wherein the sampling circuit further comprises: a plurality of sampling subcircuits (see Luo fig 7 and 9 “Sensing Unit 706” and para 0034, 0038). But Luo is silent on teaching each sampling subcircuit comprises a plurality of resistors connected in series, an input end each resistor of the plurality of resistors is connected to a positive electrode or a negative electrode of each input interface of the plurality of input interfaces, and an output end of each resistor of the plurality of resistors is connected to the control circuit. However, Tran teaches a power converter with a measurement device “24” that comprises multiple resistors connected in series to provide voltage signals to a control circuit based on the input voltages (see Tran fig 2C “Voltage dividers 240-242” and para 0035-0036) It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of Luo to include the measurement device from Tran to monitor the input voltages of each input source and adjust the power conversion based on the input voltages. Regarding Claim 6, the combination of Luo and Tran teaches the multi-input power supply circuit according to claim 1, wherein the control circuit is further configured to: control, based on the voltage feedback signals and after a voltage value of an input voltage of a first input interface is within an operating voltage range required by a load, a first input end, corresponding to the first input interface, of the first switch to be connected to the output end of the first switch (see Luo para 0023, 0034-0036, 0040, “the control logic 704 will first check the availability of the AC adaptor” and control the duty cycles of the switches SW1-SWN based on the availability of the input power source. And if the voltage is below the requirements of the output, the switches are controlled to boost the voltage.). Regarding Claim 13, the combination of Luo and Tran teaches the multi-input power supply circuit according to claim 1, but Luo is silent on teaching the input voltage is an alternating-current voltage. However, Tran teaches a multi input power conversion circuitry in which the input power is an alternating current voltage (see Tran para 0030, “three-phase AC power is inputted”) Regarding Claim 14, Luo teaches an electronic device, comprising: a load (see Luo fig 7 “Load 708” and para 0032), and a multi-input power supply circuit comprising: a plurality of input interfaces (see Luo fig 7 “Power source 1-N” and para 0031 “The power management system includes a switch mode power converter 710 with multiple power inputs”), a first switch, wherein an input end of a plurality of input ends of the first switch is respectively connected to a corresponding input interface of the plurality of input interfaces (see Luo fig 7 “SW1-SWN” and para 0030), a power conversion circuit, wherein an output end of the first switch is connected to an input end of the power conversion circuit (see Luo fig 7 “converter 710” and para 0030-0031); a sampling circuit, wherein an input end of a plurality of input ends of the sampling circuit is respectively connected to a corresponding input interface of the plurality of input interfaces (see Luo fig 7 “sensing unit 706” and para 0034), and a control circuit, wherein an output end of the sampling circuit is connected to the control circuit (see Luo fig 7 “control logic 704” and para 0033-0034) Luo is silent on teaching the sampling circuit further comprises at least one resistor configured to provide voltage feedback signals for the control circuit based on voltage values of input voltages of the plurality of input interfaces, and the control circuit is configured to control the first switch based on the voltage feedback signals, wherein the multi-input power supply circuit is connected to a plurality of power supplies and is configured to provide an output voltage for the load by using an input voltage provided by any one of the plurality of power supplies. However, Tran teaches a “measurement device 24” which comprises multiple resistors configured to provide voltage signals to a control circuit based on the voltage values of the input voltages of the plurality of inputs and then control the power conversion based on the voltage feedback signals (see Tran para 0035-0036). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Luo to include the teachings of Tran to use voltage dividers to measure the input voltages thus allowing the control circuit to determine which inputs to use to supply power to a load. Regarding Claim 15, the combination of Luo and Tran teaches the multi-input power supply circuit according to claim 1, wherein the control circuit is further configured to: control, based on the voltage feedback signals and after a voltage value of the input voltage of the first input interface is not within an operating voltage range required by the load, a second input end, corresponding to a second input interface, of the first switch to be connected to the output end of the first switch (see Luo para 0035, based on the load conditions and the input power, a power input can be disabled and rely on one input power.). Regarding Claim 16, the combination of Luo and Tran teaches the multi-input power supply circuit according to claim 1, wherein that the control circuit is further configured to: control, based on the voltage feedback signals and after voltage values of the input voltages of the plurality of input interfaces are not within an operating voltage range required by the load, the plurality of input ends of the first switch to be all disconnected from the output end of the first switch (see Luo para 0025, When the voltage exceeds the requirements of the load, all of the switches disconnects the inputs to lower the output voltage, “When SW0 410 is closed in a second portion of the switching period, both of SW1 402 and SW2 404 are set to open. No power is delivered from the power sources to the load during the second portion of the switching period”). Regarding Claim 18, the combination of Luo and Tran teaches the multi-input power supply circuit according to claim 11, wherein the control circuit is integrated into the direct current conversion circuit and further configured to control the direct current conversion circuit (see Luo fig 7 “Control logic 704” and para 0023-0024, 0033, the control logic receives the input signals from the sensing unit 706 and controls the input switches and the conversion switch SW0). Regarding Claim 19, the combination of Chen and Tran teaches the multi-input power supply circuit according to claim 1, wherein the input voltage is a direct-current voltage (see Chen para 0016 “FIG. 1, shown is a schematic block diagram of a first example multi-input single-output DC-DC converter”). Claim(s) 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Luo (US 2007/0241732 A1) in view of Tran (US 2016/0359424 A1) and in further view of Ahn (US 2025/0183793 A1). Regarding Claim 11, the combination of Luo and Tran teaches the multi-input power supply circuit according to claim 1, wherein the power conversion circuit further comprises a direct current conversion circuit (see Luo para 0016, “the multi-input single-output DC-DC converter is a multi-input single-output buck converter”), but are silent on teaching a power factor correction circuit. However, Ahn teaches a power converter with power factor correction circuitry (see Ahn fig 1 “PFC circuit 30” and para 0060-0061). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Luo and Tran to include the power factor correction circuitry to improve the efficiency of the power conversion when converting AC power taught by Ahn. Regarding Claim 12, the combination of Luo, Tran and Ahn teaches the multi-input power supply circuit according to claim 11, wherein the control circuit controls the power conversion circuitry (see Luo para 0017-0018) and would include the power factor correction circuitry from Ahn. Allowable Subject Matter Claims 3-5, 7-10 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding Claim 3, the prior art of record, together or individually fail to teach voltage sampling circuit with an operational amplifier with the positive and negative electrodes connected to the positive and negative inputs through a plurality of resistors connected in series. Thus Claim 3 is objected as containing allowable subject matter. Regarding claim 4, the prior art of record, together or individually fail to teach a power supply circuit with a sampling circuit with a switch to select an input to collect a voltage value from the inputs. Thus Claim 4 is objected as containing allowable subject matter. Regarding Claim 5, the prior art of record, together or individually fail to teach a power supply circuit with a sampling circuit comprising a plurality of variable resistors connected to each positive and negative input connections and the control circuit. Thus Claim 5 is objected as containing allowable subject matter Regarding Claims 7-10 and 17, the prior art of record, together or individually fail to teach a power supply circuit that can based on the voltages of a multi input interface select to connect one of the inputs to the load, connect both inputs in series to the load, or disconnect all the inputs from the load. Thus Claims 7-10 and 17 are objected as containing allowable subject matter. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSHUA J SWEET whose telephone number is (571)272-6776. The examiner can normally be reached Monday-Friday 7:30 - 4:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rexford Barnie can be reached at (571) 272-7492. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSHUA JAMES SWEET/ Examiner, Art Unit 2836 /REXFORD N BARNIE/Supervisory Patent Examiner, Art Unit 2836
Read full office action

Prosecution Timeline

Mar 24, 2025
Application Filed
Aug 12, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
99%
With Interview (+30.8%)
2y 3m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 16 resolved cases by this examiner. Grant probability derived from career allowance rate.

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