Prosecution Insights
Last updated: October 25, 2026
Application No. 19/089,439

MULTILAYER CERAMIC ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING SAME, AS WELL AS CIRCUIT MODULE, AND ELECTRONIC DEVICE

Non-Final OA §102
Filed
Mar 25, 2025
Priority
Mar 29, 2024 — JP 2024-056491
Examiner
FERGUSON, DION
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiyo Yuden Co., Ltd.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
893 granted / 1028 resolved
+18.9% vs TC avg
Moderate +8% lift
Without
With
+8.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
27 currently pending
Career history
1059
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
51.0%
+11.0% vs TC avg
§102
29.5%
-10.5% vs TC avg
§112
7.8%
-32.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1028 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 6, 7, 10, and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kitamura (US Pat. App. Pub. No. 2023/0298816). With respect to claim 1, Kitamura discloses a multilayer ceramic electronic component (see abstract), comprising: an element body having multiple dielectric layers laminated along a first axis and multiple internal electrode layers respectively placed along the first axis between adjacent pairs of the dielectric layers (see FIG. 2, elements 11 and 12, and paragraph [0029]); and a pair of external electrodes provided on surfaces of the element body and electrically connected to the internal electrode layers (see FIG. 2, elements 20a/20b, and paragraph [0029]); wherein, the dielectric layers contain a compound expressed by a general formula ABO3-a(O<a<1) (see paragraph [0031]) and having a perovskite structure wherein A and B represent an A-site element and a B-site element, respectively, of the perovskite structure (see paragraph [0031]); the internal electrode layers contain a first phase containing nickel and copper (see paragraph [0033], noting Ni as a main component and Cu as an additive), as well as a co-existent material (see paragraph [0033]), and have, at interfaces between the first phase and particles of the co- existent material, first segregation parts where copper has segregated (see paragraph [0043]); a concentration of copper in the first segregation parts is higher than a concentration of copper in the first phase (see paragraph [0043], noting that additional metal additive (i.e., Cu) segregates around the co-material grains, and thus, would be at an increased concentration when compared to the first phase); and the external electrodes contain nickel (see paragraph [0034]). With respect to claim 6, Kitamura discloses that the external electrodes contain copper. See paragraph [0034], noting that the external electrodes contain the same metal additive as the internal electrodes (i.e., Cu). With respect to claim 7, Kitamura discloses that the external electrodes contain a co-existent material. See paragraph [0034], noting that the external electrodes contain a co-material of ceramic grains. With respect to claim 10, Kitamura discloses a circuit module comprising the multilayer ceramic electronic component according to claim 1. See paragraph [0003]. With respect to claim 11, Kitamura discloses an electronic device having the circuit module according to claim 10. See paragraph [0003]. Allowable Subject Matter Claims 8 and 9 are allowed. The following is an examiner’s statement of reasons for allowance: with respect to claim 8, the prior art fails to teach, or fairly suggest, the two stage heating operations after the application of the external electrode paste, when taken in conjunction with the remaining limitations of claim 8. Claim 9 is allowed by virtue of their dependency from claim 8. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Claims 2-5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the prior art fails to teach or suggest the details recited in claims 2-5, when taken in conjunction with the limitations of base claim 1. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. JP 2016102040 and CN 1744244 each disclose internal electrodes having segregation phases, but fail to teach the phases recited in claim 1. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DION R FERGUSON whose telephone number is (571)270-7566. The examiner can normally be reached Monday-Friday, 5:30 a.m. - 4:00 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole, can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DION R. FERGUSON/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Mar 25, 2025
Application Filed
Oct 15, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Patent 12770801
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Patent 12770786
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
95%
With Interview (+8.4%)
2y 1m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1028 resolved cases by this examiner. Grant probability derived from career allowance rate.

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