Prosecution Insights
Last updated: August 17, 2026
Application No. 19/089,965

ELECTRONIC DISPLAY PIPELINE POWER MANAGEMENT SYSTEMS AND METHODS

Non-Final OA §102§103§DOUBLEPATENT
Filed
Mar 25, 2025
Priority
Sep 15, 2020 — provisional 63/078,875 +2 more
Examiner
SIDDIQUI, MD SAIFUL A
Art Unit
2626
Tech Center
2600 — Communications
Assignee
Apple Inc.
OA Round
2 (Non-Final)
79%
Grant Probability
Favorable
2-3
OA Rounds
9m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
622 granted / 784 resolved
+17.3% vs TC avg
Strong +16% interview lift
Without
With
+15.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
26 currently pending
Career history
817
Total Applications
across all art units

Statute-Specific Performance

§101
2.8%
-37.2% vs TC avg
§103
60.0%
+20.0% vs TC avg
§102
14.5%
-25.5% vs TC avg
§112
13.4%
-26.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 784 resolved cases

Office Action

§102 §103 §DOUBLEPATENT
Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Status 2. Amendment of the continuation application filed on May 13, 2026, has been received and made of record. In response to Non-Final Office Action mailed on February 13, 2026, claims 1, 3-5, 8-11, 14-16, 18, and 20 are amended of which claims 1, 11, and 15 are independent claims. Applicant cancelled dependent claim 13 and maintained claims 6-7, 12, 17 and 19. Claim 21 has been added as new claim after the Non-Final Office Action. Therefore, claims 1-12 and 14-21 are pending for consideration. Response to Arguments 3. Applicant's arguments in "REMARKS" filed on May 13, 2026, with respect to independent claims 1, 11, and 15 have been considered but are moot in view of new ground of rejection as necessitated by the applicant's amendment. Claim Objections 4. Claim 14 is objected to because of the following informalities: claim 14 depends on cancelled claim 13. Appropriate correction is required. Double Patenting 5. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-isclaimer. 6. Claims 1-12, 14-16, and 18-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-20 of US Patent No. US 12,271,250 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because except for minor wording and insignificant change in terminology, each and every limitation of claims 1-20 of US published Patent No. US 12,271,250 B2 reads the corresponding limitations of claims 1-12, 14-16, and 18-21 of the current application No. 19/089,965. Both the current application No. 19/089,965 and the published patent No. US 12,271,250 B2 claimed an electronic device having display panel operating in two power modes using two power rails. Comparison of claims 1-12, 14-16 and 18-21 of the current application and claims 1-20 of the US published Patent No. 12,271,250 B2 is given below: - Patent Application No. 19/089,965 US Patent No. US 12,271,250 B2 Claim 1: Display circuitry, comprising: a display panel; a first power supply; and a switch configured to: couple the display panel to a first power rail supplied from the first power supply while the switch is in a first state; and couple the display panel to a second power rail supplied from a second power supply separate from the display circuitry while the switch is in a second state. Claim 2: The display circuitry of claim 1, comprising a register coupled to the switch, wherein the register is configured to store data configured to cause the switch to operate in the first state or the second state(it is obvious to one of ordinary skill in the art to have memory to save the first state and the second state). Claim 3: The display circuitry of claim 2, wherein the data is generated by a system controller based on an image source being configured to consume a first amount of power associated with the first state, and wherein the data causes the switch to operate in the first state. Claim 4: The display circuitry of claim 2, wherein the data is associated with whether an image source is configured to consume a first amount of power associated with the first state or a second amount of power associated with the second state, and wherein the data causes the switch to operate in the first state or second state respectively. Claim 5: The display circuitry of claim 4, wherein the second amount of power consumed is greater than the first amount of power, wherein the second power rail is configured to couple the second power supply, and wherein the first power rail is configured to couple to the first power supply and bypass the second power supply. Claim 6: The display circuitry of claim 1, wherein the first state causes the switch to couple the display panel to the first power rail and to decouple the display panel from the second power rail. Claim 7: The display circuitry of claim 1, wherein the second state causes the switch to couple the display panel to the second power rail and to decouple the display panel from the first power rail. Claim 20: The circuitry of claim 15, wherein the switch comprises a multiplexer and the second power supply is a power management integrated circuit. Claim 21: The display circuitry of claim 1, wherein the second power supply comprises a power management integrated circuit. Claim 1: An electronic device, comprising: a power management integrated circuit; a display power supply that bypasses the power management integrated circuit; a first power rail coupled to the power management integrated circuit and a switch operable based on an indication from an image source, from a controller of a display pipeline, or both, to proceed with operating in a medium power operational mode; a second power rail coupled to the display power supply and the switch; and a display driver integrated circuit of a display panel coupled to the switch, wherein the display driver integrated circuit is configured to: at a first time, receive power from the power management integrated circuit via the first power rail; and at a second time, receive power from the display power supply via the second power rail in the medium power operational mode, wherein the image source is powered down based on the indication. Claim 2: The electronic device of claim 1, comprising a system controller configured to: transmit, based on content of a first image frame satisfying a first condition, a first control signal to the switch at the first time to operate the switch to couple the display panel to the first power rail; and transmit, based on content of a second image frame satisfying a second condition, a second control signal to the switch at the second time to operate the switch to couple the display panel to the second power rail. Claim 6: The electronic device of claim 1, wherein the display power supply is configured to consume an amount of power less than the power management integrated circuit. It is obvious to have a multiplexer whenever first power rail and second power rail are connected to display at two different conditions. Claim 8 corresponds to part of claim 1 and claim 6 of US patent No. US 12,271,250 B2; Claim 9 corresponds to part of claim 1 and claim 2 of US patent No. US 12,271,250 B2; Claim 10 corresponds to part of claims 1 and 2 of US patent No. US 12,271,250 B2; Claim 11 corresponds to part of claims 2 and 6 of US patent No. US 12,271,250 B2; Claim 12 corresponds to part of claims 2 and 9 of US patent No. US 12,271,250 B2; Claim 14 corresponds to part of claim 10 of US patent No. US 12,271,250 B2; Claim 15 corresponds to part of claim 1 of US patent No. US 12,271,250 B2; Claim 16 corresponds to part of claim 5 of US patent No. US 12,271,250 B2; Claim 18 corresponds to part of claim 10 of US patent No. US 12,271,250 B2; and Claim 19 corresponds to part of claim 10 of US patent No. US 12,271,250 B2. 7. Claim 17 is rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. US 12,271,250 B2 in view of KANG et al.(US 2022/0051599 A1) (herein after KANG). Regarding claim 17, claims of US published patent No. US 12,271,250 B2 is not found to recite the claim limitations, “the circuitry of claim 15, wherein the register is configured to control the switch based on a refresh rate of a display panel being less than 60 hertz”. However, KANG teaches a device for driving display panel, wherein the register(timing controller 33, fig.3, Para-54) is configured to control the switch based on a refresh rate of a display panel being less than 60 hertz(Para-3, 38-39). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filling date of the claimed invention, to have modified claims 1-20 of U.S. Patent No. US 12,271,250 B2 with the teaching of KANG to include the feature in order to provide a display device that enables switching an image refresh rate of the display panel from 60 Hz to 40 Hz, to achieve purpose of effectively reducing power consumption of display, and adjusting the display panel by display panel adjustment according to pixel driving voltage to change operating current of each pixel. 8. Claims 1-12, 15-16, and 20-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-20 of US Patent No. US 11,614,791 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because except for minor wording and insignificant change in terminology, each and every limitation of claims 1-20 of US published Patent No. US 11,614,791 B2 reads the corresponding limitations of claims 1-12, 15-16, and 20-21 of the current application No. 19/089,965. Both the current application No. 19/089,965 and the published patent No. US 11,614,791 B2 claimed display device operating in two power modes using two power rails. Comparison of claims 1-12, 15-16 and 20-21 of the current application and claims 1-20 of the US published Patent No. 11,614,791 B2 is given below: - Claims 1 and 15 correspond to part of claim 5 of US patent No. US 11,614,791 B2; Claim 2 corresponds to part of claim 2 of US patent No. US 11,614,791 B2; Claim 3 corresponds to part of claim 9 of US patent No. US 11,614,791 B2; Claim 4 corresponds to part of claims 1 and 8 of US patent No. US 11,614,791 B2; Claim 5 corresponds to part of claim 2 of US patent No. US 11,614,791 B2; Claims 6 and 7 correspond to part of claim 5 of US patent No. US 11,614,791 B2; Claim 8 corresponds to part of claim 8 of US patent No. US 11,614,791 B2; Claim 9 corresponds to part of claims 5 and 8 of US patent No. US 11,614,791 B2. Claim 10 corresponds to part of claim 5 of US patent No. US 11,614,791 B2; Claim 11 corresponds to part of claims 2 and 11 of US patent No. US 11,614,791 B2. Claim 12 corresponds to part of claim 10 of US patent No. US 11,614,791 B2; Claim 16 corresponds to part of claims 6-7 of US patent No. US 11,614,791 B2; Claim 20 corresponds to obvious of US patent No. US 11,614,791 B2(It is obvious to have a multiplexer whenever first power rail and second power rail are connected to display at two different conditions); and Claim 21 corresponds to part of claims 1 of US patent No. US 11,614,791 B2; Claim Rejections - 35 USC § 102 9. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 10. Claims 1, 6-12, and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park(US 2016/0189608 A1). Regarding claim 1, Park teaches a display circuitry(figs.1-2, 4-5, and related texts), comprising: a display panel(display panel 100, fig.1, Para-27); a first power supply(driving power generation unit 141, charge pump VLOUT1, DDVDH auxiliary power generating unit 143, fig.5, Para-63, 64); and a switch(auxiliary power output unit 145, fig.5, Para 50-52) configured to: couple the display panel(150) to a first power rail(DDVDHP’, fig.4(b)) supplied from the first power supply(143, data driver 140, fig.5, Para-50) while the switch is in a first state (Para-51: the auxiliary power output unit 145 included in the data driver of the experimental example includes a thin film transistor (TFT) and a diode. The TFT is turned on or off in response to an auxiliary power output signal(PSM On/Off) output from the auxiliary power generating unit 143. When the TFT is turned on, the display panel 150 receives the auxiliary power DDVDHP′); and couple the display panel(150) to a second power rail(power supply unit 180, figs.1,4-5, and related text) supplied from the second power supply separate from the display circuitry (figs.1, 5) while the switch is in a second state(fig.4(a), Para-45: the power supply unit 180 is activated(turned on) in response to the power control signal PCS and outputs a first power VDDEL. As a result, the display panel 150 is driven on the basis of the first power VDDEL output from the power supply unit 180; also fig.5, and related text). PNG media_image1.png 157 250 media_image1.png Greyscale PNG media_image2.png 157 249 media_image2.png Greyscale Regarding claim 6, Park teaches the display circuitry of claim 1, wherein the first state causes the switch to couple the display panel to the first power rail and to decouple the display panel from the second power rail(figs.4(a)&4(b)). Regarding claim 7, Park teaches the display circuitry of claim 1, wherein the second state causes the switch to couple the display panel to the second power rail and to decouple the display panel from the first power rail(figs.4(a)&4(b)). Regarding claim 8, Park teaches the display circuitry of claim 1, wherein the switch is configured to be operated between the first state and the second state based on an amount of power to be delivered to an image source(Para-38: the display device described above displays a specific image as the display panel 150 emits light on the basis of the power VDDEL and VSSEL output from the power supply unit 180 and the scan signal and the data signal DATA respectively output from the scan driver 130 and the data driver 140). Regarding claim 9, Park teaches the display circuitry of claim 1, wherein the switch comprises a multiplexer coupled to the first power supply via the first power rail and coupled to the second power supply via the second power rail(figs.4(a)-(b)& 5, Para 45-47). Regarding claim 10, Park teaches the display circuitry of claim 9, wherein the multiplexer(auxiliary power output unit 145, fig.5, Para 50-52) is configured to decouple the first power rail(figs.4(a)-(b)&5, Para 45-47) from the display panel (150) while the second power rail(figs.4(a)-(b)&5, Para 45-47) is coupled to the display panel(150)(claim does not recite directly couple to display panel. In an electrical circuit, all components are electrically couple to one another to make the device and/or circuit functional). Regarding claim 11, Park teaches a non-transitory, tangible, computer-readable medium(inherent to have non-transitory computer-readable medium), comprising computer-readable instructions that, when executed by one or more processors (timing controller 120, fig.1, Para-34), cause an electronic device(organic light emitting display device) to: receive a first signal(Para-33) from an image source(image supply unit 110, fig.1, Para-27), a system controller, or both; operate a switch(auxiliary power output unit 145, fig.5, Para 50-52) located within an electronic display(data driver 140, fig.5) based on the first signal to switch a power supply rail from a first power rail supplied from a first power supply internal to the electronic display to a second power rail supplied from a second power supply external to the electronic display (Para-38: the display device described above displays a specific image as the display panel 150 emits light on the basis of the power VDDEL and VSSEL output from the power supply unit 180 and the scan signal and the data signal DATA respectively output from the scan driver 130 and the data driver 140); and send image data to a first pixel based on receiving power from the second power rail(Para-38) wherein a power consumed in sending the image data when coupled to the second power rail(VDDEL, PMIC) is greater than a power consumed in sending the image data when coupled to the first power rail(VDDHP’) (Para-47). Regarding claim 12, Park teaches the non-transitory, tangible, computer-readable medium of claim 11, comprising computer-readable instructions that, when executed by the one or more processors(timing controller 120, fig.1), cause the electronic device to operate the switch to decouple from at least a portion of the first power rail and couple to at least a portion of the second power rail(figs.4(a)-(b)&5, Para 45-47). Regarding claim 21, Park teaches the display circuitry of claim 1, wherein the second power supply(180) comprises a power management integrated circuit(PMIC, fig.5, Para-49). Claim Rejections - 35 USC § 103 11. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 12. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 13. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 14. Claims 2, 15, and 20 are rejected under 35 are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2016/0189608 A1) in view of SHEN et al.(US 2018/0366057 A1)(herein after SHEN). Regarding claim 2, Park is not found to teach expressly the display circuitry of claim 1, comprising a register coupled to the switch, wherein the register is configured to store data configured to cause the switch to operate in the first state or the second state. However, SHEN teaches a device with information displayed in power-off mode, comprising a register(Para-23: the activation of the backup PMU 150 may be controlled by the user. For example, the user may use a hardware or software control(s) or a combination thereof to activate the backup PMU 150) coupled to the switch (processing unit 110, fig.1), wherein the register is configured to store data configured to cause the switch to operate in the first state or the second state(Para-46: a machine readable medium may be any tangible medium that may contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device). The prior art, as embodied in the teachings of Park and SHEN, included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference. One of ordinary skill in the art could have combined the elements as claimed by known methods and in that combination each element merely performs the same function as it does separately. Such combination is desirable as it provides a portable device having a power source, a display and a buffer provided in communication with the display, and hence enhances the operational efficiency of the portable device. Claim 15 is rejected for the same reason as mentioned in the rejection of claims 1 and 2, since claim 15 recites the same limitations partially in claims 1 and 2. Regarding claim 20, Park as modified by SHEN teaches the circuitry of claim 15, wherein the switch comprises a multiplexer(auxiliary power output unit 145, fig.5, Para-51) and the second power supply is a power management integrated circuit(PMIC, fig.5, Para-49, Park). 15. Claims 3-5 are rejected under 35 are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2016/0189608 A1) in view of SHEN et al.(US 2018/0366057 A1) and further in view of Hsiao et al.(US 2011/0175878 A1)(herein after Hsiao). Regarding claim 3, Park as modified by SHEN is not found to teach expressly the display circuitry of claim 2, wherein the data is generated by a system controller based on an image source being configured to consume a first amount of power associated with the first state, and wherein the data causes the switch to operate in the first state. However, Hsiao teaches a display apparatus, wherein the data is generated by a system controller based on an image source (static image or dynamic image, S301 and S307, fig.3) being configured to consume a first amount of power associated with the first state(Para-48, 50), and wherein the data causes the switch to operate in the first state(Para-38). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filling date of the claimed invention, to have modified Park further with the teaching of Hsiao to include the feature in order to provide a display apparatus capable of overcoming problem of frame flickering due to brightness variation. Regarding claim 4, Park as modified by SHEN and Hsiao teaches the display circuitry of claim 2, wherein the data is associated with whether an image source is configured to consume a first amount of power associated with the first state or a second amount of power associated with the second state, wherein the data causes the switch to operate in the first state or the second state, respectively(Para-38, 48, 50, Hsiao) (for motivation, see the rejection of claim 3 above). Regarding claim 5, Park as modified by SHEN and Hsiao teaches the display circuitry of claim 4, wherein the second amount of power(VDDEL, PMIC) consumed is greater than the first amount of power(DDVDHP’)(Para-47, Park), wherein the second power rail configured to couple to the second power supply(figs.4(a)-(b)&5, Park), and wherein the first power rail is configured to couple to the first power supply(figs.4(a)-(b)&5, Park) and bypass the second power supply(Para 45-47, Park). 16. Claim 14 is rejected under 35 are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2016/0189608 A1) in view of KANG et al.(US 2022/0051599 A1) (herein after KANG). Regarding claim 14, Park is not found to teach expressly the non-transitory, tangible, computer-readable medium of claim 11, comprising computer-readable instructions that, when executed by the one or more processors, cause the electronic device to operate the switch based on the first signal being associated with a change in a refresh rate of image content. However, KANG teaches a method and a device for driving display panel, wherein, when executed by the one or more processors, cause the electronic device to operate the switch based on the first signal being associated with a change in a refresh rate of image content(Para-23, 41). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filling date of the claimed invention, to have modified Park with the teaching of KANG to include the feature in order to eliminate flicker noise thus improving image quality. 17. Claim 16 is rejected under 35 are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2016/0189608 A1) in view of SHEN et al.(US 2018/0366057 A1) and further in view of HUANG et al.(WO 2020/168949 A1)(herein after HUANG). Regarding claim 16, Park as modified by SHEN teaches the circuitry of claim 15, comprising a register to control the switch to switch between coupling the second input coupled to a power management integrated circuit to the output and between coupling the first input coupled to a display power supply to the output(Para-23, 46, SHEN) but fails to teach expressly a system-on-chip configured to write data to the register to control the switch to switch between two phases. However, HUANG teaches a display driving circuitry, comprising a system-on-chip(chip-based load switch) configured to write data to the register(memory)(Para-61: data storage area can store data created according to the use of the terminal device) to control the switch to switch between coupling the second input coupled to a power management integrated circuit(PMIC, fig.2) to the output and between coupling the first input coupled to a display power supply(DDIC, fig.2, Para-45) to the output. Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filling date of the claimed invention, to have modified Park further with the teaching of HUANG to include the feature in order to improve driving ability of the DDIC circuit during normal display mode. 18. Claim 17 is rejected under 35 are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2016/0189608 A1) in view of SHEN et al.(US 2018/0366057 A1) and further in view of KANG et al. (US 2022/0051599 A1) (herein after KANG). Regarding claim 17, Park as modified by SHEN is not found to teach expressly the circuitry of claim 15, wherein the register is configured to control the switch based on a refresh rate of a display panel being less than 60 hertz. However, KANG teaches a method and a device for driving display panel, wherein the register(database unit) is configured to control the switch based on a refresh rate of a display panel being less than 60 hertz(Para-46). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filling date of the claimed invention, to have modified Park further with the teaching of KANG to include the feature in order to eliminate flicker noise thus improving image quality. 19. Claim 18 is rejected under 35 are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2016/0189608 A1) in view of SHEN et al.(US 2018/0366057 A1) and further in view of HUSSAIN et al.(US 2021/0407456 A1) (herein after HUSSAIN). Regarding claim 18, Park as modified by SHEN is not found to teach expressly the circuitry of claim 15, wherein the register is configured to control the switch to connect to the first input or the second input based on incoming image data corresponding to a prerendered entire image frame update associated with the first input or the second input, respectively. However, HUSSAIN teaches a system for accelerated frame transmission, wherein the register(memory 150, fig.1) is configured to control the switch to connect to the first input or the second input based on incoming image data corresponding to a prerendered entire image frame update associated with the first input or the second input, respectively (Para-19, 42-43). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filling date of the claimed invention, to have modified Park further with the teaching of HUSSAIN to include the feature in order to update the image at a display panel based on the received data in an efficient manner. 20. Claim 19 is rejected under 35 are rejected under 35 U.S.C. 103 as being unpatentable over Park(US 2016/0189608 A1) in view of SHEN et al.(US 2018/0366057 A1) and further in view of LEE(US 2019/0311678 A1). Regarding claim 19, Park as modified by SHEN is not found to teach expressly the circuitry of claim 15, wherein the register is configured to control the switch based on incoming image data having a brightness value that meets a condition of a first display brightness value being less than or equal to half of a second display brightness value. However, LEE teaches a display device and driving method, wherein the register is configured to control the switch based on incoming image data having a brightness value that meets a condition of a first display brightness value being less than or equal to half of a second display brightness value (Para-62, 69-72). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filling date of the claimed invention, to have modified Park further with the teaching of LEE to include the feature in order to enhance visibility corresponding to change in external light and luminance of display mode by driving DC-DC converter such that the visibility of a display image in a high-illuminance environment is increased. Conclusion 21. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Examiner Note 22. The Examiner cites particular figures, paragraphs, columns and line numbers in the references, as applied to the claims above. Although the particular citations are representative teachings and are applied to specific limitations within the claims, other passages, internally cited references, and figures may also apply. In preparing a response, it is respectfully requested that the Applicants fully consider the references, in their entirety, as potentially disclosing or teaching all or part of the claimed invention, as well as fully consider the context of the passage as taught by the references or as disclosed by the Examiner. Contact Any inquiry concerning this communication or earlier communications from the examiner should be directed to MD SAIFUL A SIDDIQUI whose telephone number is (571)270-1530. The examiner can normally be reached Mon-Fri: 9:00AM - 5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae, can be reached on (571)272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MD SAIFUL A SIDDIQUI/Primary Examiner, Art Unit 2626
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Prosecution Timeline

Show 1 earlier event
Dec 02, 2025
Response after Non-Final Action
Feb 13, 2026
Non-Final Rejection mailed — §102, §103, §DOUBLEPATENT
Apr 06, 2026
Interview Requested
May 06, 2026
Applicant Interview (Telephonic)
May 06, 2026
Examiner Interview Summary
May 13, 2026
Response Filed
Jun 03, 2026
Final Rejection mailed — §102, §103, §DOUBLEPATENT
Aug 03, 2026
Response after Non-Final Action

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12699184
FMCW LIDAR LASER SYSTEM AND OPERATING METHOD FOR SUCH A LASER SYSTEM
3y 11m to grant Granted Aug 04, 2026
Patent 12693421
SYSTEMS AND METHODS FOR CONVOLUTIONAL HIGH RESOLUTION LIDAR IMAGING
3y 11m to grant Granted Jul 28, 2026
Patent 12693418
USE OF LIDAR FOR INTELLIGENT SPACE MANAGEMENT
3y 10m to grant Granted Jul 28, 2026
Patent 12693414
DOUBLE-END LASER RANGEFINDER
3y 2m to grant Granted Jul 28, 2026
Patent 12682535
SYSTEM AND METHOD FOR AUTHORING CONTEXT-AWARE AUGMENTED REALITY INSTRUCTION THROUGH GENERATIVE ARTIFICIAL INTELLIGENCE
1y 5m to grant Granted Jul 14, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
79%
Grant Probability
95%
With Interview (+15.8%)
2y 1m (~9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 784 resolved cases by this examiner. Grant probability derived from career allowance rate.

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