DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings received on 04/29/2025 have been accepted by the examiner.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
Acknowledgment is made of applicant's Information Disclosure Statement (IDS) Form PTO-1449, filed 05/06/2025 & 12/01/2025. The information disclosed therein was considered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 102a(1) as being anticipated by Hu et al (US20200066331).
Regarding claim 1, Hu discloses a method(FIG 2-3 discloses a method), comprising: obtaining target information of a rank(FIG 2; ranks 0-1 targeting ranks), wherein the target information indicates a quantity of commands or traffic of the rank (Step 301 and 302 discloses receive access request and determining is a quantity of target ranks in the receive access requests less than a first threshold e.g., command e.g., access traffic [0013]); determining a memory refresh mode of the rank from a plurality of memory refresh modes based on the target information(Step 302 S304 S306 S308 determining which refresh mode to be used based on target information of rank in S302 and 304 from plurality of memory refresh mode e.g., first and second refresh modes), wherein power consumption of the rank varies in the plurality of memory refresh modes(FIG 3; [0078]; Step 306, 308, 310 312 e.g., rank increases refresh power consumption of memory system 100 e.g., when access is higher than Vt); and refreshing the rank according to the memory refresh mode (S310 e.g., refresh rank in the memory according to the first refresh request based on 306).
Regarding claim 2, Hu discloses wherein the quantity of commands comprises at least one of a first quantity of commands at an entry of a memory controller (FIG 2-3; [0056] S 302 access commands e.g., 106 receiving the commands sent by 104 e.g., entry of 106), a second quantity of commands in a queue in the memory controller(S302), or a third quantity of commands on a memory interface(FIG 1; command on 102).
Regarding claim 3, Hu discloses wherein the plurality of memory refresh modes comprises a first memory refresh mode and a second memory refresh mode(FIG 3;S308 S306), and wherein the method further comprises determining the memory refresh mode by determining, based on the target information(Step 302 304 306, 308), that the memory refresh mode of the rank is the first memory refresh mode or the second memory refresh mode(S 302 S308 S302 S306).
Regarding claim 4, Hu discloses wherein a first power consumption of the rank in the first memory refresh mode is higher than a second power consumption of the rank in the second memory refresh mode(FIG 3; e.g., when in S302 when the access request found greater S308 power consumption is higher than S306 when access requests is less than first Vt), and determining that the memory refresh mode is the first memory refresh mode or the second memory refresh mode comprises: determining, when the quantity of commands of the rank is greater than a first quantity threshold or the traffic is greater than a first traffic threshold(S302 and S308), that the memory refresh mode is the first memory refresh mode; and determining, when the quantity of commands of the rank is less than the first quantity threshold or the traffic is less than the first traffic threshold, determining that the memory refresh mode is the second memory refresh mode (S302 and S306).
Regarding claim 5, Hu discloses wherein a first performance of the rank in the first memory refresh mode is higher than a second performance of the rank in the second memory refresh mode (FIG 3; e.g., when in S302 when the access request found greater S308 first performance is higher than S306 when access requests is less than first Vt e.g., second performance).
Regarding claim 6, Hu discloses wherein the plurality of memory refresh modes comprises a first memory refresh mode, a second memory refresh mode, and a third memory refresh mode, and wherein the method further comprises determining the memory refresh mode by further determining, based on the target information, that the memory refresh mode of the rank is the first memory refresh mode, the second memory refresh mode, or the third memory refresh mode (FIG 2-3; [0041] discloses refresh operations based on 1X mode, 2X mode 4X mode and so on e.g., multiple refresh modes more than S308 and S306 ).
Regarding claim 7, Hu discloses wherein a first power consumption of the rank in the first memory refresh mode is higher than a second power consumption of the rank in the second memory refresh mode, wherein the second power consumption of the rank in the second memory refresh mode is higher than a third power consumption of the rank in the third memory refresh mode (FIG 3; e.g., when in S302 when the access request found greater S308 power consumption is higher than S306 when access requests is less than first Vt and so third refresh operation explained in claim 6), and wherein the determining that the memory refresh mode is the first memory refresh mode, the second memory refresh mode, or the third memory refresh mode comprises: determining when the quantity of commands of the rank is greater than a first quantity threshold or the traffic is greater than a first traffic threshold, that the memory refresh mode of is the first memory refresh mode; determining when the quantity of commands of the rank is less than the first quantity threshold and greater than a second quantity threshold, that the memory refresh mode of is the second memory refresh mode; determining, when the traffic of the rank is less than the first traffic threshold and greater than a second traffic threshold, determining that the memory refresh mode is the second memory refresh mode; and determining, when the quantity of commands of the rank is less than the second quantity threshold or the traffic is less than the second traffic threshold, that the memory refresh mode is the third memory refresh mode (S302 S308 and S302 S306 and so on according to multi refresh operations see claim 6).
Regarding claim 8, Hu discloses wherein a first performance of the rank in the first memory refresh mode is higher than a second performance of the rank in the second memory refresh mode, and wherein the second performance of the rank in the second performance of the rank in the second memory refresh mode is higher than a third performance of the rank in the third memory refresh mode (FIG 3; e.g., when in S302 when the access request found greater S308 first performance is higher than S306 when access requests is less than first Vt e.g., second performance and so on please see claim 6 for plurality refresh operations mode explanation).
Regarding claim 9, Hu discloses an apparatus comprising(FIG 1-3; 100), comprising: a transceiver configured to obtain target information of a rank(FIG 2; 102 targeting ranks 0-1 targeting ranks information), wherein the target information indicates a quantity of commands or traffic of the rank (FIG 3; Step 301 and 302 discloses receive access request and determining is a quantity of target ranks in the receive access requests less than a first threshold e.g., command e.g., access traffic [0013]); and at least one processor coupled to the transceiver and configured to(104 coupled to 102): determine a memory refresh mode of the rank from a plurality of memory refresh modes and based on the target information(FIG 3;Step 302 S304 S306 S308 determining which refresh mode to be used based on target information of rank in S302 and 304 from plurality of memory refresh mode e.g., first and second refresh modes), wherein power consumption of the rank varies in the plurality of memory refresh modes(FIG 3; [0078]; Step 306, 308, 310 312 e.g., rank increases refresh power consumption of memory system 100 e.g., when access is higher than Vt); and refresh the rank according to the memory refresh mode(S310 e.g., refresh rank in the memory according to the first refresh request based on 306).
Regarding claim 10, Hu discloses wherein the quantity of commands comprises at least one of a first quantity of commands at an entry of a memory controller (FIG 2-3; [0056] S 302 access commands e.g., 106 receiving the commands sent by 104 e.g., entry of 106), a second quantity of commands in a queue in the memory controller(S302), or a third quantity of commands on a memory interface (FIG 1; command on 102).
Regarding claim 11, Hu discloses wherein the plurality of memory refresh modes comprises a first memory refresh mode and a second memory refresh mode(FIG 3;S308 S306), and the at least one processor further configured to further comprises determine the memory refresh mode by determining, based on the target information, that the memory refresh is the first memory refresh mode or the second memory fresh mode (Step 302 308, 302 306),
Regarding claim 12, Hu discloses wherein a first power consumption of the rank in the first memory refresh mode is higher than a second power consumption of the rank in the second memory refresh mode (FIG 3; e.g., when in S302 when the access request found greater S308 power consumption is higher than S306 when access requests is less than first Vt), and at least one processor is further configured to further determine that the memory refresh mode is the first memory refresh mode or the second memory refresh mode comprises(S308 S306): determining, when the quantity of commands of the rank is greater than a first quantity threshold or the traffic is greater than a first traffic threshold(S302 and S308), that the memory refresh mode is the first memory refresh mode; and determining, when the quantity of commands of the rank is less than the first quantity threshold or the traffic is less than the first traffic threshold, determining that the memory refresh mode is the second memory refresh mode (S302 and S306).
Regarding claim 13, Hu discloses wherein a first performance of the rank in the first memory refresh mode is higher than a second performance of the rank in the second memory refresh mode (FIG 3; e.g., when in S302 when the access request found greater S308 first performance is higher than S306 when access requests is less than first Vt e.g., second performance).
Regarding claim 14, Hu discloses wherein the plurality of memory refresh modes comprises a first memory refresh mode, a second memory refresh mode, and a third memory refresh mode, and wherein at least one processor is further configured to determine, based on the target information, that the memory refresh mode of the rank is the first memory refresh mode, the second memory refresh mode, or the third memory refresh mode (FIG 2-3; [0041] discloses refresh operations based on 1X mode, 2X mode 4X mode and so on e.g., multiple refresh modes more than S308 and S306 ).
Regarding claim 15, Hu discloses wherein a first power consumption of the rank in the first memory refresh mode is higher than a second power consumption of the rank in the second memory refresh mode, wherein the second power consumption of the rank in the second memory refresh mode is higher than a third power consumption of the rank in the third memory refresh mode (FIG 3; e.g., when in S302 when the access request found greater S308 power consumption is higher than S306 when access requests is less than first Vt and so third refresh operation explained in claim 14), and wherein the at least one processor is further configured to determine, when the quantity of commands of the rank is greater than a first quantity threshold or the traffic is greater than a first traffic threshold, that the memory refresh mode of is the first memory refresh mode; determine when the quantity of commands of the rank is less than the first quantity threshold and greater than a second quantity threshold, that the memory refresh mode of is the second memory refresh mode; determine, when the traffic of the rank is less than the first traffic threshold and greater than a second traffic threshold, determining that the memory refresh mode is the second memory refresh mode; and determine, when the quantity of commands of the rank is less than the second quantity threshold or the traffic is less than the second traffic threshold, that the memory refresh mode is the third memory refresh mode (S302 S308 and S302 S306 and so on according to multi refresh operations see claim 14).
Regarding claim 16, Hu discloses wherein a first performance of the rank in the first memory refresh mode is higher than a second performance of the rank in the second memory refresh mode, and wherein the second performance of the rank in the second memory refresh mode is higher than a third performance of the rank in the third memory refresh mode (FIG 3; e.g., when in S302 when the access request found greater S308 first performance is higher than S306 when access requests is less than first Vt e.g., second performance and so on please see claim 14 for plurality refresh operations mode explanation).
Regarding claim 17, Hu discloses a computer program product comprising computer-executable instructions that are stored on a non-transitory computer-readable storage medium and that(FIG 1; 100), when executed by at least one processor of a computer, cause the computer to a memory refresh apparatus, comprising at least one processor and a storage(FIG 1; 102, 104, 106 , and 110) wherein the at least one processor executes a program or instructions stored in the storage, so that the memory refresh apparatus implements the following method: obtain target information of a rank k(FIG 2; ranks 0-1 targeting ranks), wherein the target information indicates a quantity of commands or traffic of the rank(FIG 3; Step 301 and 302 discloses receive access request and determining is a quantity of target ranks in the receive access requests less than a first threshold e.g., command e.g., access traffic [0013]); and determine a memory refresh mode of the rank from a plurality of memory refresh modes and based on the target information(Step 302 S304 S306 S308 determining which refresh mode to be used based on target information of rank in S302 and 304 from plurality of memory refresh mode e.g., first and second refresh modes), wherein power consumption of the rank varies in the plurality of memory refresh modes (FIG 3; [0078]; Step 306, 308, 310 312 e.g., rank increases refresh power consumption of memory system 100 e.g., when access is higher than Vt): and refresh the rank according to the memory refresh mode (S310 e.g., refresh rank in the memory according to the first refresh request based on 306).
Regarding claim 18, Hu discloses wherein the quantity of commands comprises at least one of a first quantity of commands at an entry of a memory controller (FIG 2-3; [0056] S 302 access commands e.g., 106 receiving the commands sent by 104 e.g., entry of 106), a second quantity of commands in a queue in the memory controller(S302), or a third quantity of commands on a memory interface (FIG 1; command on 102).
Regarding claim 19, Hu discloses wherein the plurality of memory refresh modes comprises a first memory refresh mode and a second memory refresh mode(Step 308 306), and the wherein when executed by the at least one processor, the instructions further cause the computer to determine based on the target information, that the memory refresh mode of the rank is the first memory refresh mode or the second memory refresh mode (S302 S308 S302 S306).
Regarding claim 20, Hu discloses wherein a first power consumption of the rank in the first memory refresh mode is higher than a second power consumption of the rank in the second memory refresh mode (FIG 3; e.g., when in S302 when the access request found greater S308 power consumption is higher than S306 when access requests is less than first Vt), and wherein when executed by the at least one processor, the instructions causing the computer to determine that the memory refresh mode of the rank is the first memory refresh mode or the second memory refresh mode further cause the computer(S308 S306): determine, when the quantity of commands of the rank is greater than a first quantity threshold or the traffic is greater than a first traffic threshold(S302 and S308), that the memory refresh mode is the first memory refresh mode; and determine, when the quantity of commands of the rank is less than the first quantity threshold or the traffic is less than the first traffic threshold, that the memory refresh mode is the second memory refresh mode (S302 and S306).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Hu et al (US2020066330 FIG 1), Mazzola et al (US20090177849 FIG 12; [0104] discloses commands and obtain target physical rank).
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/MUNA A TECHANE/Primary Examiner, Art Unit 2827
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