Prosecution Insights
Last updated: July 17, 2026
Application No. 19/091,164

LOW POWER RELAY DRIVING DEVICE AND METHOD, AND LOW POWER RELAY DEVICE

Non-Final OA §102§103
Filed
Mar 26, 2025
Priority
Apr 23, 2024 — RE 10-2024-0054202
Examiner
YEAMAN, JAMES G
Art Unit
Tech Center
Assignee
Hanwha Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
1y 3m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
93 granted / 113 resolved
+22.3% vs TC avg
Moderate +7% lift
Without
With
+7.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
25 currently pending
Career history
140
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
95.4%
+55.4% vs TC avg
§102
2.9%
-37.1% vs TC avg
§112
1.4%
-38.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 113 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim 13 is rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Lee et al. (US 20240258056 A1 and Lee hereinafter.). Regarding claim 13, Lee discloses a low-power relay device [fig. 1 and 2] comprising: a relay [relay 100] including a coil [relay coil 120] and a switching element [relay switch 110]; and a driver circuit [first and second switching elements 410 and 420] that is connected to the relay, drives in a first driving state for a certain time duration after a point in time when a driving signal is received [signal S1 onto 410] and drives in a second driving state after the certain time duration has passed [signal S2 delayed via adjusting circuit 310 onto 420, para. 52 and fig. 4 showing delay on S2], and applies a first voltage to the relay during the first driving state [fig. 4, para. 43-50, 420 turned on] and applies a second voltage to the relay during the second driving state [410 turned on], wherein the second voltage is less than the first voltage [fig. 4, para. 43-50, 415 causing a voltage drop and therefore less voltage across relay coil]. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-10 and 14-17 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Nakamura et al. (JP 2016157524 A and Nakamura hereinafter.) further in view of Ling et al. (CN 108321019 A and Ling hereinafter.) . Regarding claim 1, Lee discloses a low-power relay driving device [fig. 1 and 2] comprising: a signal generation module configured to generate a driving signal [controller 200 outputting signal S1] with respect to a relay including a coil and a switching element [relay 100]; a first switching element [first switch 410] connected to the signal generation module and the relay [as shown in fig. 1]; a second switching element [second switch 420] connected between the first switching element and the relay [as shown in fig. 1], and connected to a resistor [control resistor 415] Lee does not explicitly disclose the second switching element connected in parallel to the resistor. However, Nakamura discloses a second switching element connected in parallel to a resistor [fig. 8, resistor 52 in parallel with transistor M50]. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the low-power relay driving device as described by Lee by disconnecting resistor 415 from switching element 410 and place the resistor 415 and switching element 420 in parallel as taught by Nakamura to improve the relay driving circuit by incorporating a switchable holding voltage thereby improving power consumption of the relay driving device. Lee in view of Nakamura does not explicitly disclose a third switching element connected to the second switching element and configured to control opening/closing of the second switching element; a fourth switching element connected to the third switching element and configured to control opening/closing of the third switching element; and the time-delay module connected between the fourth switching element and the signal generation module and allowing the fourth switching element to be closed later than a point in time when the first switching element is closed. However, Ling discloses a third switching element [fig. 2, triode Q4] connected to the second switching element [triode Q3] and configured to control opening/closing of the second switching element [Q4 controlling base of Q3]; a fourth switching element [triode Q5] connected to the third switching element [as shown in fig. 2] and configured to control opening/closing of the third switching element [Q5 controlling base of Q4]; and the time-delay module [R8 and C2, pg. 2 disclosing “Further, the delay and the driving voltage switching circuit comprises a triode Q3, a triode Q4, a triode Q5, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9 and capacitor C2.”] connected between the fourth switching element and the signal generation module [R8 and C2 coupled between Q5 and R9 accepting input] and allowing the fourth switching element to be closed later than a point in time when the first switching element is closed [Q1 accepting raw input signal vs Q5 accepting delayed input signal.]. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the low-power relay driving device as described by Lee in view of Nakamura to include third and fourth switching elements as taught by Ling between controller 200 and second switching element 420 of Lee to improve sustaining voltage switching speed of the low-power relay driving device. Regarding claim 2, Lee in view of Nakamura further in view of Ling discloses further the low-power relay driving device drives in an initial state before receiving the driving signal [Lee, S1 and S2 low before time T1 as shown in fig. 3], drives in a first driving state for a certain time duration from a point in time when receiving the driving signal [Lee, relay 100 receiving direct ground connection due to 420 being turned on shown in fig. 3 between T1 and T2], and drives in a second driving state after the certain time duration has passed [Lee, relay 100 receiving ground connection along with voltage drop from resistor 415 due to 410 being turned on and 420 being off shown in fig. 4 after T2]. Regarding claim 3, Lee in view of Nakamura further in view of Ling discloses further wherein the relay receives a first voltage during the first driving state [Lee, relay 100 receiving direct ground connection due to 420 being turned on shown in fig. 3 between T1 and T2], and receives a second voltage having a value less than the first voltage during the second driving state [Lee, relay 100 receiving ground connection along with voltage drop from resistor 415 due to 410 being turned on and 420 being off shown in fig. 4 after T2]. Regarding claim 4, Lee in view of Nakamura further in view of Ling discloses further wherein the fourth switching element is open in the initial state [Ling, Q5 off when base of Q5 is low from input signal being low] and is open in the first driving state [Ling, Q5 off when Q1 is high due to delay from R8 and C2], and is closed in the second driving state [Ling, Q5 on after delay from R8 and C2 on base of Q5]. Regarding claim 5, Lee in view of Nakamura further in view of Ling discloses further wherein the first switching element is open in the initial state [Ling, S1 low before T1 as shown in fig. 3], is closed in the first driving state [Ling, S1 low as shown in fig. 3], and is closed in the second driving state [Ling, S1 high after T1 as shown in fig. 3]. Regarding claim 6, Lee in view of Nakamura further in view of Ling discloses further wherein the third switching element is closed in the initial state [Ling, Q4 turned on when Q5 is off due to base of Q4 being at a higher potential with Q5 not conducting], is closed in the first driving state [Ling, Q4 turned on when Q5 is off due to base of Q4 being at a higher potential with Q5 not conducting before Q5 turns on from delay on base of Q5 from R8 and C2], and is open in the second driving state [Ling, Q4 turned off when Q5 is on due to base of Q4 being at ground when Q5 is conducting, after delay from R8 and C2 turns Q5 on]. Regarding claim 7, Lee in view of Nakamura further in view of Ling discloses further wherein the second switching element is closed in the initial state [Ling, Q5 OFF causing Q4 ON means resistor divider R5/R6 puts a lower potential on Q3 thereby turning Q3 on], is closed in the first driving state [Ling, Q3 still turned ON before delay from R8 and C2 turns ON Q5], and is open in the second driving state [Ling, Q5 is now ON, causing Q4 OFF means resistor divider R5/R6 puts a higher potential on Q3 thereby turning Q3 off]. Regarding claim 8, Lee in view of Nakamura further in view of Ling discloses further wherein the time-delay module allows the second switching element to be opened after a point in time when the first switching element is closed [Ling, Q1 turned on before Q5 dude to delay on base of Q5]. Regarding claim 9, Lee in view of Nakamura further in view of Ling discloses further wherein the time-delay module includes a resistor and a capacitor [Ling, delay elements R8 and C2]. Regarding claim 10, Lee in view of Nakamura further in view of Ling discloses further wherein the first switching element [Ling, Q1], the second switching element [Ling, Q3], the third switching element [Ling, Q4], and the fourth switching [Ling, Q5] element are implemented as bipolar junction transistors (BJTs) [as shown in fig. 2 of Ling]. Regarding claim 14, Lee discloses all the features of claim 13 as indicated above. Lee discloses further wherein the driver circuit comprises: a first switching element [fig. 4, switching element 410] connected to a signal generation module [controller 200] and the relay [as shown in fig. 4], the signal generation module generating a driving signal [signal S1] with respect to the relay [controller 200 controlling switching elements 410 and 420]; a second switching element [switching element 420] connected between the first switching element and the relay [as shown in fig. 4]. Lee does not explicitly disclose the second switching element connected to a resistor in parallel so as to adjust a voltage applied to the relay. However, Nakamura discloses a second switching element connected in parallel to a resistor [fig. 8, resistor 52 in parallel with transistor M50]. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the relay driver as described by Lee by disconnecting resistor 415 from switching element 410 and place the resistor 415 and switching element 420 in parallel as taught by Nakamura to improve the relay driving circuit by incorporating a switchable holding voltage thereby improving power consumption of the low-power relay device. Lee in view of Nakamura does not explicitly disclose a third switching element connected to the second switching element to control opening/closing of the second switching element; a fourth switching element connected to the third switching element to control opening/closing of the third switching element; and a time-delay module connected between the fourth switching element and the signal generation module and allowing the fourth switching element to be closed later than a point in time when the first switching element is closed. However, Ling discloses a third switching element [fig. 2, triode Q4] connected to the second switching element [triode Q3] to control opening/closing of the second switching element [Q4 controlling base of Q3]; a fourth switching element [triode Q5] connected to the third switching element [as shown in fig. 2] to control opening/closing of the third switching element [Q5 controlling base of Q4]; and a time-delay module [R8 and C2, pg. 2 disclosing “Further, the delay and the driving voltage switching circuit comprises a triode Q3, a triode Q4, a triode Q5, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9 and capacitor C2.”] connected between the fourth switching element and the signal generation module [R8 and C2 coupled between Q5 and R9 accepting input] and allowing the fourth switching element to be closed later than a point in time when the first switching element is closed [Q1 accepting raw input signal vs Q5 accepting delayed input signal.]. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the relay driver as described by Lee in view of Nakamura to include third and fourth switching elements as taught by Ling between controller 200 and second switching element 420 of Lee to improve sustaining voltage switching speed of the low-power relay device. Regarding claim 15, Lee in view of Nakamura further in view of Ling discloses further wherein in an initial state before receiving the driving signal [control signals low], the first switching element is open [Ling, fig. 2, Q1 OFF when base of Q1 is low], the second switching element is closed [Ling, fig. 2, Q3 ON due to Q4 being turned on from R5 shorting to ground creating a lower voltage on base of Q3], the third switching element is closed [Ling, fig. 2, Q4 is ON due to Q5 being turned off], and the fourth switching element is open [Ling, fig. 2, Q5 OFF due to base of Q5 being low]. Regarding claim 16, Lee in view of Nakamura further in view of Ling discloses further wherein in the first driving state, the first switching element [Ling, Q1 is ON from control signal being high], the second switching element [Ling, Q3 turned ON before delay from R8 and C2 turns ON Q5], and the third switching element [Ling, Q4 turned on when Q5 is off due to base of Q4 being at a higher potential with Q5 not conducting before Q5 turns on from delay on base of Q5 from R8 and C2] are closed, and the fourth switching element is open [Ling, Q5 OFF when Q1 is high due to delay from R8 and C2]. Regarding claim 17, Lee in view of Nakamura further in view of Ling discloses further wherein in the second driving state, the first switching element and the fourth switching element are closed [Ling, fig. 2, Q1 and Q5 both turned on after delay element R8 and C2 goes high], and the second switching element and the third switching element are open [Ling, fig. 2, Q3 and Q4 OFF due to Q5 being turned on]. Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Ling in view of Nakamura. Regarding claim 11, Ling discloses a low-power relay driving method [fig. 2] comprising: driving a first switching element [triode Q1] in a closed state in response to a driving signal generated by a signal generation module [unlabeled circuitry providing input signal on R1 and R9]; driving a fourth switching element [triode Q5] in an open state [Q5 turned off], based on a time-delay module [R8 and C2] not transferring the driving signal to the fourth switching element for a certain time duration after a point in time when the driving signal is generated [Q1 accepting raw input signal vs Q5 accepting delayed input signal.]; based on that the fourth switching element is in open state, driving a third switching element [triode Q4] in a closed state [Q4 is off when base is shorted to ground due to Q5 being turned on], driving a second switching element [triode Q3] in a closed state [Q3 turned on/off via voltage dividing resistors R5 and R6 and Q4 shorting R5 to ground when Q4 turned on], and receiving, by a relay [relay shown in fig. 2], a first voltage [VCC1 causing current to flow through Q3, the relay coil, Q1 and eventually ground]; driving the fourth switching element in a closed state in response to that the time- delay module transfers the driving signal to the fourth switching element after a certain time duration has passed [base of Q5 going high after delay decided by R8 and C2, pg. 2 disclosing “Further, the delay and the driving voltage switching circuit comprises a triode Q3, a triode Q4, a triode Q5, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9 and capacitor C2.”]; and based on that the fourth switching element is in the closed state, driving the third switching element in an open state [Q4 is on when base is shorted to VCC1 due to Q5 being turned off], driving the second switching element in an open state [Q3 turned off/on via voltage dividing resistors R5 and R6 and Q4 shorting R6 to VCC1 when Q4 turned off], and receiving, by the relay, a second voltage [VCC1]. Ling does not explicitly disclose the second voltage that is less than the first voltage. However, Nakamura discloses generating a holding voltage, lower than a rated voltage, by placing a resistor 52 in parallel with a switching element M50 for use in reducing heat generation in a relay driving circuit [fig. 8, pg. 2]. Therefore, it would have been obvious to one of ordinary skill in the art to modify the low-power relay driving method described by Ling to include the resistor in parallel with the second switching transistor as taught by Nakamura to reduce heat generation in the low-power relay driving method. Regarding claim 12, Ling in view of Nakamura discloses further wherein the relay receives a supply voltage by dividing the supply voltage with a resistor connected to the second switching element in parallel [Ling, resistor connected in parallel with triode Q3], in response to that the second switching element drives in an open state [Lee, Q3 OFF causing current to flow through parallel resistor causing voltage drop across the resistor]. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure, Li (CN 117133593 A) is cited to teach a switched relay driving circuit Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES G YEAMAN whose telephone number is (571)272-5580. The examiner can normally be reached Mon - Fri 954 Schedule. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached at (571) 270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAMES G YEAMAN/Examiner, Art Unit 2836 /TAELOR KIM/Supervisory Patent Examiner, Art Unit 2836
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Prosecution Timeline

Mar 26, 2025
Application Filed
Jul 01, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
90%
With Interview (+7.4%)
2y 7m (~1y 3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 113 resolved cases by this examiner. Grant probability derived from career allowance rate.

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