DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
Applicant is reminded of the proper content of an abstract of the disclosure.
A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art.
If the patent is of a basic nature, the entire technical disclosure may be new in the art, and the abstract should be directed to the entire disclosure. If the patent is in the nature of an improvement in an old apparatus, process, product, or composition, the abstract should include the technical disclosure of the improvement. The abstract should also mention by way of example any preferred modifications or alternatives.
Where applicable, the abstract should include the following: (1) if a machine or apparatus, its organization and operation; (2) if an article, its method of making; (3) if a chemical compound, its identity and use; (4) if a mixture, its ingredients; (5) if a process, the steps.
Extensive mechanical and design details of an apparatus should not be included in the abstract. The abstract should be in narrative form and generally limited to a single paragraph within the range of 50 to 150 words in length.
See MPEP § 608.01(b) for guidelines for the preparation of patent abstracts.
Examiner Note: The Applicant’s current abstract is focused on one embodiment. The abstract should be more of a basic statement of the Applicant’s specification with an example of preferred modification.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ni (US 20180158855) in view of Watanabe (JP 2004363437).
Re claim 1: Woodbury teaches a pixel circuit (fig. 6), comprising: a photodiode (photodiode, 11) configured to accumulate photo-carriers generated by incident light and to output a voltage signal (Vpd, paragraph 87), and having an output voltage that is linearly varied at a predetermined accumulation number or less of photo-carriers and is logarithmically varied at the predetermined accumulation number or more of photo-carriers (paragraph 87, fig. 6, claim 1), but does not specifically teach a reset transistor configured to periodically reset the photo-carriers accumulated in the photodiode, wherein the pixel circuit operates under a condition where a signal accumulation time tint is less than Vt * Cj/Is, where Cj is a capacity of the photodiode, Vt is a thermal voltage, and Is is a saturation current. Watanabe teaches a reset transistor (6) configured to periodically reset photo-carriers accumulated in a photodiode (40) (paragraph 31), wherein a pixel circuit operates under a condition where a signal accumulation time tint is less than Vt * Cj/Is, where Cj is a capacity of the photodiode, Vt is a thermal voltage, and Is is a saturation current (paragraphs 41-44). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to include a reset transistor and define the accumulation time similar to Watanabe with Woodbury in order to ensure proper integration of charge in the photodiode providing for more efficient light capture.
Claim(s) 2 and 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ni (US 20180158855) as modified by Watanabe (JP 2004363437) as applied to claim 1 above, and further in view of Sakano et al. (US 20170359537).
Re claim 2: Ni as modified by Watanabe teaches the photodiode (Ni, photodiode, 11) configured to accumulate photo-carriers generated by incident light and to output a voltage signal (Ni, Vpd, paragraph 87), and having an output voltage that is linearly varied at a predetermined accumulation number or less of photo-carriers and is logarithmically varied at the predetermined accumulation number or more of photo-carriers (Ni, paragraph 87, fig. 6, claim 1), but does not specifically teach wherein the photodiode operates with a forward bias. Sakano teaches wherein the photodiode operates with a forward bias (paragraph 137). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have the photodiode operate in a forward bias in Ni as modified by Watanabe similar to Sakano in order to ensure efficient logarithmic output providing for better light capture in high levels of light.
Re claim 3: Ni as modified by Watanabe teaches the photodiode (Ni, photodiode, 11) configured to accumulate photo-carriers generated by incident light and to output a voltage signal (Ni, Vpd, paragraph 87), and having an output voltage that is linearly varied at a predetermined accumulation number or less of photo-carriers and is logarithmically varied at the predetermined accumulation number or more of photo-carriers (Ni, paragraph 87, fig. 6, claim 1), but does not specifically teach wherein a reset voltage at the reset is set to a voltage causing a bias voltage to become zero. Sakano teaches wherein a reset voltage at the reset is set to a voltage causing a bias voltage to become zero (paragraph 111 and 112). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to have the photodiode reset to zero in Ni as modified by Watanabe similar to Sakano in order to ensure efficient logarithmic output providing for better light capture in high levels of light.
Conclusion
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/JENNIFER D BENNETT/Examiner, Art Unit 2878