DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements filed on 10/27/2025, 7/29/2025, 4/2/2025 and 3/26/2025 fail to comply with the provisions of 37 CFR 1.97(a) because it lacks the appropriate size fee set forth in 37 CFR 1.17(v). It has been placed in the application file, but the information referred to therein has not been considered as to the merits.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the features “memory comprising one or more storage media storing instructions” in ll. 3 and “display driver circuitry including a memory” in ll. 5. It is unclear whether the same memory is referred to by the two features. If different memories are referred to by the two features, the recited element “the memory” in ll. 4 from the bottom is lack of a sufficient antecedent basis as to which memory is being referred to.
Claims 2-13 are rejected because they depend on claim 1 and further recite “the memory” (if applicable).
Claims 14 is rejected for substantially the same rationale as applied to claim 1.
Claims 15-29 are rejected because they depend on claim 14 and further recite “the memory” (if applicable).
Claim 20 is further rejected because it recites the element “the at least one processor” in ll. 3. There is insufficient antecedent basis for this element in the claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 6 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bi et al. (US 2017/0193971).
Regarding claim 1, Bi teaches an electronic device (Figs. 1, 7) comprising:
at least one processor comprising processing circuitry (Fig. 1: one or more processor(s) 12; Fig. 7: SOC 70 as an embodiment of processor; [0044]: “The SOC 70 may include a graphics processing unit (GPU) 71 for the creation of images (e.g. frame data 72) in a frame buffer that is intended for output to the display 20. Further, the SOC 70 may include a central processing unit (CPU), which may be used to provide computer-understandable instructions to the display 20 circuitry”);
memory (Fig. 1: memory 14 and nonvolatile storage 16) comprising one or more storage media storing instructions ([0032]: “The memory 14 and the nonvolatile storage 16 may include any suitable articles of manufacture for storing data and executable instruction, such as random-access memory, read-only memory, rewritable flash memory, hard drives, and optical discs”); and
a display (Fig. 1: display 20) including:
display driver circuitry (Fig. 7: timing controller (TCON) 76) in display 20) including a memory (Fig. 7: frame buffer (FB) 78 for storing frame data 72), and
a display panel (Figs. 1, 7: inherent display panel in display 20; Figs. 2-5: exemplary display panels in different embodiments),
wherein the instructions, when executed by the at least one processor individually or collectively, cause the electronic device to:
obtain a first image (Fig. 10: first image interpreted as the image written to frame buffer by frame buffer write operation DW#3) to be transmitted from the at least one processor to the display driver circuitry;
provide, to the display driver circuitry, in a time interval (Fig. 10: time interval between time point 144 that data write operation of DW#3 is initiated and end of extended vertical blanking period 132) in an extended vertical front porch (Fig. 10: extended vertical blanking period 132 reads on extended vertical front porch) of a second vertical synchronization signal (Fig. 10: second vertical synchronization signal corresponding to vertical synchronization period formed by a SCAN period 136, extended vertical blanking period 132 immediately following the SCAN period 136 and a VBLANK period 140 immediately following extended vertical blanking period 134) for the at least one processor, at least one command (Fig. 10: command resulting in frame buffer write operation DW#3, which is provided in a time interval of extended vertical blanking periods 132) to be applied to the first image from among the first image and a second image (Fig. 10: second image interpreted as image resulting from frame buffer write operation DW#2) that is in the memory, wherein the time interval, in the extended vertical front porch of the second vertical synchronization signal for the at least one processor, is before a reference time (Fig. 10: reference time interpreted as duration from time point 144 that data write operation of DW#3 is initiated to end of extended vertical blanking period 132 ) from a start timing of a first vertical synchronization signal (Fig. 10: first vertical synchronization signal corresponding to vertical synchronization period formed by a SCAN period 136 and extended vertical blanking periods 134 immediately following the SCAN period 136) for the at least one processor; and
based on the start timing, transmit, to the display driver circuitry, the first image (Fig. 10: image from frame buffer write operation DW#3 is transmitted to display in frame buffer read operation 125).
Regarding claim 2, Bi further teaches the electronic device of claim 1, wherein the display driver circuitry is configured to:
based on applying, to the first image received based on the start timing, the at least one command obtained in the time interval, display, on the display panel, the first image (Fig. 10: frame buffer read operation DW#3 results in displaying first image).
Regarding claim 3, Bi further teaches the electronic device of claim 1, wherein the display driver circuitry is configured to:
based on scanning the second image in the memory in at least a portion of the extended vertical front porch, display, on the display panel, the second image (Fig. 10); and
after scanning of the second image is terminated, obtain the at least one command in the time interval from the at least one processor (Fig. 10).
Regarding claim 4, Bi further teaches the electronic device of claim 1, wherein the extended vertical front porch (Fig. 10: extended vertical blanking period 132) is a time interval during which the display driver circuitry is capable of displaying, on the display panel, the second image by scanning, by the display driver circuitry, the second image in the memory (Fig. 10).
Regarding claim 6, Bi further teaches the electronic device of claim 1, wherein the time interval is between an end timing of scanning of the second image in the memory and a timing before the reference time from the start timing (Fig. 10), and
wherein scanning of the second image in the memory is capable of being executed by the display driver circuitry from among the at least one processor and the display driver circuitry (Figs. 7, 10: Scan of second image corresponding to DW#2 executed by timing controller (TCON) 76) of display circuitry 20).
Claim 20 is rejected for substantially the same rationale as applied to claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Bi et al. (US 2017/0193971) in view of Cha et al. (US 2013/0057763).
Regarding claim 11, Bi does not further teach the electronic device of claim 1, wherein the at least one command comprises a command for changing a first mode that executes an image transmission from the at least one processor to the display driver circuitry based on a timing identified by the at least one processor to a second mode that executes the image transmission based on a timing identified by the display driver circuitry.
The differentiating limitation indicates applying a command for switching from a video/first mode with normal frame/refresh rate (involving normal, periodic image/frame data being transmitted from a processor) to a second mode with image/frame data refreshing in a lower frame rate and previous frame data stored in a display being displayed between the frame date refreshing. The technique is not new, however.
Cha, for instance, teaches in Fig. 24 having mode change command MCC transmitted to a display driver 2000 during a vertical blanking interval of the vertical synchronization signal Vsync, e.g., during a vertical front porch VFP, for changing from video mode displaying moving images to command mode displaying a still image.
Before the effective filing date of the invention, it would have been obvious for one ordinary skill in the art to apply Cha’s technique with Bi’s technique adding to the at least one command a command for changing a first mode that executes an image transmission from the at least one processor to the display driver circuitry based on a timing identified by the at least one processor to a second mode that executes the image transmission based on a timing identified by the display driver circuitry to
Allowable Subject Matter
Claims 14-19 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter in independent claim 14: “provide, to the display driver circuitry, at least another command in the portion of the extended vertical front porch and another portion of the extended vertical front porch before the portion of the extended vertical front porch” (emphasis added for subject matter not taught by Bi and not obvious for being added to Bi’s technique).
Claims 5, 7-10 and 12-13 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matters:
Claim 5: feature concerning transmitting of the claimed vertical sync start (VSS) packet is not taught by Bi and not obvious to be added to Bi’s technique.
Claim 7: “another time interval in the extended vertical front porch before the time interval” as the timing to provide the claimed at least another command is not taught by Bi and not obvious to be added to Bi’s technique.
Claim 12: “a signal indicating a timing of the image transmission from the display driver circuitry” received in the second mode is used as a baseline time point for providing the at least one command to be applied to a third image.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US Patent No. 11,676,557 by Park teaches a method of seamlessly switching over between the command mode and the video mode, which includes receiving a command for switching over from the command mode to the video mode. It, however, does not teach whether or not the command is provided in a time interval in an extended vertical front porch of a vertical synchronization signal. Instead, in Fig. 5, a command (VID_ON=0) for transition from the video mode to the command mode may be received at a point 500 in the middle of transmitting one frame.
US 2023/0072161 by Lin et al. teaches in FIG. 7 the command CMDB is transmitted in the VFP of an image frame, which indicates that the AP will send new image data (i.e., the image data B) in the next image frame. However, the display driver circuitry disclosed by the prior art purposedly eliminate a frame buffer/memory for storing frame data, which is different from the instant application.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to XUEMEI ZHENG whose telephone number is (571)272-1434. The examiner can normally be reached Monday-Friday: 9:30 pm-6:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin Lee can be reached at 571-272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/XUEMEI ZHENG/Primary Examiner, Art Unit 2629