Prosecution Insights
Last updated: October 02, 2026
Application No. 19/092,944

MEMORY SUB-SYSTEM WITH DYNAMIC CALIBRATION USING COMPONENT-BASED FUNCTION(S)

Non-Final OA §101
Filed
Mar 27, 2025
Priority
Jun 20, 2018 — continuation of 10/990,466 +3 more
Examiner
LOTTICH, JOSHUA P
Art Unit
2113
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
704 granted / 780 resolved
+35.3% vs TC avg
Minimal +4% lift
Without
With
+3.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
11 currently pending
Career history
788
Total Applications
across all art units

Statute-Specific Performance

§101
29.2%
-10.8% vs TC avg
§103
24.8%
-15.2% vs TC avg
§102
18.0%
-22.0% vs TC avg
§112
19.4%
-20.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 780 resolved cases

Office Action

§101
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-10, 19, and 20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter. As per claim(s) 1-10, 19, and 20, the claimed system has been read in view of applicant's specification (The method 700 can be performed by processing logic that can include hardware (e.g., processing device, circuitry, dedicated logic, programmable logic, microcode, hardware of a device, integrated circuit, etc.), software (e.g., instructions run or executed on a processing device), [0079]). The examiner notes that applicant describes hardware as including open ended language (“e.g.”, “etc”) and comprising a solely software embodiment (“microcode”), and software as including open ended language (“e.g.”) and thus it is reasonable to interpret any hardware component to include solely software embodiments. Therefor the claimed hardware elements of claims 1 and 18 (memory array, control register, storage registers, data access circuit) may each comprise solely of software. The claimed apparatus appears to include elements which could be interpreted as including only software. Software is not one of the four categories of invention and therefore these claims are not statutory. Software is not a series of steps or acts and thus is not a process. Software is not a physical article or object and as such is not a machine or manufacture. Software is not a combination of substances and therefore not a composition of matter. The examiner suggests amending the specification to remove “e.g” from the types of hardware and software and to remove “etc” and “microcode” as types of hardware so that the terms are not redefined to include non-statutory matter. Allowable Subject Matter Claims 11-18 are allowed. Prior art was not found that explicitly teaches or fairly suggests "in response to one command, (1) generate a center read result based on reading from a target location using a current read level and (2) generate an offset read result based on reading from a target location using an adjusted read voltage that corresponds to the current read level adjusted by the identified offset read voltage" in combination with "storing the center read result and the offset read result in a set of storage registers that are configured to function as cache memory", as outlined in independent claim 11. The remaining claims, not specifically mentioned, are allowed because they are dependent upon one of the claims mentioned above. These limitations are considered allowable only in combination with all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSHUA P LOTTICH whose telephone number is (571)270-3738. The examiner can normally be reached Mon - Fri, 9:00am - 5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bryce Bonzo can be reached at 5712723655. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSHUA P LOTTICH/ Primary Examiner, Art Unit 2113
Read full office action

Prosecution Timeline

Mar 27, 2025
Application Filed
Aug 11, 2026
Request for Continued Examination
Aug 13, 2026
Response after Non-Final Action
Sep 01, 2026
Non-Final Rejection mailed — §101 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Patent 12711009
DETECTING AND REPAIRING RELIABILITY ISSUES IN OPERATING SYSTEMS AND APPLICATIONS USING A GENERATIVE ARTIFICIAL INTELLIGENCE SYSTEM
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2y 1m to grant Granted Aug 18, 2026
Patent 12699621
ENHANCED TECH SUPPORT BASED ON CUSTOMER FEEDBACK
2y 6m to grant Granted Aug 04, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
94%
With Interview (+3.5%)
2y 2m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 780 resolved cases by this examiner. Grant probability derived from career allowance rate.

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