Prosecution Insights
Last updated: July 28, 2026
Application No. 19/093,885

Noise Measurements with a Capacitance Sensor

Final Rejection §102§103
Filed
Mar 28, 2025
Priority
Mar 20, 2023 — CIP of 12/287,940 +1 more
Examiner
SIDDIQUI, MD SAIFUL A
Art Unit
2626
Tech Center
2600 — Communications
Assignee
Cirque Corporation
OA Round
2 (Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
9m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
619 granted / 781 resolved
+17.3% vs TC avg
Strong +16% interview lift
Without
With
+15.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
18 currently pending
Career history
813
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
87.6%
+47.6% vs TC avg
§102
1.0%
-39.0% vs TC avg
§112
7.6%
-32.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 781 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status 1. The present application is being examined under the pre-AIA first to invent provisions. DETAILED ACTION SUMMARY 2. Amendment of the Patent application(CON) filed on May 12, 2026, has been received and made of record. In response to Non-Final Office Action mailed on February 13, 2026, applicant amended independent claims 1, 12, and 17 and dependent claim 7. Claims 2-6, 8-11, 13-16 and 18-20 are maintained. NO claim has been cancelled and/or added as new claim after the Non-Final Office Action. Therefore, claims 1-20 are pending for consideration. Terminal Disclaimer 3. Applicant submitted “Terminal Disclaimer” against co-pending application No. 19/092,242 on May 12, 2026, and published patent No. US 12,287,940 B2. The “Terminal Disclaimer” has been reviewed by the Office and accepted. Therefore, rejection of claims 1-20 on the ground of nonstatutory double patenting rejection has been withdrawn. Response to Arguments 4. Applicant's arguments in "REMARKS" filed on May 12, 2026, with respect to independent claims 1, 12, and 17 have been considered but are moot in view of new ground of rejection as necessitated by the applicant's amendment. Claim Rejections - 35 USC § 102 5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim Rejections - 35 USC § 103 6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 7. Claims 1-2, 7-9, 12-13, and 17-18 are rejected under 35 U.S.C. 102(a)(2) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over VAZE et al.(US 2023/0359305 A1)(herein after VAZE). Regarding claim 1, VAZE teaches a capacitance module(Para-2), comprising: at least one capacitance electrode(row touch electrodes 404 or column touch electrodes 406, fig.4A, Para-97; touch node electrode 408, fig.4B, Para-110) on a first layer(touch sensor 2216, fig.22, Para-228) in a stack of layers(stack up 2200 fig.22, Para-221); a noise sense electrode(display-noise shield/sensor 2210, fig.22, Para-225: display-noise shield/sensor 2210 can be either a shield and/or a sensor, depending on the implementation) electrically shielded with a shield(dielectric layer 2214 and/or second encapsulation layer 2212, fig.22, Para-229/230; fig.24, Para-241: an optional dielectric layer 2214 can be provided above second encapsulation layer 2212 to isolate touch sensor 2216 from parasitic capacitances with metal layer 2402) from the at least one capacitance electrode(404 or 406), wherein the shield (2210B) is positioned between the noise sense electrode(2402, fig.24) and the at least one capacitance electrode(404 or 406, fig.4A)); processing resources(touch controller 206, touch processor 202, host processor 228, fig.2, Para-101)in electrical communication with the at least one capacitance electrode(drive lines 222, sense lines 223, fig.2; row touch electrodes 404 or column touch electrodes 406, fig.4A) and the noise sense electrode(2402, fig.24) where the processing resources include a processor (206, 202, 228) and memory(RAM 212, program storage 232, fig.2, Para-98, 100), the memory including programmed instructions (Para-102) that cause the processor(206, 202, 228), when executed, to: take a capacitance measurement(Para-108) with the at least one capacitance electrode(222, 223; 404, 406) at a frequency(Para-98); and take a noise measurement(Para-258) with the noise electrode (2210) at the same frequency(Para-351: wherein the touch sensor panel and the noise sensor are configured to receive a stimulation signal of a same frequency and phase) and at a same time(Para-28: Noise detection may be continuously performed during touch detection) as the capacitance measurement be taken(Para-15: during readout of touch signals at a touch screen formed over the display components, display-noise sensor signals of the display-noise sensor can simultaneously read out and subtracted from the touch signals to reduce or remove electrical interference of the display from the touch signals). If it is considered that VAZE fails to teach the aforementioned limitations in a single embodiment, then it would have been obvious to a person having ordinary skill in the art, before the effective filing date of the application, to utilize different embodiments of VAZE in order to teach the claimed limitations. Such a combination is desirable as it provides touch sensing display device that allows a readout circuitry to simultaneously read out touch signals from the touch sensor and signals from a display-noise sensor to produce a noise-corrected touch signal to reduce or eliminate electrical interference caused by the display. Regarding claim 2, VAZE teaches the capacitance module of claim 1, wherein the programed instructions further include instructions that cause the processing resources to determine a noise value from the noise measurement(3104, fig.31, Para-267). Regarding claim 7, VAZE teaches the capacitance module of claim 1, wherein the shield is part of a shield layer that reduces or eliminates electrical interference generated on an underside of the stack of layers from interfering with an operation of the at least one capacitance electrode(fig.24, Para-241: an optional dielectric layer 2214 can be provided above second encapsulation layer 2212 to isolate touch sensor 2216 from parasitic capacitances with metal layer 2402). Regarding claim 8, VAZE teaches the capacitance module of claim 7, wherein the shield layer(2212, 2214, figs.22-24) is between the noise sense electrode(2210, figs.22-24) and the at least one capacitance electrode(touch sensor 2216, fig.22, 25). Regarding claim 9, VAZES teaches the capacitance module of claim 1, wherein the noise sense electrode(2210) is located on an underside layer of the stack of layers(fig.22). Claim 12 is rejected for the same reason as mentioned in the rejection of claim 1, since both claims 1 and 12 recite identical claim limitations excepts presented in different formats. Claim 13 is rejected for the same reason as mentioned in the rejection of claim 2, since both claims 2 and 13 recite identical claim limitations excepts presented in different formats. Claim 17 is rejected for the same reason as mentioned in the rejection of claim 1, since both claims 1 and 17 recite identical claim limitations excepts presented in different formats. Claim 18 is rejected for the same reason as mentioned in the rejection of claim 2, since both claims 2 and 18 recite identical claim limitations excepts presented in different formats. 8. Claims 3, 15, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over VAZE et al.(US 2023/0359305 A1) in view of Yumoto et al.(US 2013/0271426 A1) (herein after Yumoto). Regarding claim 3, VAZE teaches the capacitance module of claim 2, wherein the programed instructions further include instructions that cause the processing resources to subtract the noise value from the capacitance measurement to create a processed capacitance measurement(3106, fig.31, Para-267); and but fails to teach expressly wherein the processing resource to determine a user input when the processed capacitance measurement exceeds a predetermined input threshold value. However, Yumoto teaches a touch panel system in an electronic device, wherein the programed instructions further include instructions that cause the processing resources(touch panel controller 4, fig.1, Para-60) to subtract the noise value(Para-55) from the capacitance measurement(Para-54) to create a processed capacitance measurement(Para-60, 61); and determine a user input(presence of touch operation) when the processed capacitance measurement exceeds a predetermined input threshold value(Para-62). Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified VAZE with the teaching of Yumoto to include the feature in order to provide a touch panel system in an electronic device capable of reliably removing a wide variety of noises. Claim 15 and 19 are rejected for the same reason as mentioned in the rejection of claim 3, since claims 3, 15, and 19 recite identical claim limitations excepts presented in different formats. 9. Claims 4, 14, 16, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over VAZE et al.(US 2023/0359305 A1) in view of Hsu et al.(US 2015/0185901 A1) (herein after Hsu). Regarding claim 4, VAZE is not found to teach expressly the capacitance module of claim 2, wherein the programed instructions further include instructions that cause the processing resources to adjust a predetermined input threshold value for determining a user input based on the noise value. However, Hsu teaches a touch control system, wherein the programed instructions further include instructions that cause the processing resources(processing unit 130, fig.1, Para-20) to adjust a predetermined input threshold value(touch threshold valuer, Para-28) for determining a user input based on the noise value(630, fig.6, Para-37). Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified VAZE with the teaching of Hsu to include the feature in order to provide a touch control system to reduce the power consumption of the touch control system. Claim 14 is rejected for the same reason as mentioned in the rejection of claim 4, since claims 4 and 14 recite identical claim limitations excepts presented in different formats. Claim 16 is rejected for the same reason as mentioned in the rejection of claim 4, since claims 4, and 16 recite identical claim limitations excepts presented in different formats. Claim 20 is rejected for the same reason as mentioned in the rejection of claim 4, since claims 4, and 20 recite identical claim limitations excepts presented in different formats. 10. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over VAZE et al.(US 2023/0359305 A1) in view of SINGH et al.(US 2014/0232663 A1)(herein after SINGH). Regarding claim 5, VAZE is not found to teach expressly the capacitance module of claim 1, wherein the noise sense electrode is on the same layer as the at least one capacitance electrode. However, SINGH teaches an electronic device for detecting touches, wherein the noise sense electrode(noise detection electrode 206, fig.2, Para-26) is on the same layer as the at least one capacitance electrode(drive electrode 202 or sense electrode 204, fig.2, Para-25, 27). The prior art, as embodied in the teachings of VAZE and SINGH, included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference. One of ordinary skill in the art could have combined the elements as claimed by known methods and in that combination each element merely performs the same function as it does separately. Such a combination is reasonable as it provides less layers and less manufacturing cost of a touch panel. 11. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over VAZE et al.(US 2023/0359305 A1) in view of Yun et al.(US 2022/0317803 A1) (herein after Yun). Regarding claim 6, VAZE is not found to teach expressly the capacitance module of claim 1, where the noise sense electrode is shielded from the at least one capacitance electrode with a grounded electrically conductive barrier that is positioned between the noise sense electrode and the at least one capacitance electrode. However, Yun teaches a display device having touch sensor, where the noise sense electrode(NDs_1, fig.11, Para-180) is shielded from the at least one capacitance electrode(SP1 and SP2, figs.4&11) with a grounded electrically conductive barrier (touch ground G4, fig.11, Para-114, 179) that is positioned between the noise sense electrode(NDs_1) and the at least one capacitance electrode(SP1 and SP2). Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified VAZE with the teaching of Yun to include the feature in order to provide a touch panel capable of detecting noise caused by poor deposition of a cathode electrode. 12. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over VAZE et al.(US 2023/0359305 A1) in view of SINGH et al.(US 2014/0232663 A1)(herein after SINGH) and further in view of SUNG et al.(US 2021/0328328 A1)(herein after SUNG). Regarding claim 10, [VAZE as modified by] SINGH teaches the capacitance module of claim 1, wherein the at least one of capacitance electrode(202 or 204, fig.2, SINGH) and the noise sense electrode(206, fig.2, SINGH) are on the same layer of the stack of layers(Para-27, SINGH: the noise-detection electrode 206 may be disposed on the same layer of the touch-sensitive display 118 as the drive electrodes 202 or the same layer of the touch-sensitive display 118 as the sense electrodes 204)(for motivation see the rejection of claim 5). Neither VAZE nor SINGH teaches expressly the capacitance module, where stack of layers includes an antenna and it is on the same layer as the at least one capacitance electrode. However, SUNG teaches wireless electronic device, wherein the antenna and the at least one capacitance electrodes placed on the same layer(Para-96). Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified VAZE further with the teaching of SUNG to include the feature in order to provide an electronic device having an improved antenna efficiency by arranging a dipole antenna in a display area using a portion of an input sensor panel. 13. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over VAZE et al.(US 2023/0359305 A1) in view of Katsurahira et al.(US 2016/0378265 A1)(herein after Katsurahira). Regarding claim 11, VAZE teaches the capacitance module of claim 1, wherein the noise sense electrode is also on the underside layer(fig.22) and but fails to teach expressly wherein the stack of layers includes an antenna that is on an underside layer. However, Katsurahira teaches a position detecting device, wherein the stack of layers includes an antenna(coil pattern 112, fig.15A) and is on an underside layer(fig.14), and the noise sense electrode(12C) is also on the underside layer (figs.14-15B). Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified VAZE with the teaching of Katsurahira to include the feature in order to provide a digitizer that controls phase of pulse in sync with outputted pulse so that the noise detection information is outputted in predetermined time. Conclusion 14. Applicant's amendment necessitated the new ground of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Examiner Note 15. The Examiner cites particular figures, paragraphs, columns and line numbers in the references, as applied to the claims above. Although the particular citations are representative teachings and are applied to specific limitations within the claims, other passages, internally cited references, and figures may also apply. In preparing a response, it is respectfully requested that the Applicant fully consider the references, in their entirety, as potentially disclosing or teaching all or part of the claimed invention, as well as fully consider the context of the passage as taught by the references or as disclosed by the Examiner. CONTACT Any inquiry concerning this communication or earlier communications from the examiner should be directed to MD SAIFUL A SIDDIQUI whose telephone number is (571)270-1530. The examiner can normally be reached Mon-Fri: 9:00AM - 5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae, can be reached at (571)272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MD SAIFUL A SIDDIQUI/Primary Examiner, Art Unit 2626
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Prosecution Timeline

Mar 28, 2025
Application Filed
Feb 13, 2026
Non-Final Rejection mailed — §102, §103
May 12, 2026
Response Filed
Jun 02, 2026
Final Rejection mailed — §102, §103
Jul 23, 2026
Request for Continued Examination
Jul 27, 2026
Response after Non-Final Action

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Prosecution Projections

3-4
Expected OA Rounds
79%
Grant Probability
95%
With Interview (+15.8%)
2y 1m (~9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 781 resolved cases by this examiner. Grant probability derived from career allowance rate.

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