Notice of Pre-AIA or AIA Status
1. The present application is being examined under the pre-AIA first to invent provisions.
DETAILED ACTION
SUMMARY
2. Patent application(CON) filed on March 28, 2025, has been received and made of record. There are 1-20 claims in the application of which claims 1, 12, and 17 are independent claims. Therefore, claims 1-20 are pending for consideration.
Information Disclosure Statement
3. The information disclosure statement (IDS) submitted on April 01, 2025, was filed after the mailing date of the application on March 28, 2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
4. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-isclaimer.
5. Claims 1-3, 5-13, 15, and 17-19 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of co-pending Application No. 19/092,242. Although the claims at issue are not identical, they are not patentably distinct from each other because except for minor wording and insignificant changes in terminology, each and every limitation of over claims 1-20 of the co-pending application No. 19/092,242 reads on the corresponding limitations of claims 1-3, 5-13, 15, and 17-19 of the current application No. 19/093,885. Both the co-pending application and the current application recite a capacitance module having noise sensing electrode to measure noise and determine touch location free of noise.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Comparison of claims of the current application and the co-pending application No. 19/092,242 is given below: -
19/093,885
19/092,242
Claim 1: A capacitance module, comprising:
at least one capacitance electrode on a first layer in a stack of layers;
a noise sense electrode electrically shielded from the at least one capacitance electrode; processing resources in electrical communication with the at least one capacitance electrode and the noise sense electrode where the processing resources include a processor and memory, the memory including programmed instructions that cause the processor, when executed, to:
take a capacitance measurement with the at least one capacitance electrode at a frequency; and
take a noise measurement with the noise electrode at the same frequency and at a same time as the capacitance measurement be taken.
Claim 1: A capacitance module, comprising:
a set of electrodes on a first layer in a stack of layers; a first noise sense electrode electrically shielded from the set of capacitance electrodes; a second noise sense electrode electrically shielded from the set of capacitance electrodes; processing resources in electrical communication with the set of capacitance electrodes and the noise sense electrode; wherein the processing resources include a processor and memory, the memory including programmed instructions that cause the processor, when executed, to: take a first noise measurement with the first noise electrode; take a second noise measurement with a second noise electrode; and determine a capacitance measurement frequency based on the first noise measurement and the second noise measurement.
Claim 2: The capacitance module of claim 1, further including taking a capacitance noise measurement with the determined capacitance measurement frequency.
Claim 15: The capacitance module of claim 1, wherein the first noise measurement and second noise measurement are taken at the same time.
Claim 2 corresponds to part of claim 3 of 19/092,242;
Claim 3 corresponds to part of claims 4 and 5 of 19/092,242;
Claim 5 corresponds to claim 6 of 19/092,242;
Claim 6 corresponds to claim 7 of 19/092,242;
Claim 7 corresponds to claim 8 of 19/092,242;
Claim 8 corresponds to claim 9 of 19/092,242;
Claim 9 corresponds to claim 10 of 19/092,242;
Claim 10 corresponds to claim 11 of 19/092,242;
Claim 11 corresponds to claim 12 of 19/092,242;
Claim 12 is rejected for the same reason as mentioned in the rejection of claim 1;
Claim 13 is rejected for the same reason as mentioned in the rejection of claim 2;
Claim 15 is rejected for the same reason as mentioned in the rejection of claim 3;
Claim 17 is rejected for the same reason as mentioned in the rejection of claim 1;
Claim 18 is rejected for the same reason as mentioned in the rejection of claim 2; and
Claim 19 is rejected for the same reason as mentioned in the rejection of claim 3.
6. Claims 4, 14, 16, and 20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of co-pending Application No. 19/092,242 in view of Hsu et al.(US 2015/0185901 A1) (herein after Hsu).
For mapping and motivation, see the rejection of claim 4, 14, 16, and 20 under 35 U.S.C. 103.
7. Claims 1-2, 6, 8, 12-13, and 17-18 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-14 of U.S. Patent No. US 12,287,940 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because except for minor wording and insignificant changes in terminology, each and every limitation of over claims 1-14 of U.S. Patent No. US 12,287,940 B2 reads on the corresponding limitations of claims 1-2, 6, 8, 12-13, and 17-18 of the current application 19/093,885. Both the US published Patent and the current application recite a capacitance module having noise sensing electrode to measure noise and determine touch location free of noise.
Comparison of claims of the current application and the U.S. published patent No. US 12,287,940 B2 is given below: -
19/093,885
US 12,287,940 B2
Claim 1: A capacitance module, comprising:
at least one capacitance electrode on a first layer in a stack of layers;
a noise sense electrode electrically shielded from the at least one capacitance electrode;
processing resources in electrical communication with the at least one capacitance electrode and the noise sense electrode where the processing resources include a processor and memory, the memory including programmed instructions that cause the processor, when executed, to:
take a capacitance measurement with the at least one capacitance electrode at a frequency; and
take a noise measurement with the noise electrode at the same frequency and at a same time as the capacitance measurement be taken.
Claim 2: The capacitance module of claim 1, wherein the programed instructions further include instructions that cause the processing resources to determine a noise value from the noise measurement.
Claim 1: A capacitance module, comprising:
a set of electrodes;
a noise sense electrode electrically independent from the set of capacitance electrodes;
processing resources in electrical communication with the set of capacitance electrodes and the noise sense electrode;
wherein the processing resources include a processor and memory, the memory including programmed instructions that cause the processor, when executed, to:
take a first noise measurement by imposing a first signal on the noise sense electrode, the first signal having a first frequency;
take a second noise measurement by imposing a second signal on the noise sense electrode, the second noise signal having a second frequency; and
take a capacitance measurement by imposing a third signal on the set of capacitance electrodes, the third signal having a third frequency where the third frequency is the same as the first frequency when the first noise measurement is lower than the second noise measurement or the third frequency is the same as the second frequency when the second noise measurement is lower than the first noise measurement.
Claim 8: The capacitance module of claim 7, wherein the first input signal and the first noise signal are measured at the same time, and the second input signal and the second noise signal are measured at the same time.
Claim 6 corresponds to part of claim 6 of US 12,287,940 B2;
Claim 8 corresponds to part of claim 6 of US 12,287,940 B2;
Claims 12 and 17 are rejected for the same reason as mentioned in the rejection of claim 1; and
Claims 13 and 18 are rejected for the same reason as mentioned in the rejection of claim 2.
Claim Rejections - 35 USC § 103
8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
10. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
11. Claims 1-2, 5, 9, 12-13, and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over SINGH et al.(US 2014/0232663 A1)(herein after SINGH) in view of TANG et al.(US 2022/0043531 A1) (herein after TANG).
Regarding claim 1, SINGH teaches a capacitance module (electronic device having touch sensitive display for detecting noise, Para-9; sensor 114, fig.1, Para-13), comprising:
at least one capacitance electrode(drive electrodes 202 or sense electrodes 204, fig.2, Para-24) on a first layer in a stack of layers(Para-25: the drive electrodes 202 and sense electrodes 204 may be disposed on different planes of the touch-sensitive display 118; Para-27: the noise-detection electrode 206 may be disposed on another layer of the touch-sensitive display 118);
a noise sense electrode(noise detection electrode 206, fig.2) electrically shielded(Para-25: the sensors 114 also include a noise-detection electrode 206 that is spaced from the drive electrodes 202 and the sense electrodes 204 such that the noise-detection electrode 206 does not cross over or under the drive electrodes 202 or the sense electrodes 204) from the at least one capacitance electrode(202 or 204);
processing resources(main processor 102, fig.1, Para-13) in electrical communication with the at least one capacitance electrode(sensors 114, drive electrodes 202, sense electrode 204) and the noise sense electrode(noise detection electrode 206) where the processing resources include a processor(102) and memory(memory 110, fig.1, Para-13), the memory including programmed instructions(Para-15)that cause the processor(102), when executed, to:
take a capacitance measurement(Para-37) with the at least one capacitance electrode(202, 204) at a frequency(first frequency, Para-37); and
take a noise measurement(Para-28, 38) with the noise electrode (206) at a same time(Para-28: Noise detection may be continuously performed during touch detection) as the capacitance measurement be taken(Para-28).
Nevertheless, SINGH is not found to teach expressly the capacitance module, wherein the processor is configured to take a noise measurement with the noise electrode at the same frequency as the frequency of capacitance measurement.
However, TANG teaches a noise detection circuit of an electronic device, wherein the processor is configured to take a noise measurement with the noise electrode at the same frequency as the frequency of capacitance measurement(Para-269).
Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified SINGH with the teaching of TANG to include the feature in order to provide a noise detection circuit in an electronic device having a control module that is connected with a driving module, where control module controls the cancelation module to charge the cancelation capacitor with voltage in first period of time, and thus enables to reduce interference of noise.
Regarding claim 2, SINGH as modified by TANG teaches the capacitance module of claim 1, wherein the programed instructions further include instructions that cause the processing resources to determine a noise value from the noise measurement(Para-33, SINGH).
Regarding claim 5, SINGH as modified by TANG teaches the capacitance module of claim 1, wherein the noise sense electrode is on the same layer as the at least one capacitance electrode(Para-27, SINGH).
Regarding claim 9, SINGH as modified by TANG teaches the capacitance module of claim 1, wherein the noise sense electrode is located on an underside layer of the stack of layers(Para-27, SINGH: the noise-detection electrode 206 may be disposed on another layer of the touch-sensitive display 118. The noise-detection electrode 206 may be disposed in the display area of the touch-sensitive display 118 and may be transparent).
Claim 12 is rejected for the same reason as mentioned in the rejection of claim 1, since both claims 1 and 12 recite identical claim limitations excepts presented in different formats.
Claim 13 is rejected for the same reason as mentioned in the rejection of claim 2, since both claims 2 and 13 recite identical claim limitations excepts presented in different formats.
Claim 17 is rejected for the same reason as mentioned in the rejection of claim 1, since both claims 1 and 17 recite identical claim limitations excepts presented in different formats.
Claim 18 is rejected for the same reason as mentioned in the rejection of claim 2, since both claims 2 and 18 recite identical claim limitations excepts presented in different formats.
12. Claims 3, 15, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over SINGH et al.(US 2014/0232663 A1) in view of TANG et al.(US 2022/0043531 A1) and further in view of Yumoto et al.(US 2013/0271426 A1) (herein after Yumoto).
Regarding claim 3, SINGH as modified by TANG is not found to teach expressly the capacitance module of claim 2, wherein the programed instructions further include instructions that cause the processing resources to subtract the noise value from the capacitance measurement to create a processed capacitance measurement; and determine a user input when the processed capacitance measurement exceeds a predetermined input threshold value.
However, Yumoto teaches a touch panel system in an electronic device, wherein the programed instructions further include instructions that cause the processing resources(touch panel controller 4, fig.1, Para-60) to
subtract the noise value(Para-55) from the capacitance measurement(Para-54) to create a processed capacitance measurement(Para-60, 61); and
determine a user input(presence of touch operation) when the processed capacitance measurement exceeds a predetermined input threshold value(Para-62).
Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified SINGH further with the teaching of Yumoto to include the feature in order to provide a touch panel system in an electronic device capable of reliably removing a wide variety of noises.
Claim 15 and 19 are rejected for the same reason as mentioned in the rejection of claim 3, since claims 3, 15, and 19 recite identical claim limitations excepts presented in different formats.
13. Claims 4, 14, 16, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over SINGH et al.(US 2014/0232663 A1) in view of TANG et al.(US 2022/0043531 A1) and further in view of Hsu et al.(US 2015/0185901 A1) (herein after Hsu).
Regarding claim 4, SINGH as modified by TANG is not found to teach expressly the capacitance module of claim 2, wherein the programed instructions further include instructions that cause the processing resources to adjust a predetermined input threshold value for determining a user input based on the noise value.
However, Hsu teaches a touch control system, wherein the programed instructions further include instructions that cause the processing resources(processing unit 130, fig.1, Para-20) to adjust a predetermined input threshold value(touch threshold valuer, Para-28) for determining a user input based on the noise value(630, fig.6, Para-37).
Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified SINGH further with the teaching of Hsu to include the feature in order to provide a touch control system to reduce the power consumption of the touch control system.
Claim 14, 16 and 20 are rejected for the same reason as mentioned in the rejection of claim 4, since claims 4, 14, 16, and 20 recite identical claim limitations excepts presented in different formats.
14. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over SINGH et al.(US 2014/0232663 A1) in view of TANG et al.(US 2022/0043531 A1) and further in view of Yun et al.(US 2022/0317803 A1) (herein after Yun).
Regarding claim 6, SINGH as modified by TANG is not found to teach expressly the capacitance module of claim 1, where the noise sense electrode is shielded from the at least one capacitance electrode with a grounded electrically conductive barrier that is positioned between the noise sense electrode and the at least one capacitance electrode.
However, Yun teaches a display device having touch sensor, where the noise sense electrode(NDs_1, fig.11, Para-180) is shielded from the at least one capacitance electrode(SP1 and SP2, figs.4&11) with a grounded electrically conductive barrier (touch ground G4, fig.11, Para-114, 179) that is positioned between the noise sense electrode(NDs_1) and the at least one capacitance electrode(SP1 and SP2).
Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified SINGH further with the teaching of Yun to include the feature in order to provide a touch panel capable of detecting noise caused by poor deposition of a cathode electrode.
15. Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over SINGH et al.(US 2014/0232663 A1) in view of TANG et al.(US 2022/0043531 A1) and further in view of HA et al.(US 2019/0121396 A1) (herein after HA).
Regarding claim 7, SINGH as modified by TANG is not found to teach expressly the capacitance module of claim 1, wherein the stack of layers comprises a shield layer that reduces or eliminates electrical interference generated on an underside of the stack of layers from interfering with an operation of the at least one capacitance electrode.
However, HA teaches an electronic device, wherein the stack of layers(440, fig.4B, Para-101) comprises a shield layer (shielding layer 442 or shielding layer 444, fig.4B) that reduces or eliminates electrical interference(Para-103: reduce the noise due to interference between the touch panel or display panel and the antenna) generated on an underside of the stack of layers from interfering with an operation of the at least one capacitance electrode(touch panel 441, fig.4B, Para-101; Para-68: capacitive technique).
Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified SINGH further with the teaching of HA to include the feature in order to provide a touch panel capable of reducing noise due to interference between the touch panel or display panel and the antenna.
Regarding claim 8, SINGH as modified by TANG and HA teaches the capacitance module of claim 7, wherein the shield layer (442 or 444, fig.4B, HA) is between the noise sense electrode (206, fig.2, SINGH)(whenever the touch electrode and noise sense electrode are placed on different layers, it is obvious to place the shield layer between noise electrode and touch electrode to reduce interference) and the at least one capacitance electrode (touch panel 441, fig.4B, HA).
16. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over SINGH et al.(US 2014/0232663 A1) in view of TANG et al.(US 2022/0043531 A1) and further in view of SUNG et al.(US 2021/0328328 A1) (herein after SUNG).
Regarding claim 10, SINGH as modified by TANG teaches the capacitance module of claim 1, wherein the at least one of capacitance electrode(202 or 204, fig.2, SINGH) and the noise sense electrode(206, fig.2, SINGH) are on the same layer of the stack of layers(Para-27, SINGH: the noise-detection electrode 206 may be disposed on the same layer of the touch-sensitive display 118 as the drive electrodes 202 or the same layer of the touch-sensitive display 118 as the sense electrodes 204).
Neither SINGH nor TANG teaches expressly the capacitance module, where stack of layers includes an antenna and it is on the same layer as the at least one capacitance electrode.
However, SUNG teaches wireless electronic device, wherein the antenna and the at least one capacitance electrodes placed on the same layer(Para-96).
Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified SINGH further with the teaching of SUNG to include the feature in order to provide an electronic device having an improved antenna efficiency by arranging a dipole antenna in a display area using a portion of an input sensor panel.
17. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over SINGH et al.(US 2014/0232663 A1) in view of TANG et al.(US 2022/0043531 A1) and further in view of Katsurahira et al.(US 2016/0378265 A1)(herein after Katsurahira).
Regarding claim 11, SINGH as modified by TANG is not found to teach expressly the capacitance module of claim 1, wherein the stack of layers includes an antenna that is on an underside layer, and the noise sense electrode is also on the underside layer.
However, Katsurahira teaches a position detecting device, wherein the stack of layers includes an antenna(coil pattern 112, fig.15A) and is on an underside layer(fig.14), and the noise sense electrode(12C) is also on the underside layer (figs.14-15B).
Therefore, it would be obvious to one of ordinary skill in the art, before the effective filing date of the application, to have modified SINGH further with the teaching of Katsurahira to include the feature in order to provide a digitizer that controls phase of pulse in sync with outputted pulse so that the noise detection information is outputted in predetermined time.
Examiner Note
18. The Examiner cites particular figures, paragraphs, columns and line numbers in the references, as applied to the claims above. Although the particular citations are representative teachings and are applied to specific limitations within the claims, other passages, internally cited references, and figures may also apply. In preparing a response, it is respectfully requested that the Applicant fully consider the references, in their entirety, as potentially disclosing or teaching all or part of the claimed invention, as well as fully consider the context of the passage as taught by the references or as disclosed by the Examiner.
CONTACT
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MD SAIFUL A SIDDIQUI whose telephone number is (571)270-1530. The examiner can normally be reached Mon-Fri: 9:00AM - 5:30PM.
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/MD SAIFUL A SIDDIQUI/Primary Examiner, Art Unit 2621