DETAILED ACTION
This communication is a first Office Action Non-Final rejection on the merits. Claims 1-20 as originally filed are currently pending and are considered below.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on May 28, 2025, September 4, 2025, July 8, 2026, are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Allowable Subject Matter
Claims 3, 4, 7, 8, 12, 15, 16 and 19 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten within the independent claims.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-2, 5-6, 9-11, 13-14, 17-18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Mirkazemi-Moud et al., U.S. Patent Application Publication, hereinafter Moud in view of Yanko et al., U.S. Patent Application Publication 2016/0267299.
As per Claim 1, Moud discloses an apparatus for tamper detection, the apparatus comprising:
a circuit board (Figure 1A, Circuit Board 140),
wherein the circuit board includes tamper detection circuitry (Figure 1A, Anti-Tampering Circuitry 148) and a first conductor (Figure 1A, Domes 150);
a housing associated with the circuit board (Figure 1A Partial Enclosure 116); and
a second conductor (Figure 1A, Array 152 and Conductive Rings 152),
wherein the first conductor and the second conductor are physically coupled to one another while in a first state based on the circuit board and the housing being within a threshold distance of one another while in the first state (pg.3, ¶ [0060] discusses each array 152 comprises an outer ring 153, an intermediate ring 154 and an inner ring 155. In this embodiment, as long as the housing is closed and not tampered with, the dome 150 is in electrical contact with outer ring 153 and inner ring 155 but not with intermediate ring 154),
wherein the tamper detection circuitry detects a flow of electricity through the first conductor and the second conductor while in the first state (pg.4, ¶[0065] discusses during normal operation, where no tampering is detected, V1 is equal to VDD),
wherein the first conductor and the second conductor are decoupled from one another while in the first state based on the circuit board and the housing being outside of the threshold distance of one another while in a second state (pg.4, ¶ [0067] discusses when attempted tampering occurs and the housing is opened, no electrical contact exists between domes 150 and corresponding rings 155),
wherein the tamper detection circuitry detects a lack of the flow of electricity through the first conductor and the second conductor while in the second state (pg.4, ¶ [0065] discusses An attempt to tamper with the case open switch causes voltage V1 to be zero).
Moud pg.4, ¶ [0069] teaches hen this simultaneous contact exists, voltage measured at TD2 is zero; otherwise, voltage measured at TD2 equals VCC. Thus, an attempt to remove of adequate pressure from the dome 150 and open the housing triggers a tamper response.
However, Moud fails to explicitly state wherein the tamper detection circuitry detects that the first conductor and the second conductor are electrically decoupled from one another while in the second state.
Yanko teaches wherein the tamper detection circuitry detects that the first conductor and the second conductor are electrically decoupled from one another while in the second state (pg.3, ¶ [0049] discusses Tamper detection and alarm circuitry 254 may be conventional circuitry which provides an alarm, such as an audio or visually sensible alarm, in response to sensed detection of tampering, evidenced, for example by a short circuit or an open circuit in one or more protective mesh, such as mesh 23).
Therefore, it would have been obvious to one of ordinary skill in the art of transaction terminal tamper detection before the effective filing date of the claimed invention to modify the system of Moud to include the ability to detect a tampering event as taught by Yanko et al., to provide a secure smartcard reader. Abstract
As per Claim 2, Moud discloses the apparatus of claim 1, wherein the tamper detection circuitry includes a voltage sensor (pg.4, ¶ [0064] discusses voltage V2 may be measured to indicate whether the housing is open or closed, i.e. whether or not dome 150 is simultaneously in contact with both inner ring 155 and outer ring 153),
wherein the tamper detection circuitry measures a first voltage reading at the first conductor to detect the flow of electricity while in the first state (pg.4, ¶ [0065] discusses When this simultaneous contact exists, V2 is zero; otherwise V2 equals VDD), and
wherein the tamper detection circuitry measures a second voltage reading at the first conductor to detect the lack of the flow of electricity while in the second state (pg.4, ¶ [0065] discusses An attempt to tamper with the switch by short circuiting inner ring 155 and outer ring 153 will also short circuit intermediate ring 154 and may be detected by measuring a voltage V1).
As per Claim 5, Moud discloses an apparatus comprising:
a surface (Figure 1A, Electrical Circuit Board 140),
wherein the surface includes tamper detection circuitry and a first conductor (Figure 1B, Anti-Tampering Detection Circuitry 148 and Array 152, including Outer Ring 153, Intermediate Ring 154, Inner ring 154);
a housing (Figure 1A, Protective Partial Enclosure 116); and
a second conductor (Figure, Dome 150)
wherein the first conductor and the second conductor are coupled to one another while in a first state based on the surface and the housing being within a threshold distance of one another while in the first state (pg.3, ¶ [0060] discusses each array 152 comprises an outer ring 153, an intermediate ring 154 and an inner ring 155. In this embodiment, as long as the housing is closed and not tampered with, the dome 150 is in electrical contact with outer ring 153 and inner ring 155 but not with intermediate ring 154),
wherein the tamper detection circuitry detects that the first conductor and the second conductor are electrically coupled while in the first state (pg.4, ¶[0065] discusses during normal operation, where no tampering is detected, V1 is equal to VDD),
wherein the first conductor and the second conductor are decoupled from one another while in the first state based on the surface and the housing being outside of the threshold distance of one another while in a second state (pg.4, ¶ [0067] discusses when attempted tampering occurs and the housing is opened, no electrical contact exists between domes 150 and corresponding rings 155), and
Moud pg.4, ¶ [0069] teaches hen this simultaneous contact exists, voltage measured at TD2 is zero; otherwise, voltage measured at TD2 equals VCC. Thus, an attempt to remove of adequate pressure from the dome 150 and open the housing triggers a tamper response.
However, Moud fails to explicitly state wherein the tamper detection circuitry detects that the first conductor and the second conductor are electrically decoupled from one another while in the second state.
Yanko teaches wherein the tamper detection circuitry detects that the first conductor and the second conductor are electrically decoupled from one another while in the second state (pg.3, ¶ [0049] discusses Tamper detection and alarm circuitry 254 may be conventional circuitry which provides an alarm, such as an audio or visually sensible alarm, in response to sensed detection of tampering, evidenced, for example by a short circuit or an open circuit in one or more protective mesh, such as mesh 23).
Therefore, it would have been obvious to one of ordinary skill in the art of transaction terminal tamper detection before the effective filing date of the claimed invention to modify the system of Moud to include the ability to detect a tampering event as taught by Yanko et al., to provide a secure smartcard reader. Abstract
As per Claim 6, Moud discloses the apparatus of claim 5, wherein the tamper detection circuitry includes a voltage sensor (pg.4, ¶ [0064] discusses voltage V2 may be measured to indicate whether the housing is open or closed, i.e. whether or not dome 150 is simultaneously in contact with both inner ring 155 and outer ring 153),
wherein the tamper detection circuitry measures a first voltage reading corresponding to the first conductor to detect that the first conductor and the second conductor are electrically coupled while in the first state (pg.4, ¶ [0065] discusses When this simultaneous contact exists, V2 is zero; otherwise V2 equals VDD), and
wherein the tamper detection circuitry measures a second voltage reading corresponding to the first conductor to detect that the first conductor and the second conductor are electrically decoupled from one another while in the second state (pg.4, ¶ [0065] discusses When this simultaneous contact exists, V2 is zero; otherwise V2 equals VDD).
As per Claim 9, Moud discloses the apparatus of claim 5, wherein the second state is associated with detection of a tamper attempt by the tamper detection circuitry (pg.4, ¶ [0067] discusses When attempted tampering occurs and the housing is opened, no electrical contact exists between domes 150 and corresponding rings 155).
As per Claim 10, Moud discloses the apparatus of claim 5, wherein the housing pushes at least a portion of the second conductor toward the first conductor while in the first state (Figure 13A, depicts Pin 161, which part of the housing pushing the Dome 150 and Corresponding Ring 155 to make contact).
As per Claim 11, Moud discloses the apparatus of claim 5, wherein the housing compresses at least a portion of the second conductor while in the first state (Figure 13A, depicts when the housing is closed), and
wherein at least the portion of the second conductor is uncompressed while in the second state (Figure 13B, depicts when attempted tampering occurs and the housing is opened, no electrical contact exists between domes 150 and corresponding rings 155).
As per Claim 13, Moud discloses the apparatus of claim 5, wherein the second conductor is dome-shaped while in the second state (Figure 13B, depicts Dome 150 uncompressed, while tampering is occurring).
As per Claim 14, Moud discloses the apparatus of claim 5, wherein the surface includes a third conductor, wherein the first conductor and the second conductor and the third conductor are coupled together while in the first state (Figure 1A, depicts Array 150, having multiple conductors), and
the tamper detection circuitry detects that the first conductor and the second conductor and the third conductor are electrically coupled while in the first state (pg.3, ¶ [0054] discusses flexible resilient protective partial enclosure 116, which includes an anti-tampering grid 118, formed of a multiplicity of interconnected anti tampering electrical conductors, on a top surface 120 thereof and on side surfaces 122 thereof, is provided).
As per Claim 17, Moud discloses the apparatus of claim 5, wherein the second conductor is coupled to the housing through a flexible member that is coupled to the housing, wherein the flexible member is one of a thread, a cord, or a chain (Figure 2B, Flexible Cable 224).
As per Claim 18, Moud discloses the apparatus of claim 5, wherein the second conductor is coupled to the housing through a rigid member that is coupled to the housing (Figure 13A and 13B, Pin 161).
As per Claim 20, Moud discloses method of tamper detection, the method comprising:
detecting, using tamper detection circuitry, that a first conductor and a second conductor are electrically coupled while in a first state (pg.4, ¶[0069] discusses a voltage at tamper detection input points TD2 may be measured to indicate whether the hosing is open or closed, i.e. whether or not dome 150 is simultaneously in contact with both inner ring 160 and outer intermediate ring 158.),
wherein a surface includes the first conductor and the tamper detection circuitry (Figure 1B, depicts Anti-Tampering Detection Circuitry 148, Array 152 and Electrical Circuit Board 140,), and
wherein the first conductor and the second conductor are coupled to one another while in the first state based on the surface and a housing being within a threshold distance of one another while in the first state (pg.3, ¶ [0060] discusses each array 152 comprises an outer ring 153, an intermediate ring 154 and an inner ring 155. In this embodiment, as long as the housing is closed and not tampered with, the dome 150 is in electrical contact with outer ring 153 and inner ring 155 but not with intermediate ring 154); and
detecting, using the tamper detection circuitry, that the first conductor and the second conductor are electrically decoupled while in a second state (pg.4, ¶ [0067] discusses when attempted tampering occurs and the housing is opened, no electrical contact exists between domes 150 and corresponding rings 155),
wherein the first conductor and the second conductor are decoupled from one another while in the second state based on the surface and the housing being outside of the threshold distance of one another while in the second state (pg.4, ¶ [0067] discusses When attempted tampering occurs and the housing is opened, no electrical contact exists between domes 150 and corresponding rings 155).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Garrido et al. U.S. Patent Application Publication 2008/0164320 discusses a secure card reader includes several security measures. Access to the reader's main circuitry is prevented by an enclosure (9) whose walls contain embedded i conductive paths (18a, 18b, 18c). Breaking or grounding of one of these paths can be detected electronically. A similar arrangement of conductive paths prevents enlarging of a card receiving slot (9c) If tampering is detected using the embedded conductive paths (18a, 18b, 18c), the reader's memory (69) is wiped. The enclosure (9) has apertures (20) in its walls and is held in place by a potting material that extends into the apertures. Means (31, 35) is also provided to detect attempts to probe behind a keypad membrane (7). The contacts (42) for the chip of a chip card are arranged so that their leads all extend away from the card insertion slot. Abstract
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/ASHFORD S HAYLES/Primary Examiner, Art Unit 3627
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