Prosecution Insights
Last updated: August 16, 2026
Application No. 19/095,457

UPDATING A WRITE-DONE POINTER IN A FIRST-IN-FIRST-OUT QUEUE ON A PARALLELIZED DEVICE

Non-Final OA §103§112
Filed
Mar 31, 2025
Priority
May 21, 2024 — provisional 63/650,283
Examiner
CARDWELL, ERIC
Art Unit
2139
Tech Center
2100 — Computer Architecture & Software
Assignee
Microsoft Technology Licensing, LLC
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
572 granted / 651 resolved
+32.9% vs TC avg
Moderate +12% lift
Without
With
+11.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
17 currently pending
Career history
666
Total Applications
across all art units

Statute-Specific Performance

§101
4.7%
-35.3% vs TC avg
§103
48.9%
+8.9% vs TC avg
§102
25.2%
-14.8% vs TC avg
§112
9.3%
-30.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 651 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement As required by M.P.E.P. ' 609 (C), the applicant's submission of the Information Disclosure Statement dated October 16th, 2025, is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending. As required by M.P.E.P. ' 609 C(2), a copy of the PTOL-1449 initialed and dated by the examiner is attached to the instant office action. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claims 1, 10, 17, the examiner has determined the structure of the claims to be confusing. The claims are drawn to calculating (in lines 19 and 20 of claim 1 for example), followed by a colon that indicates a list. The applicant as provided 4 items in the list where the third item in the list is followed by an “OR” statement which the examiner has interpreted to be part of the 4 listed items and therefore the examiner only needs to show a teaching of one of the items in the list when an “OR” statement is invoked. The examiner suggests if the applicant did not intend for this interpretation that they amend the claims to clarify the structure of the claims. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-8 and 10-20 are rejected under 35 U.S.C. 103 as being unpatentable over Jones [US2013/0014118] in view of Shatsky et al. [US2023/0127321]. Jones teaches simultaneous submission to a multi-producer queue by multiple threads. Shatsky teaches write cache management. Regarding claims 1, 10, and 17, Jones teaches a method, implemented in a computer system that includes a processor system [Jones figure 1, feature 102 “CPU”] comprising: receiving a plurality of values from a producer [Jones paragraph 0065, first lines “…The data structure may be stored in memory, where contiguous portions of the queue storage may be allocated by each producer thread. The multiple producer threads may write output data to the respective allocated portions of the shared queue…”], including: receiving an end pointer value representing a pointer to an end of data the producer has finished writing into a first-in-first-out (FIFO) queue [Jones paragraph 0081, middle lines “…The maximum value tracks the most advanced entry into the shared queue 500 that has been completely written by a producer thread. The largest possible maximum value equals the outer pointer 520…” and paragraph 0083, middle lines “…After writing thread data to the thread output 504, the fourth thread updates the maximum value….” and see Table 1 maximum values (Where the end pointer value equals the maximum value written by the thread, the maximum value tracks the most advanced entry into the shared queue that has been completely written by a producer thread.)] and receiving a done count value indicating a number of data items the producer has finished writing into the FIFO queue [Jones paragraph 0083, middle lines “…The fourth thread then updates the complete count using an atomic ADD operation to accumulate the amount of data (e.g., bytes) written to the thread output 504 by the fourth thread into the complete count…”]; reading a plurality of memory values from a plurality of memory locations in a memory [Jones paragraph 0008, first lines “..one or more consumers may read valid data from the shared queue…”], including: Jones fails to explicitly teach reading a checkpoint value from a first memory location, the checkpoint value indicating a checkpoint location in the FIFO queue, reading a checkpoint write count value from a second memory location, the checkpoint write count value indicating a count of data items before the checkpoint location that have each been written and marked complete by any producer. However, Shatsky does teach reading a checkpoint value from a first memory location [Shatsky paragraph 0042, first lines “…the destage operations are performed atomically using a checkpointing process in which a checkpoint is utilized to take a point-in-time checkpoint, of some data and metadata in the cyclic write cache 300…”], the checkpoint value indicating a checkpoint location in the FIFO queue [Shatsky paragraph 0036, last lines “…the metadata pointer 320 points to a location in the cyclic write cache 300 from where a recovery process or a new metadata destage/checkpoint operation begins…”], reading a checkpoint write count value from a second memory location, the checkpoint write count value indicating a count of data items before the checkpoint location that have each been written and marked complete by any producer [Skatsky paragraph 0044, last lines “…and the data pointer 310 points to a location which indicates what data items have already been destaged and persisted to storage. The data pointer 310 and the metadata pointer 320 are used to determine the tail location of write cache 300, which is the minimum of the data pointer 310 and the metadata pointer 320…”(The examiner has determined the data pointer indicates what data items have already been persisted which is the same function as the checkpoint write count.)]. Jones and Shatsky are analogous arts in that they both deal with managing data in a queue. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Jones’ shared queue with Shatsky’s use of pointers in a cyclic buffer for the benefit of providing reduced overhead when handling data [Shatsky paragraph 0039, first lines “…the use of the cyclic write cache 300 and associated write cache management methods as discussed herein provide reduced overhead for handling data and associated metadata…”]. Jones teaches reading a max written value from a third memory location, the max written value indicating an offset of a furthest location written to in the FIFO queue [Jones paragraph 0081, first lines “…two additional values are maintained for the shared queue 500: a "maximum" value and a "complete" count. The maximum value tracks the most advanced entry into the shared queue 500 that has been completely written by a producer thread…”], and reading a count total value from a fourth memory location, the count total value indicating a total number of data items written to the FIFO queue [Jones paragraph 0081, middle lines “…two additional values are maintained for the shared queue 500: a "maximum" value and a "complete" count…The complete count tracks the total quantity of data completely written into the shared queue 500 by all producer threads…”]; calculating a new checkpoint value, a new checkpoint write count value [Shatsky paragraph 0057, first lines “…proceeds to generate a new checkpoint to persist the selected metadata items that were destaged from the cycle write cache (block 508)…” and paragraph 0037, last half “…The data pointer 310 and the metadata pointer 320 are used to determine the tail location of write cache 300, which is the minimum of the data pointer 310 and the metadata pointer 320. For example, in the exemplary embodiment of FIG. 3, the data pointer 310 represents the tail location of the cyclic write cache 300 and, thus, serves as the current tail pointer at the point-in-time shown in…”(The data pointer is used to determine the write count and is new at the processing point of the tail location…”], a new max written value, and a new count total value [Jones paragraph 0081, last lines “…The maximum value and the complete count are both updated by each producer thread atomically once the data is completely written to the thread output allocated to the particular producer thread. The maximum value is updated by an atomic MAX (maximum) operation and the complete count is updated by an atomic ADD operation…”] wherein: the new count total value is calculated as a sum of the count total value and the done count value [Jones paragraph 0081, middle lines “…the complete count is updated by an atomic ADD operation…”]; the new max written value is calculated as a maximum of the max written value and the end pointer value [Jones paragraph 0081, middle lines “…The maximum value is updated by an atomic MAX (maximum) operation…”]; when the end pointer value is less than the checkpoint value [Shatsky paragraph 0044, middle lines “…The tail of the cyclic write cache 300 will move based on the lower of the metadata destage and data destage operations. The data pointer 310 and the metadata pointer 320 are used to track the progress of the metadata and data destage operations…”(The tail pointer reads on the end pointer value.)], the new checkpoint write count value is calculated as a sum of the done count value and the checkpoint write count value [Jones paragraph 0067, most lines “…An atomic ADD (addition) operation may be used to add the requested allocation size for the producer thread to the outer pointer. Use of the atomic ADD operation means that contiguous portions of the shared queue may be allocated to multiple producer threads. For example, to allocate a contiguous portion of the buffer, a pointer to the current "next available" memory location can be incremented atomically by a thread. Using an atomic operation ensures that even if multiple producer threads advance the outer pointer simultaneously, each producer thread is allocated a different portion of the shared queue that is contiguous with previously allocated portions of the shared queue…”]; or when all work in the FIFO queue prior to the checkpoint location in the FIFO queue indicated by the checkpoint value is completed, the new checkpoint value receives the new max written value and the new checkpoint write count value receives the new count total value; and updating the plurality of memory locations in the memory, including updating the first memory location with the new checkpoint value [Shatsky paragraph 0057, first lines “…proceeds to generate a new checkpoint to persist the selected metadata items that were destaged from the cycle write cache (block 508)…”(The examiner has determined the teachings of “new” or “updating” imply the values are updated in the corresponding memory locations.)], updating the second memory location with the new checkpoint write count value [Shatsky paragraph 0037, last half “…The data pointer 310 and the metadata pointer 320 are used to determine the tail location of write cache 300, which is the minimum of the data pointer 310 and the metadata pointer 320. For example, in the exemplary embodiment of FIG. 3, the data pointer 310 represents the tail location of the cyclic write cache 300 and, thus, serves as the current tail pointer at the point-in-time shown in…”(The data pointer is used to determine the write count and is new at the processing point of the tail location…”], updating the third memory location with the new max written value [Jones paragraph 0081, middle lines “…The maximum value is updated by an atomic MAX (maximum) operation…”], and updating the fourth memory location with the new count total value [Jones paragraph 0081, middle lines “…the complete count is updated by an atomic ADD operation…”]. Regarding claims 2, 11, and 18, as per claim 1, Jones teaches the method is performed as an atomic instruction, and the atomic instruction is implemented as hardware logic, as a programmable atomic, or as a plurality of central processing unit instructions that atomically update the plurality of memory locations with transactional memory operations or a compare-exchange instruction [Jones paragraph 0067, most lines “…An atomic ADD (addition) operation may be used to add the requested allocation size for the producer thread to the outer pointer. Use of the atomic ADD operation means that contiguous portions of the shared queue may be allocated to multiple producer threads. For example, to allocate a contiguous portion of the buffer, a pointer to the current "next available" memory location can be incremented atomically by a thread. Using an atomic operation ensures that even if multiple producer threads advance the outer pointer simultaneously, each producer thread is allocated a different portion of the shared queue that is contiguous with previously allocated portions of the shared queue…”]. Regarding claims 3, 12, and 18-20, as per claim 1, Jones teaches the method further comprises returning, to the producer, one or more of the checkpoint value, the checkpoint write count value, the max written value, or the count total value [Jones paragraph 0081-0082, “…Note that it the maximum value should be updated before the complete value is updated to avoid a race condition resulting from other producer threads updating and checking the maximum value and the complete count to advance the inner pointer 510. When the maximum value and the complete count are equal, then the producer thread which has updated the complete count can determine that all data in the shared queue 500 up to the maximum value has been written…”]. Regarding claims 4, and 13, as per claim 1, the FIFO queue is a circular buffer [ paragraph 0028, middle lines “…a cache management system according to an exemplary embodiment utilizes a cyclic, contiguous, predefined-size buffer to implement the write cache 180…”][Jones paragraph 0010, last lines “…shared queue may be circular…”], and calculating one or more of the checkpoint value, the checkpoint write count value, the max written value [Jones paragraph 0081, middle lines “…The maximum value is updated by an atomic MAX (maximum) operation…”], or the count total value comprises using a wrapping comparison for a greater-than operation, a less-than operation, or a maximum operation [Jones paragraph 0081, middle lines “…The maximum value is updated by an atomic MAX (maximum) operation…”]. Regarding claims 5 and 14, as per claim 1, Jones teaches the method further comprises determining a new write done pointer to be: the new max written value when the new max written value is equal to the new count total value [Jones paragraph 0082, first lines “…When the maximum value and the complete count are equal, then the producer thread which has updated the complete count can determine that all data in the shared queue 500 up to the maximum value has been written…”]; or the checkpoint value when all work prior to the checkpoint location has been completed, and the end pointer value is less-than-or-equal-to the checkpoint value . Regarding claims 6, 15, 18-19, as per claim 1, Jones teaches the method further comprises returning at least one of a prior write done pointer or the new write done pointer to the producer [Jones paragraph 0082, most lines “…When the maximum value and the complete count are equal, then the producer thread which has updated the complete count can determine that all data in the shared queue 500 up to the maximum value has been written. That producer thread can then advance the inner pointer 510. For the case shown in FIG. 5E, the first thread would not be able to advance the inner pointer to the last entry of thread output 503…” and paragraph 0066, last lines “…As portions of the shared queue are allocated by producer threads, the outer pointer is advanced. As thread output is written to the portions of the shared queue by the producer threads, the inner pointer is advanced…”]. Regarding claims 7 and 16, as per claim 1, Jones teaches the method further comprises sending, to a hardware consumer, at least one of a prior write done pointer, the new write done pointer, a signal indicating that a write done pointer has been updated, or a signal indicating completion of a checkpoint [Jones paragraph 0066, most lines “…Instead of simply using a head pointer, as may be done when only a single producer and single consumer access the shared queue, when multiple producers access the shared queue two pointers are used: an outer pointer and an inner pointer. The outer pointer indicates a next entry in the shared queue that is available for allocation to a producer thread. The inner pointer indicates the most recent valid entry that may be read by a consumer thread in a contiguous stream of entries, i.e., the most recent contiguous entry in the shared queue that holds thread output written by a producer thread and has been submitted to the shared queue. As portions of the shared queue are allocated by producer threads, the outer pointer is advanced. As thread output is written to the portions of the shared queue by the producer threads, the inner pointer is advanced…”]. Regarding claim 8, as per claim 1, Jones the method further comprises writing the new write done pointer to the memory [Jones paragraph 0082, first lines “…When the maximum value and the complete count are equal, then the producer thread which has updated the complete count can determine that all data in the shared queue 500 up to the maximum value has been written. That producer thread can then advance the inner pointer 510. For the case shown in FIG. 5E, the first thread would not be able to advance the inner pointer to the last entry of thread output 503…”(The examiner has determined the “updating” implies the writing the pointer to memory.)]. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Jones [US2013/0014118] in view of Shatsky et al. [US2023/0127321] further in view of Gould et al [US2019/0236749]. Jones teaches simultaneous submission to a multi-producer queue by multiple threads. Shatsky teaches write cache management. Gould teaches FIFO queue memory resource and task management for graphics processing. Regarding claim 9, as per claim 1, Jones and Shatsky fail to explicitly teach incrementing a count of unconsumed data by a difference between the new write done pointer and a prior write done pointer. However, Gould does teach incrementing a count of unconsumed data by a difference between the new write done pointer and a prior write done pointer [Gould paragraph [Gould paragraph 0060, middle lines “…GPU 12 can determine the number of data elements to be consumed (e.g., as a number of bytes represented in a difference between the read allocation pointer and the write done pointer), and then can launch one or more read threads to consume each data element, and/or it can launch one or more threads…”(Where the read allocation pointer is the new write done pointer and the write done pointer is the prior write done pointer. The unconsumed data is the data that needs “to be consumed” and as such reads on the claims.)]. Jones, Shatsky, and Gould are analogous in that they all teach improving queue operations. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Jones’ and Shatsky’s use of pointers in queue management with Gould’s finding the unconsumed amount of data for the benefit of providing a growable FIFO that results in freeing memory resources and thus conserving memory which improves performance [Gould paragraph 0025, first lines “…efficiencies in allocating and using memory for graphics operations are improved by…providing the growable FIFO queues can allow shaders to operate using an amount of memory just above what may be required for the shader at a given period of time. In addition, freeing the memory resources allows for conservative memory use for simultaneously operating other shaders or performing other graphics processing operations…”]. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Gould et al [US2020/0004460] Gould teaches multiple pointers in a FIFO queue management system. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC CARDWELL whose telephone number is (571)270-1379. The examiner can normally be reached on Monday - Friday 10-6pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached on (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC CARDWELL/Primary Examiner, Art Unit 2139
Read full office action

Prosecution Timeline

Mar 31, 2025
Application Filed
Jul 15, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+11.8%)
2y 6m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 651 resolved cases by this examiner. Grant probability derived from career allowance rate.

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