DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 3 and 4 objected to because of the following informalities:
Claims 3 and 4 have the typo “realised”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 3 and 4 recites the limitation "the sub set" and “the technology” in claims 3 and 4. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-6 and 9-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kampe (Pub 2020/0228060) in view of Siprak et al (Pub 2009/0179695, further referred to as Siprak).
As to claim 1, Kampe teaches an oscillator (Fig 2) arranged to output a differential voltage
oscillator carrier, the oscillator comprising:
a tank circuit (240 and 250, paragraph 58)
an active circuit (210a) connected to the tank circuit, the active circuit
comprising a crossed coupled pair of transistors (220a and 220b), each transistor comprising a terminal, said terminal (bg) allowing to modify a threshold voltage of the transistor (paragraph 42)
wherein the oscillator comprises a control circuit (260) arranged to modify the
voltage at the fourth terminal of at least a subset of said transistors (paragraph 42), the device current of the active circuit being a drain current flowing in one of the transistors (drain of 220a and 220b), thereby minimizing low frequency noise to phase noise conversion (paragraph 23 and 25).
Kampe does not teach that the minimize a phase difference between the differential voltage oscillator carrier and a device current of the active circuit.
Siprak teaches an LC oscillator (fig 6C) in which a tank circuit (612) is connected to transistor pair in which the transistor pair receives a gate biasing to minimize a phase difference between the differential voltage oscillator carrier and a device current of the active circuit (paragraphs 47, 71 and 72). As such it would have been obvious to a person of ordinary skill in the art before the filing date of the invention to combine the oscillator taught in Kampe with the noise reduction taught in Siprak in order to reduce phase noise in the oscillator output signal.
As to claim 2, Kampe teaches wherein the control circuit is arranged to modify the voltage at the fourth terminal of all said transistors (paragraph 42).
As to claim 3, Kampe teaches sub-set of said transistors is realized in the technology fully depleted silicon on insulator (FDSOI) or in the technology deeply depleted channel-(DDC) (paragraph 49).
As to claim 4, Kampe teaches wherein all said transistors are realized in the technology fully depleted silicon on insulator- (FDSOI) or in the technology deeply depleted channel (DDC) (paragraph 49).
As to claim 5, Kampe teaches a Vbias (260) is provided to the back gates of the transistors. It would have been obvious to a person of ordinary skill in the art to use a DAC and a capacitor as it would be a mere matter of design choice to user desired method of how the tuning voltage is generated (digital control with a filter capacitor).
As to claim 6, Kampe teaches a tank comprising a common mode part (610) and a differential part (612).
As to claim 9, Kampe teaches the oscillator being a voltage based oscillator (VCC and Vbias (260)).
As to claim 10, Kampe teaches the oscillator being current based (Itail (270)).
As to claims 11 and 12, Kampe teaches using the oscillator in a transceiver (fig 7, paragraph 64).
It would be obvious to a person of ordinary skill in the art to have a transmit path, a receive path, and a single port antenna as it would be mere matter of intended use to the design of the transceiver used with the oscillator.
Claim(s) 7 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kampe in view of Siprak and Manetakis (Patent 9559702).
As to claim 7, this claim is dependent on claim 6 the rejection of which is addressed above.
Kampe and Siprak does not teach the common mode with a capacitor between the common node and the ground.
Manetakis teaches an LC oscillator with a common mod part (fig 5C) modelled as a common inductor (5-326) between a supply node (VDD) and a common node (C) and a common capacitor (5-516) between the common node and the ground (GND). As such it would have been obvious to a person of ordinary skill in the art before the filing date of the invention to combine the oscillator taught in Kampe with the noise reduction taught in Siprak and common mode circuit taught in Manetakis in order to reduce phase and flicker noise in the oscillator output signal.
As to claim 8, Manetakis shows a common oscillator configuration with a inductor, capacitor and resistor in parallel (fig 5B).
Allowable Subject Matter
Claims 13 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
None of the cited prior art teach or suggest the transceiver and the steps to tuning with the control circuit to inject a frequency tune and to sweep voltage as is recited in claims 13 and 14.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Pentakota et al (Patent 10566930) teaches detected a threshold voltage of transistors and sending a biasing voltage.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JEFFREY M SHIN whose telephone number is (571)270-7356. The examiner can normally be reached M-F 9am-6pm PST.
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/JEFFREY M SHIN/Primary Examiner, Art Unit 2836
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