DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office Action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-7, 10-18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Thompson et al. (US 2018/0350296 A1) in view of Chaji (US 2016/0293102 A1).
As to claim 1, Thompson teaches An apparatus for display processing (Thompson, Abs., “data processing system … to mitigate burn-in effect on a display”), comprising:
a memory (Thompson, FIG. 1, [0035], “storage(s) 125 127 129”, etc.); and
at least one processor (Thompson, FIG. 1, [0035], “secure processing system 101”) coupled to the memory (Thompson, see FIG. 1, [0035], “storage(s) 125 127 129”, etc.) and, based at least in part on information (Thompson, FIG. 1, [0035], e.g., “encrypted long-term history (LTH) 119”, “burn-in metric (BIM) 121”, “compressed and encrypted LTH 123”, etc.) stored in the memory (Thompson, FIG. 1, [0035], “storage(s) 125 127 129”, etc.), the at least one processor (Thompson, FIG. 1, [0035], “secure processing system 101”) is configured to:
obtain an indication of at least one frame associated with the display processing (Thompson, FIG. 2, [0037], “in operation 211 in FIG. 2, the system collects burn-in statistics (BIS) 114 which can be a snapshot of display intensities for each frame”), wherein the at least one frame includes a set of pixels, wherein the at least one frame is associated with at least one layer (Thompson, FIG. 2, [0037], “the snapshots may be obtained directly from data in the frame buffer or may be obtained from other data structures containing pixel luminance values for images displayed on the display”);
detect a first subset of pixels in the set of pixels included in the at least one frame (Thompson, FIG. 7A, [0043], e.g., “the burn-in metric may use thresholds to bin or place into buckets different pixels that have different levels of aging … Each bin can correspond to a different quantized level of aging, from the least aged to most aged bins”), wherein each of the first subset of pixels includes a decay ratio that is less than a decay ratio threshold (Thompson, FIG. 2, [0037], “in operation 209 the burn-in compensation values 112 stored in memory used by the display hardware 110 are used to mitigate the burn-in effect during the display of images on a display coupled to the display hardware 110”);
identify one or more regions of the at least one frame that include all of the first subset of pixels (Thompson, e.g., FIG. 7D, [0054], “one or more sets of regions that can be selectively located in locations that are anticipated to possibly experience high burn-in or show high burn-in effects”);
wherein each of the second subset of pixels is not included in the first subset of pixels (Thompson, FIG. 2, [0037], “the compensation values can be used for less than all of the images displayed on the display in certain embodiments”; [0043], “Each bin can correspond to a different quantized level of aging, from the least aged to most aged bins”).
Thompson does not explicitly teach “increase a brightness value of each of the first subset of pixels in the one or more regions or decrease a brightness value of each of a second subset of pixels in the one or more regions”.
However, Chaji teaches the concepts of increasing a brightness value of each of the first subset of pixels in the one or more regions (Chaji, FIG. 7, [0062], “the display brightness can increase 754 until the display-aging is within the defined thresholds”) or decreasing a brightness value of each of a second subset of pixels in the one or more regions (Chaji, FIG. 7, [0062], “the display brightness BR is adjusted (here reduced) 752 if the display brightness BR is above the minimum allowable brightness BRMIN 742”).
At the time of effective filing date, it would have been obvious to one of ordinary skill in the art to modify the “secure processing system 101” taught by Thompson to further perform the steps of “754 and 752” shown in FIG. 7, as taught by Chaji, in order to provide “monitoring of aging and the management of display brightness to simultaneously address image quality while preventing or slowing the self-destruction of the display” (Chaji, [0040]).
As to claim 2, Thompson teaches the apparatus of claim 1, wherein the at least one processor (Thompson, FIG. 1, [0035], “secure processing system 101”) is configured to:
calculate a set of coordinates for each of the one or more regions of the at least one frame that include all of the first subset of pixels (Thompson, e.g., FIG. 7D, [0054], “the display 755 has been logically separated into three regions that each contain a set of selectively located regions”).
As to claim 3, Thompson teaches the apparatus of claim 2, wherein the at least one processor (Thompson, FIG. 1, [0035], “secure processing system 101”) is configured to:
analyze a plurality of windows in the at least one frame (Thompson, FIG. 7D, [0054], “the display 755 includes a set of regions 757 that is located near the top of the display, a set of regions 758 that is located near the middle of the display, and a set of regions 759 that is located near the bottom of the display”) based on the set of coordinates for each of the one or more regions of the at least one frame that include all of the first subset of pixels (Thompson, e.g., FIG. 7D, [0054], “the display 755 has been logically separated into three regions that each contain a set of selectively located regions”).
As to claim 5, Thompson in view of Chaji teaches the apparatus of claim 1, wherein to increase the brightness value of each of the first subset of pixels (Chaji, FIG. 7, [0062], “the display brightness can increase 754 until the display-aging is within the defined thresholds”) or decrease the brightness value of each of the second subset of pixels (Chaji, FIG. 7, [0062], “the display brightness BR is adjusted (here reduced) 752 if the display brightness BR is above the minimum allowable brightness BRMIN 742”), the at least one processor (Thompson, FIG. 1, [0035], “secure processing system 101”) is configured to:
mitigate a difference in the brightness value of each of the second subset of pixels and the brightness value of each of the first subset of pixels (Chaji, FIG. 7, [0062], e.g., mitigating the difference in the brightness value by comparing whether “BR > BRMIN” or “BR < BRMAX”, i.e., setting the brightness within the range between “BRMIN and BRMAX”). Examiner renders the same motivation as in claim 1.
As to claim 6, Chaji teaches the apparatus of claim 1, wherein each of the second subset of pixels includes the decay ratio that is greater than the decay ratio threshold (Chaji, FIG. 7, [0062], “A < A2” → NO), and wherein the decay ratio that is greater than the decay ratio threshold corresponds to a pixel that is less likely to decay compared to a pixel including the decay ratio that is less than the decay ratio threshold (Chaji, FIG. 7, [0062], “wait predefined delay period 760”). Examiner renders the same motivation as in claim 1.
As to claim 7, Thompson teaches the apparatus of claim 1, wherein the at least one processor (Thompson, FIG. 1, [0035], “secure processing system 101”) is configured to:
mark each of the first subset of pixels in the set of pixels, wherein each of the first subset of pixels includes the decay ratio that is less than the decay ratio threshold (Thompson, FIG. 7E, [0055], “The TBIM values from the set of regions 761 can be used to perform a method, such as a method shown in FIG. 7F, to provide information that can be used to verify the sufficiency of existing burn-in mitigation or to make changes to improve burn-in mitigation (e.g., if the existing burn-in mitigation is not sufficient) or to make changes to the UI to reduce burn-in, etc.”).
As to claim 10, Thompson teaches the apparatus of claim 1, wherein the at least one processor (Thompson, FIG. 1, [0035], “secure processing system 101”) is configured to:
transmit a second indication of the increased brightness value of each of the first subset of pixels in the one or more regions or the decreased brightness value of each of the second subset of pixels in the one or more regions (Thompson, FIG. 2, [0037], “in operation 211 in FIG. 2, the system collects burn-in statistics (BIS) 114 which can be a snapshot of display intensities for each frame”).
As to claim 11, Thompson teaches the apparatus of claim 1, wherein the one or more regions correspond to one or more anti-aging compensation regions (Thompson, FIG. 7C, [0053], “FIG. 7C shows another example of the use of burn-in metrics for a display in a data processing system”).
As to claim 12, Thompson teaches the apparatus of claim 1, wherein the one or more regions include a first region and a second region (Thompson, FIG. 7D, [0054], e.g., “the display 755 has been logically separated into three regions that each contain a set of selectively located regions”), wherein the first region and the second region together include all of the first subset of pixels (Thompson, FIG. 7D, [0054], “one or more sets of regions that can be selectively located in locations that are anticipated to possibly experience high burn-in or show high burn-in effects”).
As to claim 13, Thompson teaches the apparatus of claim 1, wherein the decay ratio threshold is obtained via a run- time analysis (Thompson, e.g., FIG. 1, [0037], “an accumulation buffer 117 can be used to accumulate the latest burn-in statistics through processes 5 and 6 shown in FIG. 1”), or wherein the decay ratio threshold is preconfigured.
As to claim 14, Thompson teaches the apparatus of claim 1, wherein the one or more regions of the at least one frame that include all of the first subset of pixels (Thompson, FIG. 2, [0037], “the compensation values can be used for less than all of the images displayed on the display in certain embodiments”; [0043], “Each bin can correspond to a different quantized level of aging, from the least aged to most aged bins”) are identified based on at least one other application (Thompson, FIG. 8A, [0058], “FIG. 8A shows an example of an application program 802, which can execute on the application processing system 102 shown in FIG. 1. The application program may be a movie presentation program (e.g., a Netflix application) or a game program which receives high dynamic range or extended dynamic range content 803 and which processes that content to output pixel luminance values at an output 811 for display on a display coupled to display hardware 110”) or a preconfiguration.
As to claim 15, Thompson teaches the apparatus of claim 1, further comprising at least one of an antenna or a transceiver (Thompson, FIG. 9, [0059], “secure interface 919 … a Bluetooth radio, other radios such as WiFi and NFC radios, cellular telephone radios, etc.”) coupled to the at least one processor (Thompson, FIG. 9, [0059], “allows a secure communication between the application processor(s) 921 and the secure processing system processor(s) 915”), wherein the at least one processor is configured to obtain the indication of the at least one frame via at least one of the antenna or the transceiver (Thompson, see FIG. 9), and wherein the one or more regions of the at least one frame that include all of the first subset of pixels are identified by at least one of: a display processing unit (DPU) driver, a central processing unit (CPU) (Thompson, FIG. 9, [0059], “An example of a secure processing system, such as secure processing system 903, is described in published U.S. Patent Publication No. US 2014/0089682”; FIG. 1, “SOC 10” including “CPU complex 14”), DPU driver software, a DPU, a display driver, or display driver software.
As to claim 16, it differs from claim 1 only in that it is the method performed by the apparatus of claim 1. It recites substantially the same limitations as in claim 1, and Thompson in view of Chaji teaches them. Examiner renders the same motivation as in claim 1. Please see claim 1 for detailed analysis.
As to claims 17-18, they recite substantially the same limitations as in claims 2-3, respectively, and Thompson teaches them. Please see claims 2-3 for detailed analysis.
As to claim 20, they recite substantially the same limitations as in claim 5, and Thompson in view of Chaji teaches them. Examiner renders the same motivation as in claim 1. Please see claim 5 for detailed analysis.
Allowable Subject Matter
Claims 4, 8-9 and 19 would be allowable if rewritten to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
As to claim 4, the closest known prior art, i.e., Thompson et al. (US 2018/0350296 A1), Chaji (US 2016/0293102 A1), Gulati et al. (US 2014/0089682 A1), Yang et al. (US 2022/0093059 A1) and Holland et al. (US 2021/0183334 A1), alone or in reasonable combination, fails to teach limitations in consideration of the claims as a whole, specifically with respect to the limitations “determine that the one or more regions correspond to an entire area of the at least one frame; and refrain from increasing the brightness value of each of the first subset of pixels and refrain from decreasing the brightness value of each of the second subset of pixels based on the one or more regions corresponding to the entire area of the at least one frame”.
As to claim 8, the closest known prior art indicated above, alone or in reasonable combination, fails to teach limitations in consideration of the claims as a whole, specifically with respect to the limitations “wherein the decay ratio threshold corresponds to a list of decay ratios for all of the set of pixels included in the at least one frame, and wherein the list of decay ratios is ordered based on an increasing value of the decay ratios for each of the set of pixels or a decreasing value of the decay ratios for each of the set of pixels”.
As to claim 9, the closest known prior art indicated above, alone or in reasonable combination, fails to teach limitations in consideration of the claims as a whole, specifically with respect to the limitations “wherein the brightness value of each of the first subset of pixels is increased at a same time that the brightness value of each of the second subset of pixels is decreased”.
As to claim 19, it recites substantially the same limitations as in claim 4, and is allowable for the same reason above. Please see claim 4 for detailed analysis.
Conclusion
The prior arts made of record and not relied upon are considered pertinent to applicant’s disclosure: Yang et al. (US 2022/0093059 A1) teaches the concept of “panel-specific aging profile based on a comparison between one or more properties of the stressed reference pixel and non-stressed reference pixel” (Abs.); and Holland et al. (US 2021/0183334 A1) teaches the concept of “history update corresponding to an estimated burn-in aging effect of the pixels based on usage” (Abs.).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RICHARD J HONG whose telephone number is (571) 270-7765. The examiner can normally be reached on 9:00 AM to 6:00 PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LunYi Lao can be reached on (571) 272-7671. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
Feb. 20, 2026
/RICHARD J HONG/Primary Examiner, Art Unit 2621
***