DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on 05/05/2026 has been considered by Examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4, 8-10, and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Dong et al (US 2022/0076602 A1) in view of Jang et al (US 2021/0407437 A1).
Claim 1, Dong (Fig. 1-15) discloses a display device (01; Fig. 12; wherein discloses a display apparatus) comprising:
a display panel (Fig. 10) including a plurality of pixel rows (210; Fig. 10; Paragraph [0125]);
a scan driver (250; Fig. 12) configured to provide a scan signal (Gn; Fig. 4 and 6) and a sensing signal (Sn; Fig. 4 and 6) to each of the plurality of pixel rows (210; Fig. 10; Paragraph [0125]);
a data driver (20; Fig. 10; Paragraph [0135]; wherein discloses “the detection circuit 20 may be implemented as a chip (e.g., a semiconductor chip and IC) or a field programmable gate array (FPGA) circuit. For example, the detection circuit 20 further has a function of providing the data signal”) connected to the plurality of pixel rows (210; Fig. 10; Paragraph [0125]) through a plurality of data lines (DL; Fig. 6);
a sensing circuit (20; Fig. 6) connected to the plurality of pixel rows (210; Fig. 10; Paragraph [0125]) via a plurality of sensing lines (SENL2; Fig. 6); and
wherein each pixel (Fig. 6) comprises:
the driving transistor (T1; Fig. 6) having a gate (Fig. 6; wherein figure shows gate electrode of transistor T1 connected to node N1), a source receiving a first power voltage (VDD; Fig. 6; wherein figure shows electrode of transistor T1 connected to power supply VDD), and a drain (Fig. 6; wherein figure shows other electrode of transistor T1 connected to node N2);
a first switching transistor (T5; Fig. 6) having a gate configured to receive the scan signal (Gn; Fig. 6), a drain connected (T5; Fig. 6) to a corresponding one of the plurality of data lines (DL; Fig. 6), and a source connected (T5; Fig. 6) to the gate of the driving transistor (T1; Fig. 6);
a fourth switching transistor (T3; Fig. 6) having a gate configured to receive the sensing signal (Sn; Fig. 6), a drain connected (Fig. 5A and 5B; wherein figure shows both transistors T3 and T2 being enabled) to the drain of the driving transistor (N2 and T1; wherein figure shows electrode of transistor T3 is connected through the enabled transistor T2 in figures 5A and 5B), and a source connected (T3; Fig. 6) to a corresponding one of the plurality of sensing lines (SENL2; Fig. 6);
a storage capacitor (C1; Fig. 6) having a first electrode connected to the source of the driving transistor (T1; Fig. 6), and a second electrode (C1; Fig. 6) connected to the drain (N2; Fig. 6; Fig. 5A and 5B; wherein figure shows both transistors T3 and T2 being enabled) of the driving transistor (T1; Fig. 6) through a second transistor (T2; Fig. 6) and to the gate (N1; Fig. 6) of the driving transistor (T1; Fig. 6); and
a light emitting element (EL; Fig. 6) having an anode and a cathode (EL; Fig. 6) connected between the source (N2; Fig. 6) of the driving transistor (T1; Fig. 6) and a second power voltage (VSS; Fig. 6),
wherein the source voltage (VDD; Fig. 6) of the driving transistor (T1; Fig. 6) is fixed to the first power voltage (VDD; Fig. 6) during the sensing period (Fig. 4: Paragraph [0105]), and the drain voltage (N2; Fig. 5A and 5B) of the driving transistor (T1; Fig. 5A and 5B) is the same as the gate voltage (N1; Fig. 5A and 5B), and
wherein the driving transistor (T1; Fig. 5B) has its gate node (N1; Fig. 5B) and drain node (N2; Fig. 5B) connected when charging (ST_CH; Fig. 4) the sensing line (SENL2; Fig. 5B).
Dong does not expressly disclose a controller configured to control the scan driver, the data driver, and the sensing circuit, and to select at least one pixel row from among the plurality of pixel rows during a vertical blanking period of each frame interval,
wherein the vertical blanking period includes a sensing period during which the sensing circuit performs a sensing operation on the selected pixel row,
wherein the sensing circuit is configured to measure a first drain voltage of a driving transistor of each pixel in the selected pixel row at a first point in time during the sensing period, and to measure a second drain voltage of the driving transistor at a second point in time during the sensing period, and
wherein the controller is configured to predict a current saturation drain voltage of the driving transistor based on the first drain voltage and the second drain voltage, and to calculate a threshold voltage variation of the driving transistor based on the difference between a previous saturation drain voltage and the current saturation drain voltage.
Jang (Fig. 1-11; Paragraph [0085]; wherein discloses “the transistors disposed in the subpixels SP may be not only n-type transistors, but also p-type transistors”) discloses a controller (140; Fig. 1 and 11) configured to control (Paragraph [0056]) the scan driver (120; Fig. 1), the data driver (130; Fig. 1), and the sensing circuit (134; Fig. 11), and to select at least one pixel row (Paragraph [0084]; wherein discloses sensing from a single gate line) from among the plurality of pixel rows (SP; Fig. 1; Paragraph [0044]; wherein discloses “a plurality of subpixels SP are aligned in rows and columns”) during a vertical blanking period (Blank; Fig. 9) of each frame interval (Frame1; Fig. 9 and [0135-0136]),
wherein the vertical blanking period (Blank; Fig. 9) includes a sensing period (Tracking1 and Tracking2; Fig. 9) during which the sensing circuit (134; Fig. 4) performs a sensing operation (Vsen; Fig. 4) on the selected pixel row (Paragraph [0135-0136]; wherein discloses sensing from a single gate line),
wherein the sensing circuit (134; Fig. 4) is configured to measure a first drain voltage (N2 during Tracking1 of Figure 9; Paragraph [0015]; wherein discloses “a sensing transistor electrically connected between either a source node or a drain node of the driving transistor and a reference voltage line”; N2; Fig. 4) of a driving transistor (DRT; Fig. 4) of each pixel (SP; Fig. 4 and 1) in the selected pixel row (Paragraph [0084]; wherein discloses sensing from a single gate line) at a first point in time (Tracking1; Fig. 9) during the sensing period (Tracking1 and Tracking2; Fig. 9), and to measure a second drain voltage (N2 during Tracking2 of Figure 9; Paragraph [0015]; wherein discloses “a sensing transistor electrically connected between either a source node or a drain node of the driving transistor and a reference voltage line”; N2; Fig. 4) of the driving transistor (DRT; Fig. 4) at a second point in time (Tracking2; Fig. 9) during the sensing period (Tracking1 and Tracking2; Fig. 9), and
wherein the controller (140; Fig. 11) is configured to predict (146; Fig. 11; Paragraph [0141]; Fig. 8) a current saturation (Paragraph [0120]; wherein discloses a saturation state) drain voltage (N2; Fig. 4) of the driving transistor (DRT; Fig. 4) based on the first drain voltage (N2 during Tracking1; Fig. 9) and the second drain voltage (N2 during Tracking2; Fig. 9), and to calculate a threshold voltage variation (Paragraph [0144]; Paragraph [0157-0158]) of the driving transistor (DRT; Fig. 4) based on the difference between (Paragraph [0178]; wherein discloses “ by comparing the reference threshold voltage or the reference mobility stored in the outer memory 180 with it”) a previous saturation drain voltage (180; Fig. 11) and the current saturation drain voltage (148; Fig. 11).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong’s display device by applying a sensing method, as taught by Jang, so to use a display device with a sensing method for providing a method of sensing a characteristic value of circuit element and a display device using it able to shorten the threshold voltage sensing and compensation time of the driving transistor (Paragraph [0010]).
Claim 10, Dong (Fig. 1-15) discloses a threshold voltage sensing method (Fig. 4 and 5A-5C) in a display device (01; Fig. 10 and 12) comprising a plurality of pixel rows (210; Fig. 10; Paragraph [0125]),
wherein the source voltage (VDD; Fig. 6) of the driving transistor (T1; Fig. 6) is fixed to the first power voltage (VDD; Fig. 6) during the sensing period (Fig. 4: Paragraph [0105]), and the drain voltage (N2; Fig. 5A and 5B) of the driving transistor (T1; Fig. 5A and 5B) is the same as the gate voltage (N1; Fig. 5A and 5B), and
wherein the driving transistor (T1; Fig. 5B) has its gate node (N1; Fig. 5B) and drain node (N2; Fig. 5B) connected when charging (ST_CH; Fig. 4) the sensing line (SENL2; Fig. 5B).
Dong does not expressly disclose the method comprising:
selecting at least one pixel row from among the plurality of pixel rows during a vertical blanking period of each frame interval;
measuring a first drain voltage of a driving transistor of each pixel in the selected pixel row at a first point in time during the sensing period within the vertical blanking period; measuring a second drain voltage of the driving transistor at a second point in time during the sensing period;
predicting a current saturation drain voltage of the driving transistor based on the first drain voltage and the second drain voltage; and
calculating a threshold voltage variation of the driving transistor based on the difference between a previous saturation drain voltage and the current saturation drain voltage.
Jang (Fig. 1-11; Paragraph [0085]; wherein discloses “the transistors disposed in the subpixels SP may be not only n-type transistors, but also p-type transistors”) discloses
the method (Fig. 9) comprising:
selecting at least one pixel row (Paragraph [0084]; wherein discloses sensing from a single gate line) from among the plurality of pixel rows (SP; Fig. 1; Paragraph [0044]; wherein discloses “a plurality of subpixels SP are aligned in rows and columns”) during a vertical blanking period (Blank; Fig. 9) of each frame interval (Frame1 and Frame2; Fig. 9);
measuring (134; Fig. 4) a first drain voltage (N2 during Tracking1 of Figure 9; Paragraph [0015]; wherein discloses “a sensing transistor electrically connected between either a source node or a drain node of the driving transistor and a reference voltage line”; N2; Fig. 4) of a driving transistor (DRT; Fig. 4) of each pixel (SP; Fig. 4 and 1) in the selected pixel row (Paragraph [0084]; wherein discloses sensing from a single gate line) at a first point in time (Tracking1; Fig. 9) during the sensing period (Tracking1 and Tracking2; Fig. 9) within the vertical blanking period (Blank; Fig. 9);
measuring (134; Fig. 4) a second drain voltage (N2 during Tracking2 of Figure 9; Paragraph [0015]; wherein discloses “a sensing transistor electrically connected between either a source node or a drain node of the driving transistor and a reference voltage line”; N2; Fig. 4) of the driving transistor (DRT; Fig. 4) at a second point in time (Tracking2; Fig. 9) during the sensing period (Tracking1 and Tracking2; Fig. 9);
predicting (146; Fig. 11; Paragraph [0141]; Fig. 8) a current saturation drain voltage (Paragraph [0120]; wherein discloses a saturation state) of the driving transistor (DRT; Fig. 4) based on the first drain voltage (N2 during Tracking1; Fig. 9) and the second drain voltage (N2 during Tracking2; Fig. 9); and
calculating a threshold voltage variation (Paragraph [0144]; Paragraph [0157-0158]) of the driving transistor (DRT; Fig. 4) based on the difference between (Paragraph [0178]; wherein discloses “ by comparing the reference threshold voltage or the reference mobility stored in the outer memory 180 with it”) a previous saturation drain voltage (180; Fig. 11) and the current saturation drain voltage (148; Fig. 11).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong’s display device by applying a sensing method, as taught by Jang, so to use a display device with a sensing method for providing a method of sensing a characteristic value of circuit element and a display device using it able to shorten the threshold voltage sensing and compensation time of the driving transistor (Paragraph [0010]).
Claim 2, Jang (Fig. 1-11) discloses wherein the threshold voltage variation (Paragraph [0178]) of the driving transistor (DRT; Fig. 4) is calculated by reflecting the current saturation drain voltage (Fig. 7; Paragraph [0139]; N2; Fig. 9) obtained through the current sensing operation (Paragraph [0142]; Fig. 9) from the previous drain-source voltage obtained through the previous sensing operation (180; Fig. 11).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong’s display device by applying a sensing method, as taught by Jang, so to use a display device with a sensing method for providing a method of sensing a characteristic value of circuit element and a display device using it able to shorten the threshold voltage sensing and compensation time of the driving transistor (Paragraph [0010]).
Claim 4, Jang (Fig. 1-11) discloses Jang (Fig. 1-11) discloses wherein the controller (140; Fig. 1) is configured to sequentially select (Paragraph [0050]; wherein discloses sequentially supplying scan signal; Fig. 5; wherein the disclosed embodiment uses the same scan signal for scan and sense signal) the plurality of pixel rows (SP; Fig. 1) in which the sensing operation (Tracking; Fig. 10) is to be performed across a plurality of frame intervals (Frame1 and Frame2; Fig. 10).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong’s display device by applying a sensing method, as taught by Jang, so to use a display device with a sensing method for providing a method of sensing a characteristic value of circuit element and a display device using it able to shorten the threshold voltage sensing and compensation time of the driving transistor (Paragraph [0010]).
Claim 8, Jang (Fig. 1-11) discloses wherein the data driver (130; Fig. 1) is configured to apply a sensing data voltage (Vdata_sen; Fig. 6) to the plurality of data lines (DL; Fig. 1) during the sensing period (Fig. 6; wherein figure shows method of driving during sensing operation),
the scan driver (120; Fig. 1) is configured to apply the scan signal (Scan; Fig. 6) and the sensing signal (Sense; Fig. 6) to the selected pixel row (Paragraph [0084]; wherein discloses sensing from a single gate line) during the sensing period (Fig. 6; wherein figure shows method of driving during sensing operation), and
the sensing circuit (134; Fig. 4) is configured to apply a reference voltage (Vref; Fig. 5) to the plurality of sensing lines (RVL; Fig. 3) before the sensing period (Initial period; Fig. 6), to sample the voltage (Sampling; Fig. 6) of each of the plurality of sensing lines (RVL; Fig. 4) at a first point in time (Tracking1; Fig. 9) during the sensing period (Fig. 9) to measure the first drain voltage (N2; Fig. 4; Paragraph [0078]; wherein discloses Node N2 may be a drain node), and to sample the voltage (Sampling; Fig. 6) of each of the plurality of sensing lines (RVL; Fig. 4) at a second point in time (Tracking2; Fig. 9) during the sensing period (Fig. 9) to measure the second drain voltage (N2; Fig. 4; Paragraph [0078]; wherein discloses Node N2 may be a drain node).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong’s display device by applying a sensing method, as taught by Jang, so to use a display device with a sensing method for providing a method of sensing a characteristic value of circuit element and a display device using it able to shorten the threshold voltage sensing and compensation time of the driving transistor (Paragraph [0010]).
Claim 9, Jang (Fig. 1-11) discloses wherein the vertical blanking period (Blank; Fig. 9) is configured to perform external compensation (Paragraph [0179]; Fig. 11; wherein calculated compensation is external from the display device) for one or more of the lines (Paragraph [0084]; wherein discloses sensing from a single gate line) in each frame (Frame1; Fig. 9).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong’s display device by applying a sensing method, as taught by Jang, so to use a display device with a sensing method for providing a method of sensing a characteristic value of circuit element and a display device using it able to shorten the threshold voltage sensing and compensation time of the driving transistor (Paragraph [0010]).
Claim 12, Jang (Fig. 1-11) discloses wherein the step of calculating the threshold voltage variation (Paragraph [0020]) of the driving transistor (DRT; Fig. 4) includes:
calculating the threshold voltage variation (Paragraph [0178]) of the driving transistor (DRT; Fig. 4) by reflecting the current saturation drain voltage (Fig. 7; Paragraph [0139]; N2; Fig. 9) obtained through the current sensing operation (Paragraph [0142]; Fig. 9) from the previous drain-source voltage obtained through the previous sensing operation (180; Fig. 11).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong’s display device by applying a sensing method, as taught by Jang, so to use a display device with a sensing method for providing a method of sensing a characteristic value of circuit element and a display device using it able to shorten the threshold voltage sensing and compensation time of the driving transistor (Paragraph [0010]).
Claim 13, Jang (Fig. 1-11) discloses wherein the step of selecting the pixel row (Paragraph [0084]; wherein discloses sensing from a single gate line) includes:
sequentially selecting (Paragraph [0050]; wherein discloses sequentially supplying scan signal; Fig. 5; wherein the disclosed embodiment uses the same scan signal for scan and sense signal) the plurality of pixel rows (SP; Fig. 1) in which the sensing operation (Tracking; Fig. 10) is to be performed across a plurality of frame intervals (Frame1 and Frame2; Fig. 10).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong’s display device by applying a sensing method, as taught by Jang, so to use a display device with a sensing method for providing a method of sensing a characteristic value of circuit element and a display device using it able to shorten the threshold voltage sensing and compensation time of the driving transistor (Paragraph [0010]).
Claims 5 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Dong et al (US 2022/0076602 A1) in view of Jang et al (US 2021/0407437 A1) as applied to claims 1 and 10 above, and further in view of Kim et al (US 2018/0130423 A1).
Claim 5, Dong in view of Jang discloses the display device according to claim 1.
Dong in view of Jang does not expressly disclose wherein the controller is configured to randomly select the plurality of pixel rows in which the sensing operation is to be performed across a plurality of frame intervals.
Kim (Fig. 1-22) discloses wherein the controller (21; Fig. 1) is configured to randomly select (Paragraph [0106]) the plurality of pixel rows (Lb, Lc, and La; Fig. 13) in which the sensing operation (Sensing; Fig. 13) is to be performed across a plurality of frame intervals (F(n)-F(n+2); Fig. 13).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong in view of Jang’s display device by applying random sensing, as taught by Kim, so to use a display device with random sensing for providing to minimize or prevent the sensing target display line from being recognized as a line dim (Paragraph [0106]).
Claim 14, Dong in view of Jang discloses the threshold voltage sensing method of a display device according to claim 10.
Dong in view of Jang does not expressly disclose wherein the step of selecting the pixel row includes:
randomly selecting the pixel row in which the sensing operation is to be performed from among the plurality of pixel rows in each frame interval.
Kim (Fig. 1-22) discloses wherein the step of selecting the pixel row (Sensing; Fig. 3) includes:
randomly selecting (Paragraph [0106]) the pixel row (Lb, Lc, and La; Fig. 13) in which the sensing operation (Sensing; Fig. 13) is to be performed from among the plurality of pixel rows L1-Ln; Fig. 13) in each frame interval (F(n)-F(n+2); Fig. 13).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Dong in view of Jang’s display device by applying random sensing, as taught by Kim, so to use a display device with random sensing for providing to minimize or prevent the sensing target display line from being recognized as a line dim (Paragraph [0106]).
Response to Arguments
Applicant's arguments with respect to claims 1-2, 4-5, and 8-14 have been considered but are moot in view of the new ground(s) of rejection.
In view of arguments, the references of Dong et al (US 2022/0076602 A1) and Jang et al (US 2021/0407437 A1), and Kim et al (US 2018/0130423 A1) have been used for new ground rejection.
Claims 1 and 10 are rejected in view of newly discovered reference(s) to Dong et al (US 2022/0076602 A1).
Allowable Subject Matter
Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 11, the amended claim limitations now more clearly define the mathematical expression. After further review the Examiner believes the currently available prior art references do not teach or discloses the claimed formula in the same manner.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM J SNYDER whose telephone number is (571)270-3460. The examiner can normally be reached Monday-Friday 8am-4:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh D Nguyen can be reached at (571)272-7772. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Adam J Snyder/Primary Examiner, Art Unit 2623 06/16/2026
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