DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Application Publication No. 2019/0364234 to Yanagida (“Yanagida”).
Regarding claim 1, Yanagida teaches an imaging device comprising: a signal line that changes in potential on the basis of a charge accumulated according to a current passing when a signal is read from a pixel; a signal line transistor electrically connected to the signal line; and a voltage generation unit connected in series to the signal line transistor and being capable of generating a voltage higher than 0 V (Figure 1 shows a pixel unit of an imaging device including a signal line reference number 102 transferring charges accumulated from the photodiode reference number 105; reference number M3 is a transistor electrically connected to the signal line 102 and the voltage source, Vdd is connected in series to M3).
Regarding claim 2, Yanagida teaches the imaging device according to claim 1, wherein the potential of the signal line is a potential of a parasitic capacitance of the signal line (see paragraph [0176] regarding discharged the accumulated parasitic capacitance).
Regarding claim 3, Yanagida teaches the imaging device according to claim 1, wherein the pixel includes: a photodiode; a transfer transistor that transfers a charge accumulated in the photodiode to a floating diffusion; a reset transistor that resets the floating diffusion; an amplification transistor that outputs a signal corresponding to a potential of the floating diffusion; and a selection transistor connected between the amplification transistor and the signal line (Figure 1 shows the photodiode 105, floating diffusion 101, reset transistor M1, and amplification transistor M2, and selection transistor M3 connected to the signal line 102).
Regarding claim 6, Yanagida teaches the imaging device according to claim 1, wherein the voltage generation unit sets a reset level of the signal line upon reading of a reset level from the pixel such that the reset level of the signal line is equal to or higher than a reset level of the signal line upon reading of a signal level from the pixel (see paragraph [0198]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Yanagida as applied to claim 1 above, and further in view of U.S. Patent Application Publication No. 2016/0227135 to Matolin et al. (“Matolin”)
Regarding claims 4-5, Yanagida teaches the imaging device according to claim 1, but is silent on wherein the voltage generation unit includes a diode-connected transistor or plurality of diode-connected transistors connected in series in varying numbers. Matolin teaches a plurality of diode-connected gain transistors connected in series, see paragraph [0141]).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify the teaching of Yanagida with that of Matolin to improve fixed pattern noise such as described in Matolin.
Claim 7 are rejected under 35 U.S.C. 103 as being unpatentable over Yanagida as applied to claim 1 above, and further in view of U.S. Patent Application Publication No. 2020/0162067 to Kim (“Kim”).
Regarding claim 7, Yanagida teaches the imaging device according to claim 1, but is silent on further comprising a comparator that compares the potential of the signal line and a ramp signal. Kim teaches a comparator that compares the potential of the signal line and a ramp signal (see Figure 3 reference number 40 comparison unit comparing the output signal from the column signal line with a signal from 30, the ramp signal generator).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to add a comparator that compares the potential of the signal line with a ramp signal to reduce cross talk between respective columns and further reduce noise.
Claims 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Yanagida as applied to claim 1 above, and further in view of U.S. Patent Application Publication No. 2018/0108658 to Hanzawa (“Hanzawa”).
Regarding claims 15-16, Yanagida teaches the imaging device according to claim 1, but is silent on further comprising a chip on which the pixel is formed, wherein the signal line transistor is formed on the chip and wherein the voltage generation unit is formed on the chip.
Hanzawa teaches a voltage generation circuit and transistors formed on a chip, see paragraph [0109]).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify the teaching of Yanagida with that of Hanzawa to form the transistor and voltage generation unit on the same chip for improved efficiency.
Allowable Subject Matter
Claims 8-14, 17-20 are objected to as being dependent upon a rejected base claim 1 but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMY R HSU whose telephone number is (571)270-3012. The examiner can normally be reached 9am-5pm.
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AMY R. HSU
Examiner
Art Unit 2664
/AMY R HSU/Primary Examiner, Art Unit 2638
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