CTNF 19/104,778 CTNF 82519 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 13-15, 17-19, 21 and 23-27 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Grbovic (U.S. Patent 7,368,972) . Claim 13: Grbovic teaches a gate driving device (Figures 1-3 and 5) comprising: a command generation circuit (R7A, R7B, C9 in Figure 2, D5 in Figure 3, and D3 in Figure 5) which generates and outputs a gate drive command (to TR1 and TR3 that drive 11 on line G) on the basis of an input signal (input signal on 21); a constant output circuit (R7C and D7; Figure 2) which is connected in parallel to the command generation circuit (D7 is parallel to R7B; Figure 2) and outputs a constant voltage signal or a constant current signal on the basis of the input signal (voltage drop across the diode based on the input at 21); an amplification circuit (TR1 and TR3; Figures 3 and 5) to which the constant voltage signal or the constant current signal is inputted (via 20) and which amplifies the gate drive command (column 4 lines 18-23); and a current limitation element (R9 and R10 in Figure 3 and R6 in Figure 5) which is provided on an input side or an output side of the amplification circuit (output of TR1 and TR3) and which suppresses a backflow of current (column 5 lines 15-22), wherein the gate driving device applies a gate drive voltage (voltage at 23) obtained by combining the gate drive command and the constant voltage signal or the constant current signal (at 22), to a gate terminal of a semiconductor switching element (via D5 and D3). Claim 14: Grbovic further teaches that the command generation circuit includes a constant voltage element (D3; Figure 5) which is to clamp a voltage at a certain voltage lower than a power supply voltage of the amplification circuit so as to keep the gate drive command at the certain voltage (column 5 lines 12-15). Claim 15: Grbovic further teaches that the command generation circuit includes an RC resonance circuit composed of a capacitor (C9; Figure 2) and a resistor (R7A) connected in parallel to each other. Claim 17: Grbovic further teaches that the command generation circuit includes a constant current element (R7A) and a capacitor (C9) connected in parallel to each other. Claim 18: Grbovic further teaches that the current limitation element (R9; Figure 3) is provided between an output side of the command generation circuit (at node 22) and the input side of the amplification circuit (base of TR1 and TR3), and a connection point to which an output end of the constant output circuit is connected is provided between the current limitation element and the input side of the amplification circuit (at node 22). Claim 19: Grbovic further teaches that the current limitation element includes at least one of a resistor (R7C) or a reactor. Claim 21: Grbovic further teaches that the constant voltage element is a zener diode (D3; Figure 5) whose breakdown voltage is the certain voltage (column 5 lines 12-15). Claim 23: Grbovic further teaches that the amplification circuit is a complementary emitter follower circuit or a complementary source follower circuit (TR1, TR3). Claim 24: Grbovic teaches a gate driving device (Figures 1-3 and 5) comprising: a command generation circuit (R7A, R7B, C9 in Figure 2, D5 in Figure 3, and D3 in Figure 5) which generates and outputs a gate drive command (to TR1 and TR3 that drive 11 on line G) on the basis of an input signal (input signal on 21); a constant output circuit (R7C and D7; Figure 2) which is connected in parallel to the command generation circuit (D7 is parallel to R7B; Figure 2) and outputs a constant voltage signal or a constant current signal on the basis of the input signal (voltage drop across the diode based on the input at 21); an amplification circuit (TR1 and TR3; Figures 3 and 5) to which the constant voltage signal or the constant current signal is inputted (via 20) and which amplifies the gate drive command (column 4 lines 18-23); a current limitation element (R9 and R10 in Figure 3 and R6 in Figure 5) which is provided on an input side or an output side of the amplification circuit (output of TR1 and TR3) and which suppresses a backflow of current (column 5 lines 15-22), wherein the gate driving device applies a gate drive voltage (voltage at 23) obtained by combining the gate drive command and the constant voltage signal or the constant current signal (at 22), to a gate terminal of a semiconductor switching element (via D5 and D3); and the command generation circuit includes a constant voltage element (D3; Figure 5) which is to clamp a voltage at a certain voltage lower than a power supply voltage of the amplification circuit so as to keep the gate drive command at the certain voltage (column 5 lines 12-15). Claim 25: Grbovic further teaches that the current limitation element (R9; Figure 3) is provided between an output side of the command generation circuit (at node 22) and the input side of the amplification circuit (base of TR1 and TR3), and a connection point to which an output end of the constant output circuit is connected is provided between the current limitation element and the input side of the amplification circuit (at node 22). Claim 26: Grbovic teaches a gate driving device (Figures 1-3 and 5) comprising: a command generation circuit (R7A, R7B, C9 in Figure 2, D5 in Figure 3, and D3 in Figure 5) which generates and outputs a gate drive command (to TR1 and TR3 that drive 11 on line G) on the basis of an input signal (input signal on 21); a constant output circuit (R7C and D7; Figure 2) which is connected in parallel to the command generation circuit (D7 is parallel to R7B; Figure 2) and outputs a constant voltage signal or a constant current signal on the basis of the input signal (voltage drop across the diode based on the input at 21); an amplification circuit (TR1 and TR3; Figures 3 and 5) to which the constant voltage signal or the constant current signal is inputted (via 20) and which amplifies the gate drive command (column 4 lines 18-23); a current limitation element (R9 and R10 in Figure 3 and R6 in Figure 5) which is provided on an input side or an output side of the amplification circuit (output of TR1 and TR3) and which suppresses a backflow of current (column 5 lines 15-22), wherein the gate driving device applies a gate drive voltage (voltage at 23) obtained by combining the gate drive command and the constant voltage signal or the constant current signal (at 22), to a gate terminal of a semiconductor switching element (via D5 and D3; and the command generation circuit includes a constant current element (R7A; Figure 2) and a capacitor (C9) connected in parallel to each other. Claim 27: Grbovic further teaches that the current limitation element (R9; Figure 3) is provided between an output side of the command generation circuit (at node 22) and the input side of the amplification circuit (base of TR1 and TR3), and a connection point to which an output end of the constant output circuit is connected is provided between the current limitation element and the input side of the amplification circuit (at node 22) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 16, 20 and 22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 16, the prior art does not fairly teach or suggest when a gate voltage of the semiconductor switching element rises, the command generation circuit controls change of the gate voltage with respect to time to be constant. Regarding claim 20, the prior art does not fairly teach or suggest the inequality described in combination with the limitations of claim 20. Regarding claim 22, the prior art does not fairly teach or suggest that the certain voltage is equal to a Miller voltage of the semiconductor switching element . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure : U.S. Patent 7,038,500 U.S. Patent 11,791,803 Any inquiry concerning this communication or earlier communications from the examiner should be directed to COLLEEN J O'TOOLE whose telephone number is (571)270-1273. The examiner can normally be reached Monday - Friday, 9:00 am - 6:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.J.O/Examiner, Art Unit 2836 /RYAN JOHNSON/Primary Examiner, Art Unit 2836 Application/Control Number: 19/104,778 Page 2 Art Unit: 2836 Application/Control Number: 19/104,778 Page 3 Art Unit: 2836 Application/Control Number: 19/104,778 Page 4 Art Unit: 2836 Application/Control Number: 19/104,778 Page 5 Art Unit: 2836 Application/Control Number: 19/104,778 Page 6 Art Unit: 2836 Application/Control Number: 19/104,778 Page 7 Art Unit: 2836
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