Prosecution Insights
Last updated: August 17, 2026
Application No. 19/105,015

COMMUNICATION DEVICE, COMMUNICATION METHOD, AND PROGRAM

Non-Final OA §103
Filed
Feb 19, 2025
Priority
Aug 29, 2022 — JP 2022-135890 +1 more
Examiner
HASSAN, AURANGZEB
Art Unit
Tech Center
Assignee
Sony Group Corporation
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
1y 5m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
618 granted / 770 resolved
+20.3% vs TC avg
Strong +17% interview lift
Without
With
+17.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
24 currently pending
Career history
793
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
56.3%
+16.3% vs TC avg
§102
27.2%
-12.8% vs TC avg
§112
5.4%
-34.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 770 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections 2. Claims 7 and 14 are objected to because of the following informalities: line 6 of claim 7 and line 6 of claim 14 recites “IF” which needs to be corrected if it is an abbreviation. Similar corrections should be made to the specification if needed to mirror the claims at the first use of the abbreviation. Appropriate correction is required. Claim Rejections - 35 USC § 103 3. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 4. Claims 1 – 16 are rejected under 35 U.S.C. 103 as being unpatentable over Kidamura et al. (US Publication Number 2015/0019919, hereinafter “Kidamura”) in view of Humphrey et al. (US Publication Number 2006/0242348, hereinafter “Humphrey”). 5. As per claims 1, 10, and 11, Kidamura teaches a communication device, method, and program comprising: a communication unit that performs I2C communication with an external communication device (communication between 2 and 3, via I2C bus comprised of 11 and 12, figure 1, paragraph 27); and a detection unit (detecting unit 232/233, figure 1) that detects an abnormality (detecting abnormality, paragraphs 36 - 38) in a condition portion generated by the external communication device on a basis of at least one of a first time constraint set for a Low period or a second time constraint set for a High period of a clock signal after completion of transmission of a response signal subsequent to data (constraints consist of high and low levels in conjunction with the ½ cycle handling, paragraphs 35 – 41 for the clock signal seen in figure 1, paragraphs 42 – 46). Kidamura does not appear to explicitly disclose performs I2C communication with an external communication device serving as a master. However, Humphrey discloses performs I2C communication (via I2C bus 17, figure 1, paragraph 24) with an external communication device serving as a master (master 11 communicating with slave 19, figure 1, paragraph 24 and detects abnormality on a basis of Low period, paragraphs 31 and 32 stuck-low). Kidamura and Humphrey are analogous art because they are from the same field of endeavor of I2C communication handling. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kidamura and Humphrey before him or her, to modify the structure of Kidamura to include the configuration of Humphrey because Kidamura discloses the structure required for master communication via ports so it would be a natural step to include the actual interaction. One of ordinary skill would be motivated to make such modification in order to enhance communication between a master and slave (paragraphs 4 – 6). Therefore, it would have been obvious to combine Humphrey with Kidamura to obtain the invention as specified in the instant claims. 6. As per claims 11, 15, and 16, Kidamura teaches a communication device, method, and program comprising: a communication unit that performs I2C communication with an external communication device (communication between 2 and 3, via I2C bus comprised of 11 and 12, figure 1, paragraph 27, slave end 9, figure 1); and a control unit (control unit 231, figure 1) that transmits, to the external device by using the I2C communication (I2C communication for processing, paragraph 32), a parameter (feedback control signal, paragraph 40) indicating a period of at least one of a first time constraint on a Low period or a second time constraint on a High period of a clock signal after completion of transmission of a response signal subsequent to data (constraints consist of high and low levels in conjunction with the ½ cycle handling, paragraphs 35 – 41 for the clock signal seen in figure 1, paragraphs 42 – 46) and to be used in the external device for detection of an abnormality in a condition portion generated by the communication unit (detecting abnormality, paragraphs 36 - 38). Kidamura does not appear to explicitly disclose performs I2C communication with an external communication device serving as a slave. However, Humphrey discloses performs I2C communication (via I2C bus 17, figure 1, paragraph 24) with an external communication device serving as a slave (master 11 communicating with slave 19, figure 1, paragraph 24 and detects abnormality on a basis of Low period, paragraphs 31 and 32 stuck-low). Kidamura and Humphrey are analogous art because they are from the same field of endeavor of I2C communication handling. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Kidamura and Humphrey before him or her, to modify the structure of Kidamura to include the configuration of Humphrey because Kidamura discloses the structure required for slave communication via ports so it would be a natural step to include the actual interaction. One of ordinary skill would be motivated to make such modification in order to enhance communication between a master and slave (paragraphs 4 – 6). Therefore, it would have been obvious to combine Humphrey with Kidamura to obtain the invention as specified in the instant claims. 7. Kidamura modified by the teachings of Humphrey as seen in claim 1 above, as per claim 2, Kidamura teaches a device, wherein the detection unit detects an abnormality in a case where the Low period of the clock signal after completion of transmission of the response signal is shorter or longer than a period set as the first time constraint (low period represented by low-stuck fault, paragraphs 42, 43, 45, 46, and 54). 8. Kidamura modified by the teachings of Humphrey as seen in claim 1 above, as per claim 3, Kidamura teaches a device, wherein the detection unit detects an abnormality in a case where the High period of the clock signal after completion of transmission of the response signal is shorter or longer than a period set as the second time constraint (high period represented by high-stuck, paragraphs 33, 42, and 54 – 56). 9. Kidamura modified by the teachings of Humphrey as seen in claim 1 above, as per claim 4, Kidamura teaches a device, wherein the second time constraint is a period longer than or equal to a period obtained by addition of a setup period of a repeated start condition and a hold period of a start condition (1/2 cycle of clock threshold elapsed since detection of predetermined level, paragraphs 40 and 71). 10. Kidamura modified by the teachings of Humphrey as seen in claim 1 above, as per claim 5, Kidamura teaches a device, wherein the second time constraint is a period longer than or equal to a period obtained by addition of a setup period of a stop condition and a bus free period between a stop condition (stop condition, paragraphs 46, 57 and 59) and a start condition (start condition, paragraphs 45, 51, and 53). 11. Kidamura modified by the teachings of Humphrey as seen in claim 1 above, as per claim 6, Kidamura teaches a device, wherein in a case where the abnormality in the condition portion is detected, the detection unit transmits error information indicating that the abnormality is detected to the external communication device via a predetermined signal line (detection unit 233, figure 1, communicates with 231 of high-stuck fault along the stuck fault notification signal, paragraphs 64 – 66). 12. Kidamura modified by the teachings of Humphrey as seen in claim 1 above, as per claims 7 and 14, Kidamura teaches a device, further comprising another communication unit (241, third unit configuration, figure 1) that generates frame data in a predetermined format used for transmission of output data in units of frames, and transmits the frame data generated to the external communication device by using a communication IF different from an IF of the I2C communication, wherein in a case where the abnormality in the condition portion is detected, the detection unit causes the frame data including error information indicating that the abnormality is detected to be transmitted to the external communication device (abnormality is detected and reported via 231, figure 1, paragraphs 86 and 87). 13. Kidamura modified by the teachings of Humphrey as seen in claim 1 above, as per claim 8, Humphrey teaches a device, further comprising a sensor unit that outputs sensor data as the output data (sensor data, paragraphs 4 and 24). 14. Kidamura modified by the teachings of Humphrey as seen in claim 1 above, as per claim 9, Humphrey teaches a device, wherein the detection unit sets a period of at least one of the first time constraint or the second time constraint on a basis of a parameter transmitted from the external communication device (time value utilization, paragraphs 33, 46). 15. Kidamura modified by the teachings of Humphrey as seen in claim 12 above, as per claim 13, Kidamura teaches a device, wherein the control unit executes error processing in a case where error information indicating that an abnormality in the condition portion is detected is transmitted from the external communication device via a predetermined signal line (231, figure 1, forcibly terminates process in light of error processing, paragraph 74). Conclusion 16. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Li/Otoshi/Sun have teachings of I2C master/slave communication with abnormality detection. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AURANGZEB HASSAN whose telephone number is (571)272-8625. The examiner can normally be reached 7 AM to 3 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached at 571-272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. AH /HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
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Prosecution Timeline

Feb 19, 2025
Application Filed
Jul 16, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
97%
With Interview (+17.0%)
2y 10m (~1y 5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 770 resolved cases by this examiner. Grant probability derived from career allowance rate.

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