Prosecution Insights
Last updated: April 19, 2026
Application No. 19/105,105

DISPLAY DEVICE AND ANALYSIS METHOD

Non-Final OA §102
Filed
Feb 20, 2025
Examiner
LIANG, DONG HUI
Art Unit
2629
Tech Center
2600 — Communications
Assignee
Sony Group Corporation
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
2y 0m
To Grant
95%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allow Rate
325 granted / 418 resolved
+15.8% vs TC avg
Strong +17% interview lift
Without
With
+17.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
15 currently pending
Career history
433
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
55.7%
+15.7% vs TC avg
§102
21.4%
-18.6% vs TC avg
§112
17.8%
-22.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 418 resolved cases

Office Action

§102
DETAILED ACTION Notice of AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This action is in response to application 19105105 filed on 02/20/2025. Claims 1-12 are presented for examination. Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy of foreign priority document, Application No. JP2022-137096, filed in Japan on 08/30/2022, has been received. Prior Art Rejections In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4, 6 and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yamamoto et al. (US Patent Pub. No. 2021/0405491 A1) Regarding claim 1, Yamamoto teaches a display device (Yamamoto, Figs. 2 and 5, display device 1), comprising: a pixel array including a plurality of pixels (Yamamoto, Fig. 2, pixels PX); a control unit including a plurality of output terminals that outputs video signals (Yamamoto, Fig. 2, driver IC 110; Yamamoto, Fig. 4, driver terminals E where the driver is connected to); a plurality of selectors provided between the pixel array and the control unit, each selector electrically connecting or electrically disconnecting a corresponding output terminal of the control unit and a corresponding pixel of the pixel array to or from each other (Yamamoto, Fig. 5, switches SWA); and a plurality of paths connected to the output terminals corresponding to one ends of the respective paths (Yamamoto, Fig. 5, wires V and dummy wires D), wherein the plurality of paths includes: a plurality of connection paths connected to the selectors corresponding to another ends of the respective paths (Yamamoto, Fig. 5, wires V); and a dummy path not connected to the selectors corresponding to another ends of the respective path (Yamamoto, Fig. 5, dummy wires D). Regarding claim 2, Yamamoto teaches the limitations of claim 1 and further teaches the dummy path is shorter than the connection paths (Yamamoto, Fig. 6, dummy wires D are shorter than wires V). Regarding claim 3, Yamamoto teaches the limitations of claim 1 and further teaches the plurality of paths includes a plurality of the dummy paths having lengths different from each other (Yamamoto, Fig.6, dummy wires D with different lengths). Regarding claim 4, Yamamoto teaches the limitations of claim 1 and further teaches the connection paths include a plurality of wiring lines connected in series between the output terminals and the selectors (Yamamoto, Fig. 5, wires V between driver terminal E and switches SWA), and the dummy path includes a smaller number of wiring lines than the plurality of wiring lines of the connection paths (Yamamoto, Fig. 5, number of dummy wires D is smaller than wires V). Regarding claim 6, Yamamoto teaches the limitations of claim 4 and further teaches a wiring line located closest to the selectors in the dummy path is shorter than a corresponding wiring line of the connection paths (Yamamoto, adjacent dummy wire D and wire V). Regarding claim 9, Yamamoto teaches the limitations of claim 1 and further teaches another end of the dummy path is opened (Yamamoto, [0059], dummy wires D floats, i.e., opened). Allowable Subject Matter Claims 11 and 12 are allowed. Claims 5, 7, 8 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 5, the prior art, whether considered alone or in combination, fail to disclose the technical features of the claimed invention in context as a whole. Specifically, the further connection of the adjacent wiring lines via a via in the manner claimed as a whole, is not sufficiently taught or suggested in the prior art. Regarding claim 7, the prior art, whether considered alone or in combination, fail to disclose the technical features of the claimed invention in context as a whole. Specifically, the connection of the connection paths with switches are also the dummy path in the manner claimed as a whole, is not sufficiently taught or suggested in the prior art. Regarding claim 8, the prior art, whether considered alone or in combination, fail to disclose the technical features of the claimed invention in context as a whole. Specifically, the dummy path with switches connected in series in the manner claimed as a whole, is not sufficiently taught or suggested in the prior art. Regarding claim 10, the prior art, whether considered alone or in combination, fail to disclose the technical features of the claimed invention in context as a whole. Specifically, the connection of another end of the dummy path to ground via a capacitor in the manner claimed as a whole, is not sufficiently taught or suggested in the prior art. Regarding claim 11 and 12, the prior art, whether considered alone or in combination, fail to disclose the technical features of the claimed invention in context as a whole. The above cited prior art Yamamoto teaches the display device as claimed, but does not seem to teach or suggest the further analysis method in the manner claimed as a whole. Neither is it sufficiently taught or suggested in the prior art to combine with the particular display device as claimed. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. U.S. Patent Publication No. 2016/0190522 A1 to Lee et al. discloses a similar invention as recited, specifically a display driver with testing pads, see Fig. 8A. U.S. Patent Publication No. 2022/0383790 A1 to Eom et al. discloses a similar invention as recited, specifically the inclusion of dummy path in the display driver, see Fig. 10. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DONG HUI LIANG whose telephone number is (571)272-0487. The examiner can normally be reached M-F 7am-3pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, BENJAMIN C. LEE can be reached at (571)272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DONG HUI LIANG/Primary Examiner, Art Unit 2629
Read full office action

Prosecution Timeline

Feb 20, 2025
Application Filed
Feb 18, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603044
PIXEL CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME
2y 5m to grant Granted Apr 14, 2026
Patent 12592211
DUAL-VOLTAGE PIXEL CIRCUITRY FOR LIQUID CRYSTAL DISPLAY
2y 5m to grant Granted Mar 31, 2026
Patent 12586542
DISPLAY DEVICE, CONTROL CIRCUIT INCLUDED IN THE SAME, AND METHOD OF DRIVING THE SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12579945
Shift Register, Gate Driver Circuit and Display Device
2y 5m to grant Granted Mar 17, 2026
Patent 12567378
GATE DRIVING PANEL CIRCUIT AND DISPLAY DEVICE
2y 5m to grant Granted Mar 03, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
95%
With Interview (+17.4%)
2y 0m
Median Time to Grant
Low
PTA Risk
Based on 418 resolved cases by this examiner. Grant probability derived from career allow rate.

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