Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This office action is in response to the application filed on 02/25/2025.
Drawing
The drawings filed on 02/25/2025 are acceptable.
Applicant has amended claims 8-10 and 18-20 and canceled claims 21-26 and no new claims have been added and no new matter is being presented.
Claims 1-20 are pending and have been examined.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 02/25/2025 is in compliance
with the provisions of 37 C.F.R. § 1.97. Accordingly, the IDS has been considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the
basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 6-14, 16 and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zmood et al. (US 2021/0218342 A1), hereinafter ‘Zmood.
In re to claim 1, Zmood disclose a grid-connected converter device (i.e. 30, fig. 6, see p. [0076]) for interfacing a grid network (i.e. the load may be an AC motor or a utility grid supply, see ps. [0010, 0074]) and coupling the grid network to a direct current (DC) source or DC bus / network (i.e. Vin across A and B, see p. [0076]), the device comprising: a neutral-point-clamped inverter circuit (i.e. 11, 21 and 31, see p. [0078]) having a voltage vdc across the direct current (DC) source or DC bus/ network (i.e. Vin across A/B, see fig. 6), the neutral-point-clamped inverter circuit (i.e. 11, 21 and 31, see p. [0078]) including one or more switch legs (i.e. Sd1-Sd12 and M1-M26), each switch leg comprising a corresponding pair of switches having an electrical midpoint between the switches of the pair of switches (i.e. the midpoints IN11-13, N21-23, N31-33); and an inductor network (i.e. the inductors L11-L13. L21-L23 and L31-L33) coupled to the neutral-point-clamped inverter circuit (i.e. 11, 21 and 31, see p. [0078]), the inductor network comprising a set of parallel inductor legs (i.e. the parallel connected inductors L11-L13. L21-L23 and L31-L33), each parallel inductor leg coupled to a corresponding electrical midpoint (i.e. IN11-IN13, IN21-IN23, IN31-N33) of a corresponding switch leg (i.e. M1-M6, M11-M16, M21-M26)) and also coupled to an output electrical node (i.e. J1-J3) coupled to the grid network (i.e. P1-P3, see fig. 6).
In re to claim 2, Zmood disclose the device (i.e. 30, fig. 6, see p. [0076]) of claim 1, wherein the neutral-point-clamped inverter circuit (i.e. 11, 21 and 31, see p. [0078]) includes: a first stage (i.e. the input stage across A/B) having an upper capacitor and a lower capacitor (i.e. C1 and C2) connected across an NPC electrical midpoint (i.e. F), an upper pair of clamping diodes or switches (i.e. Sd2 and Sd3) and a lower pair of clamping diodes or switches (i.e. Sd10 and Sd11) the upper and lower pair of clamping diodes or switches coupled across the NPC electrical midpoint (i.e. F); and a second stage including the one or more switch legs (i.e. M1/M2), each of the switch legs coupled to an electrical midpoint (i.e. IN11) of the upper pair of clamping diodes or switches (i.e. M1/M2), and an electrical midpoint (i.e. IN31) of the lower pair of clamping diodes or switches (i.e. M21/M22, see fig. 6).
In re to claims 3-4, Zmood disclose the device (i.e. 30, fig. 6, see p. [0076]) of claim 1, wherein the grid network is an AC network that has a plurality of phases (i.e. phases 11, 21 and 31, see ps. [0079-0081]) and each phase has a corresponding output electrical node (i.e. outputs J1-J3) being coupled to a corresponding neutral-point-clamped inverter circuit (i.e. 11, 21 and 31) and a corresponding inductor network (i.e. L11-L13. L21-L23 and L31-L33); wherein neutral-point-clamped inverter circuit includes two switch legs (i.e. M1/M2, M11/M12. M21/M22) per phase of the plurality of phases (i.e. phases 11, 21, 31 fig. 6, see p. [0078]).
In re to claim 6, Zmood disclose the device (i.e. 30, fig. 6, see p. [0076]) of claim 3, wherein neutral-point-clamped inverter circuit (i.e. 11, 21 and 31) includes three switch legs (i.e. M1/M2, M3/M4 and M5/M6) per phase of the plurality of phases (i.e. phases through L11, L12 and L13, see fig. 6).
In re to claim 8, Zmood disclose the device (i.e. 30, fig. 6, see p. [0076]) of claim 1, wherein the inductor network is a coupled inductor network having parallel inductor limbs (i.e. the parallel inductor L11/L12/L13; L21/L22/L23 and L31/L32/L33) and the coupled inductor network includes inductor windings on separate limbs (i.e. L111, L121 and L131) of the parallel inductor limbs (i.e. inductors L22/L12/L13; L21/L22/L23 and L31/L32/L33) the inductors are magnetically coupled to each other (i.e. the inductors are mutually coupled together, see p. [0079]), and switching of the each parallel inductor legs is conducted using interleaved switching so that each inverter leg output voltage has pulses that are evenly phase distributed in a switching cycle (i.e. the switching is multi-phasing, see p. [0079).
In re to claim 9, Zmood disclose the device (i.e. 30, fig. 6, see p. [0076]) of claim 1, wherein the inductor network is a coupled inductor network having cross-coupled inductor limbs (i.e. inductors L11/L12/L13; L21/L22/L23 and L31/L32/L33) and an output of each switch leg (i.e. M1/M2, M11/M12. M21/M22) of the inverter circuit (i.e. 30) may have two windings connected in series where the two windings reside in separate magnetic flax paths (i.e. L11 and L111; L12 and L111; L13 and L111 are connected in series, see fig. 6).
In re to claim 10, Zmood disclose the device (i.e. 30, fig. 6, see p. [0076]) of claim 1, wherein the inductor network includes parallel filter inductor limbs (i.e. filters L111, L121 and L131) and the and the parallel filter inductor limbs are separate inductors that together provide a high frequency output current ripple and supply a current source to a load (i.e. the parallel inductor filters L111, L121 and L131 high frequency output current to the load P1, P2 and P3 respectively, see ps. [0050, 079-081]).
In re to claims 11-14, 16 and 18-20, method claims 11-14, 16 and 18-20, are rejected
based on the following case law, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device inherently performs the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed Cir. 1986). Therefore, the previous rejections based on the apparatus will not be repeated.
Allowable Subject Matter
Claims 5/15 and 7/17 are objected to as being dependent upon a rejected base claims, but
would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
In re to claims 5 and 15, None of the cited prior art alone or in combination disclose or teach the claimed inventions in which “wherein the device operates with at least one of the characteristics selected from a group consisting of: a line voltage PWM frequency is 4 x fc, a number of line voltage steps is vdc/4, a number of line voltage steps is 9, or a common mode voltage is +/- vdc/8”.
In re to claims 7 and 17, None of the cited prior art alone or in combination disclose or teach the claimed inventions in which “wherein the device operates with at least one of the characteristics selected from the group consisting of: a line voltage PWM frequency is 6 x fc, a number of line voltage steps is vdc/6, a number of line voltage steps is 13, or a common mode voltage is +/- Vdc/12”.
The art of record does not disclose the above limitations, nor would it be obvious to modify the art of record to include either of the above limitations.
In re to claims 6-7 claim 4 depend on claims 6-7, thus is also objected for the same reasons provided above.
Remarks
The examiner has cited columns, line numbers, paragraph numbers, references, or
figures in the references applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses to fully consider the reference in entirety, as potentially teaching all or part of the claimed invention. See MPEP § 2141.02 and § 2123.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YEMANE MEHARI whose telephone number is (571)270-7603. The examiner can normally be reached M-F 9AM TO 6 PM.
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/YEMANE MEHARI/Primary Examiner, Art Unit 2838