Prosecution Insights
Last updated: October 25, 2026
Application No. 19/107,734

CIRCUIT BREAKER AND METHOD

Non-Final OA §103
Filed
Feb 28, 2025
Priority
Aug 31, 2022 — DE 10 2022 209 033.0 +1 more
Examiner
AL-TAWEEL, MUAAMAR QAHTAN
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Siemens Aktiengesellschaft
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
66 granted / 84 resolved
+10.6% vs TC avg
Strong +23% interview lift
Without
With
+23.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
47 currently pending
Career history
150
Total Applications
across all art units

Statute-Specific Performance

§103
58.6%
+18.6% vs TC avg
§102
38.7%
-1.3% vs TC avg
§112
2.7%
-37.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 84 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 19 and 29 are rejected under 35 U.S.C. 103 as being unpatentable over Du et al (US Publication 20140268436) in view of Nomura et al (US Patent No. 5844193). Regarding claim 19, Du teaches a circuit-breaker (i.e., CB 10) (fig. 2G) for protecting a low-voltage electric circuit (i.e., low-voltage electric circuit 10) for an AC voltage (i.e., AC voltage Vs), the circuit-breaker comprising: a housing (i.e., housing 72) having grid-side (i.e., grid-side terminals 1-2) and load-side terminals (i.e., load-side terminals 3-4) for conductors of the low-voltage circuit; a differential current sensor unit (i.e., differential current sensor unit L1) for ascertaining a magnitude of an instantaneous differential current (i.e., instantaneous differential current; para. [0021]) in the conductors of the low-voltage circuit (e.g., Instead, the self-test is performed near the conclusion of the positive half cycle when the instantaneous supply voltage is close to the zero cross, and thus low enough that the circuit interrupter will not trip; para. [0060]); a mechanical break contact unit having contacts (i.e., mechanical break contact unit having contacts 20/K1), said mechanical break contact unit assuming a closed state of said contacts (ON) for enabling a current flux (Examiner's Note: The term "current flux" is scientifically not accurate because and this is a pure science; An electric current generates a magnetic flux, while a changing magnetic flux generates (induces) an electric current. Thus, for examination purposes, the term "current flux" is considered as "current".) in the low-voltage circuit, or an open state of said contacts (OFF) for preventing a current flux by a galvanic interruption (i.e., galvanic interruption by breaking the both lines the Hot line L and the Neutral line N; fig. 3) of the low-voltage circuit; an electronic interruption unit (electronic interruption unit Q1 and Q4; fig. 3) having a circuit side connected in series with said mechanical break contact unit (i.e., Q1 is in series with coil K1-1 and Q4 is in series with coil K1-2), said electronic interruption unit having semiconductor-based switching elements (i.e., Q1 and Q4 are SCR transistors) assuming a high-ohmic state of said switching elements (OFF) for preventing a current flux, or a low-ohmic state of said switching elements (ON) for enabling the current flux in the low-voltage circuit; and a control unit (control unit 18; fig. 3) connected to said differential current sensor unit, to said mechanical break contact unit and to said electronic interruption unit (implicit, as seen in fig. 3). Du does not teach said control unit configured to compare a magnitude of the instantaneous differential current with an instantaneous differential current limiting value and, in an event of a quantitative overshoot, to prevent the current flux in the low-voltage circuit initiated by a high-ohmic state of said switching elements of said electronic interruption unit with said break contacts in said closed state. Nomura teaches in a similar field of endeavor in power switching systems (i.e., controller/driving circuit) (fig. 19); wherein said control unit (i.e., controller/driving circuit) configured to compare (i.e., via comparator 237) a magnitude of the instantaneous differential current (i.e., magnitude of the instantaneous differential current i01) with an instantaneous differential current limiting value (i.e., instantaneous differential current limiting value irms) and, in an event of a quantitative overshoot (i.e., overshoots; fig. 18), to prevent the current flux (current) in the low-voltage circuit initiated by a high-ohmic state (OFF) of said switching elements (i.e., switching elements IGBTs 241-244) of said electronic interruption unit (i.e., electronic interruption unit 204) with said break contacts (i.e., contacts 34, 35; fig. 3) in said closed state (ON). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the controller-comparator scheme in Du, as taught by Nomura, as it provides the advantage of optimizing the circuit design. Regarding claim 29, Du in view of Nomura and the teachings of Du as modified by Nomura have been discussed above. Du further teaches the circuit-breaker of claim 19, wherein said mechanical break contact unit (i.e., mechanical break contact unit 20/K1) (fig. 2G) is associated with said load side terminals (i.e., load side terminals 3-4). Claims 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Du et al (US Publication 20140268436) in view of Nomura et al (US Patent No. 5844193) and further in view of Deppe et al (US Publication No. 20080273179). Regarding claim 20, Du in view of Nomura and the teachings of Du as modified by Nomura have been discussed above. Neither Du nor Nomura teaches wherein a current flux in the low-voltage circuit is prevented in the event of the overshoot by a high-ohmic state of said switching elements of said electronic interruption unit within a first switch-off time. Deppe teaches in a similar field of endeavor in power switching systems (i.e. switching plot) (fig. 3); wherein a current flux (i.e., IAF; fig. 3) in the low-voltage circuit (i.e., the low-voltage circuit 10; fig. 5) is prevented in the event of the overshoot (i.e., the overshoot O; fig. 3) by a high-ohmic state (OFF) of said switching elements (i.e., switching elements M2-M4; fig. 5) of said electronic interruption unit (i.e., electronic interruption unit 18; fig. 5) within a first switch-off time (i.e., first switch-off time is the first lower case s in the VT-axis; fig. 3). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the overshoots-prevention scheme in Du, as taught by Deppe, as it provides the advantage of optimizing the circuit design. Regarding claim 21, Du in view of Nomura and further in view of Deppe and the teachings of Du as modified by Nomura have been discussed above. Also, the teachings of Du as modified by Deppe have been discussed above as well. Deppe further teaches the circuit-breaker of claim 20, wherein said first switch-off time is less than 20 ms (i.e., The duration of the individual switch-on and switch-off phases is therefore usually of the order of 100 to 1,000 .mu. s in practice, with small switching phases preferably being used; para. [0041]). Allowable Subject Matter Claims 22-28 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 22, Du in view of Nomura teaches the invention set forth above. However, neither Du nor Nomura particularly teaches wherein: a low-ohmic state of said switching elements of said electronic interruption unit is initiated, further to the prevention of the current flux in the low-voltage circuit in response to the overshoot of the instantaneous differential current limiting value; and a voltage sensor unit is connected to said control unit for ascertaining a magnitude of a voltage in the conductors of the low-voltage circuit, and a low-ohmic state is assumed in which a magnitude of an instantaneous value of the AC voltage is lower than a first voltage limit. Hence claim 22 will be deemed allowable if rewritten in an independent form. Claims 23-24 depend on objected claim 22, consequently claims 23-24 will also be deemed allowable. Regarding claim 25, Du in view of Nomura teaches the invention set forth above. However, neither Du nor Nomura particularly teaches wherein: a r.m.s. value of the differential current is ascertained from the magnitude of the instantaneous differential current; the r.m.s. value of the differential current is compared with a r.m.s. differential current limiting value or with a r.m.s. differential current-time limiting value and, in an event of an overshoot, prevention of the current flux in the low- voltage circuit is initiated: a) by a high-ohmic state of said switching elements of said electronic interruption unit, with said break contacts in said closed state, or b) by an open state of said break contacts. Hence claim 25 will be deemed allowable if rewritten in an independent form. Claims 26-27 depend on objected claim 25, consequently claims 26-27 will also be deemed allowable. Regarding claim 28, Du in view of Nomura teaches the invention set forth above. However, neither Du nor Nomura particularly teaches which further comprises: a current sensor unit connected to said control unit for ascertaining a magnitude of a current in the conductors of the low-voltage circuit; the circuit-breaker or said control unit configured to initiate, in an event of an overshoot of first current limiting values or of first current-time limiting values, a prevention of the current flux in the low-voltage circuit by a high-ohmic state of said switching elements of said electronic interruption unit, with said break contacts in said closed state. Hence claim 28 will be deemed allowable if rewritten in an independent form. Claims 30-39 are allowed. The following is an examiner’s statement of reasons for allowance: Regarding claim 30, Du et al (US Publication 20140268436) in view of Nomura et al (US Patent No. 5844193) substantially teaches the claim limitations as indicated in claim 1. However, neither Du nor Nomura teaches or suggests a method for using a circuit-breaker for protecting a low-voltage electric circuit for an AC voltage, the method comprising: ascertaining a magnitude of an instantaneous differential current in conductors of the low-voltage circuit; and in an event of an overshoot of an instantaneous differential current limiting value, initiating a prevention of a current flux in the low-voltage circuit by a high- ohmic state of switching elements of an electronic interruption unit, with break contacts of a mechanical break contact unit in a closed state. Claims 31-39 are allowed, as they depend on allowed claim 30. Claims 1-18 are cancelled. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUAAMAR Q AL-TAWEEL whose telephone number is (571)270-0339. The examiner can normally be reached 0730-1700. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V Tran can be reached at (571) 270- 1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MUAAMAR QAHTAN AL-TAWEEL/Examiner, Art Unit 2838 /THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Feb 28, 2025
Application Filed
Oct 14, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12772792
SYSTEM FOR MONITORING PERFORMANCE OF ELECTROSTATIC CHUCKS IN SUBSTRATE PROCESSING SYSTEMS
2y 5m to grant Granted Oct 20, 2026
Patent 12771114
DC SHORT CIRCUIT PROTECTION DEVICE
1y 11m to grant Granted Oct 20, 2026
Patent 12738547
BATTERY MONITORING MODULE AND FLEXIBLE PRINTED WIRING BOARD
3y 6m to grant Granted Sep 15, 2026
Patent 12738693
SAFETY ELEMENT AND PLUG CONNECTOR
3y 0m to grant Granted Sep 15, 2026
Patent 12738403
METHODS AND SYSTEMS FOR MAGNETIC SHIELDED TRANSMITTER SYSTEM
2y 8m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+23.2%)
2y 6m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 84 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month