Prosecution Insights
Last updated: April 19, 2026
Application No. 19/108,342

METHOD, APPARATUS AND SYSTEM FOR ENCODING AND DECODING A TENSOR

Non-Final OA §102§103
Filed
Mar 03, 2025
Examiner
SHAHNAMI, AMIR
Art Unit
2483
Tech Center
2400 — Computer Networks
Assignee
Canon Kabushiki Kaisha
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
91%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
345 granted / 427 resolved
+22.8% vs TC avg
Moderate +10% lift
Without
With
+10.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
15 currently pending
Career history
442
Total Applications
across all art units

Statute-Specific Performance

§101
4.1%
-35.9% vs TC avg
§103
49.2%
+9.2% vs TC avg
§102
21.0%
-19.0% vs TC avg
§112
12.5%
-27.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 427 resolved cases

Office Action

§102 §103
DETAILED ACTION Claims 1-19 are pending for examination. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant's claim under AU2022252784 filed on 10/13/2022. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 4, 5, 8, 9, 11, 14-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhang et al, MSFC: Deep Feature Compression in Multi-Task Network. Regarding Claim 1, Zhang discloses a method of encoding at least a plurality of tensors forming a hierarchical representation for a single frame into a bitstream, the method comprising: deriving a first unit of information from a plurality of tensors forming the hierarchical representation, the plurality of tensors including at least a first tensor and a second tensor, feature maps of the first tensor having a larger spatial resolution than feature maps of the second tensor (Zhang Fig. 2 and Sec 3.1 MSFF Module – Since P₅ is the most important among the feature pyramid, other feature maps are first downsampled to the size of P₅ and then concatenated together with p₅ – See Fig. 2 where the feature maps of the first tensor is P₂, p₃ or p4 having a larger spatial resolution than the feature maps of the second tensor p₅); encoding, in a first mode, at least the first unit of information into the bitstream (Zhang Fig. 2 and Sec 3.1 MSFF Module – other feature maps are first downsampled to the size of p₅ and then concatenated together with p₅); deriving, in a second mode, a second unit of information from at least the first tensor; and encoding, in the second mode, the second unit of information and the first unit of information into the bitstream (Zhang Sec 3.2 SSFC Module – encoder performs further compression on the fused feature Tap, which composes a convolutional layer, a batch-normal layer and a Tanh activation function). Regarding Claim 4, Zhang discloses the method according to claim 1, wherein deriving the first unit of information comprises combining at least the first and second tensors into a first combined tensor, and applying a convolutional layer followed by a batch normalisation layer to the first combined tensor (see Zhang Fig.2 ‘CONV’ and P.3 c.1 – the SSF module consists of…a convolutional later). Regarding Claim 5, Zhang discloses the method according to claim 4, wherein deriving the first unit of information further comprises providing the output of the batch normalisation layer to a tanh layer (see Zhang Fig.2 ‘BN and P.3 c.1 – the SSF module consists of…a batch-normal layer). With regard to claim 8, the claim limitations are essentially the same as claim 1 but in a different embodiment. Therefore, the rational used to reject claim 1 is applied to claim 8. Zhang teaches a decoding embodiment – See Zhang Fig.2. Regarding Claim 9, Zhang discloses the method according to claim 8, further comprising decoding indication of whether to use the second mode from the bitstream (Zhang Sec 3.2 SSFC Module – encoder performs further compression on the fused feature Tap, which composes a convolutional layer, a batch-normal layer and a Tanh activation function [consists of an encoder and a decoder]). Regarding Claim 11, Zhang discloses the method according to claim 8, wherein, tensors corresponding to at least the first tensor are selected using convolutional layers (see Zhang Fig.2 ‘CONV’ and P.3 c.1 – the SSF module consists of…a convolutional layer). With regard to claim 14, the claim limitations are essentially the same as claim 1 but in a different embodiment. Therefore, the rational used to reject claim 1 is applied to claim 14. With regard to claim 15, the claim limitations are essentially the same as claim 1 but in a different embodiment. Therefore, the rational used to reject claim 1 is applied to claim 15. With regard to claim 16, the claim limitations are essentially the same as claim 1 but in a different embodiment. Therefore, the rational used to reject claim 1 is applied to claim 16. With regard to claim 17, the claim limitations are essentially the same as claim 8 but in a different embodiment. Therefore, the rational used to reject claim 8 is applied to claim 17. With regard to claim 18, the claim limitations are essentially the same as claim 8 but in a different embodiment. Therefore, the rational used to reject claim 8 is applied to claim 18. With regard to claim 19, the claim limitations are essentially the same as claim 8 but in a different embodiment. Therefore, the rational used to reject claim 8 is applied to claim 19. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang, in view of Recape et al, US 2023/0396801 A1. Regarding Claim 2, Zhang discloses the method according to claim 1, as outlined above. However, Zhang does not explicitly disclose determining based on at least one of a quality configuration for encoding and a machine task to be completed, whether to operate in the first mode or the second mode. Racape teaches determining based on at least one of a quality configuration for encoding and a machine task to be completed, whether to operate in the first mode or the second mode (Racape [0070]-[0075] – FIG. 5 and FIG. 6 describe the encoder and decoder processes, respectively. At the encoder, each new task is considered after fetching the source content, and the corresponding feature maps are generated (which corresponds to the function g a (i) described above). Then, if the current tensor corresponds to a “base layer”, it is quantized and encoded normally. Otherwise, the tensor is first predicted using an already encoded reference tensor. The latter is in the same state as if it were reconstructed at the decoder, i.e. quantized. The difference is computed, and residuals are then quantized and encoded. At the decoder, reverse operations are performed. The layers are parsed from the bitstream, which contains syntax elements for mapping dependent tensors (see section on hyperprior-based models). If the layer is a key/base layer, it can be directly decoded. Otherwise, the residuals are decoded and the already decoded refence tensor is accessed to generate the decoded tensor by adding the residuals. Finally, the output frames are generated by the synthesizer g.sub.s or g.sub.s(i) in the case of multiple synthesizers. The method requires a syntax that refers to multi-layer coding. A base layer, e.g. the main chain optimized for viewing, can be decoded using the base autoencoder. Then the additional layers (i.e. tensors optimized for each tasks) require parameter sets that describe their ordering/mapping to specific tasks, as well as the dependencies between them for predictive coding. For instance, one can think of a system where the base layer serves as reference for all the additional dependent layers. It can also be envisioned that some tasks are similar and result in feature maps that share more similarities and would benefit from predicted from each other. All these combinations require syntax which include syntax elements for: The number of layers (tensors related to given tasks) included in the bitstream … Dependency flags for each layer to point at the reference tensors). Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Zhang to determine based on at least one of a quality configuration for encoding and a machine task to be completed, whether to operate in the first mode or the second mode, as taught by Recape. One would be motivated as the mode selection would allow the processor to minimize unnecessary elements of an input. Regarding Claim 3, Zhang and Recape teach the method according to claim 2, as outlined above. However, Zhang does not explicitly disclose determining operation in the second mode if the machine task is to be completed is instance segmentation. Racape teaches determining operation in the second mode if the machine task is to be completed is instance segmentation (Racape [0058] – such system can include a base layer (base tensor) optimized for viewing, and additional tensors specialized for object detection and video segmentation). Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Zhang to determine operation in the second mode if the machine task is to be completed is instance segmentation, as taught by Recape. One would be motivated as the segmentation mode allows for only certain portions to be processed, reducing the work required to complete desired optimization. Claim(s) 10 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang, in view of Mills US 2022/0156575 A1. Regarding Claim 10, Zhang discloses the method according to claim 8, as outlined above. However, Zhang does not explicitly disclose in the second mode, the plurality of tensors from the second unit of information are selected using a multiplexor. Mills teaches in the second mode, the plurality of tensors from the second unit of information are selected using a multiplexor (Mills [0101] – Referring back to FIG. 6, in the gather mode, input tensor 626 generated by gather unit circuit 618 is passed via a multiplexer 634 controlled by mode signal 610 as an input tensor 636 onto format converter and deinterleaver circuit 638. Similarly, in the crop mode, input tensor 632 generated by crop unit circuit 620 is passed via multiplexer 634 controlled by mode signal 610 as input tensor 636 onto format converter and deinterleaver circuit 638. Format converter and deinterleaver circuit 638 performs format conversion and deinterleaving of input tensor 636 produced by texture unit circuit 336 (e.g., either by gather unit circuit 618 or by crop unit circuit 620) to generate an output version of input tensor 640 for storage (e.g., in a planar arrangement) into data processor circuit 318 (e.g., into buffer memory 334)). Therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Zhang have the plurality of tensors from the second unit of information selected using a multiplexor, as taught by Mills. One would be motivated as the multiplexer provides a selector of the modes. Allowable Subject Matter Claims 6, 7, 12, 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMIR SHAHNAMI whose telephone number is (571)270-0707. The examiner can normally be reached Monday - Friday 8:00 am to 4:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joseph Ustaris can be reached at 571-272-7383. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AMIR SHAHNAMI/Primary Examiner, Art Unit 2483
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Prosecution Timeline

Mar 03, 2025
Application Filed
Mar 19, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
91%
With Interview (+10.4%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 427 resolved cases by this examiner. Grant probability derived from career allow rate.

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