DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
2. The information disclosure statement (IDS) submitted on 03/06/25 has been considered by the examiner.
Priority
3. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
4. The disclosure is objected to because of the following informalities: on line 4 of page 4 of the instant specification, it appears that the word --on-- should be inserted after the word “symmetrically”. On line 28 of page 13, “a” should be changed to --an-- for purposes of proper grammatical form. On lines 19-21 of page 14, the indication that the third core element 103c is connected to the reset input 102 via the second core element 103b and the first core element 103a is inconsistent with what is shown in figure 2 of applicant’s drawings, i.e., core element 103c is actually connected directly to the reset input 102, it is not connected thereto via core elements 103a and 103b (and note that the same is true in figures 7 and 11 as well, i.e., in each of these two additional embodiments of applicant’s invention, the third core element is connected directly to the reset input 102, it is not connected thereto via the first and second core elements). On line 7 of page 16, the word “an” should be changed to --a--, again for purposes of proper grammatical form. On the second line of page 21, the word “performs” should be changed to --perform-- (or, alternatively, “that each performs” should be changed to --each of which performs--). On line 25 of page 33, the word “dependant” should be changed to --dependent-- (and note that the same correction should also be made on line 29 of page 34). On page 35, on lines 4-8, “Thus, by providing…elements 803.” is not a complete sentence, i.e., it appears that “effectively doubling” on line 7 should be deleted and then the phrase --is effectively doubled-- should be inserted on line 8 before the period. On line 25 of page 39, “an” should again be changed to --a--, again for purposes of proper grammatical form.
Appropriate correction is required.
Claim Objections
5. Claims 15 and 16 are objected to because of the following informalities:
On the first line of claim 15, the word --further-- should be inserted before “comprising”, the reason being that claim 1 already recites several elements of the claimed signal generating circuit, and therefore in a dependent claim which recites one or more further elements of the claimed signal generating circuit, “further comprising” is the appropriate antecedent to this.
On the last line of claim 16, “pulse signal respectively” should be changed to
--each signal-- i.e., the two output signals define the start time and the end time of each pulse signal.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
6. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 7, 8 and 16-18 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
In claim 7, the recitation of “a fourth switch” on the second line thereof lacks antecedent basis, the reason being that no third switch has been recited in claim 1, which is required for purposes of proper antecedent basis in order to recite a fourth switch. As currently presented, it is unclear exactly how many switches claim 7 requires, i.e., applicant only recites three different switches (the first switch, the second switch, and the fourth switch) which implies that claim 7 only requires three switches. On the other hand, the recitation of a fourth switch implies that claim 7 requires a total of four switches. In order to overcome this lack of antecedent basis problem, applicant should amend claim 7 so that it depends from claim 3 where the third switch is introduced.
Claim 8 is indefinite in view of its dependency on indefinite claim 7.
On line 3 of claim 16, the recitation of “two output signals” lacks clear antecedent basis, the reason being that claim 15 already recites two output signals (note what is indicated on the second line of claim 15). In response to this office action, applicant should make an appropriate amendment to claim 16 so as to clear up this ambiguity.
Claims 17 and 18 are indefinite in view of their dependencies, directly or indirectly, on indefinite claim 16.
Allowable Subject Matter
7. Claims 1-6, 9-15 and 19-23 are allowed.
Claims 7, 8 and 16-18 would be allowable if rewritten or amended to overcome the rejections under 35 U.S.C. 112(b) set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter: none of the prior art of record discloses or suggests a signal generating circuit comprising a series of cascade elements as recited in independent claims 1 and 22, specifically the limitations recited on lines 13 and 21-22 of independent claim 1 and the limitations recited on lines 6 and 13-14 of independent claim 22. The closest prior art of record are Patella et al (USPAP 2005/0007154), Jinbo (USP 6,943,603) and Tomita et al (USP 6,278,638), note figures 4A and 4B of Patella et al, figure 25 of Jinbo and figure 1 of Tomita et al, each of which discloses a series of cascade elements where each cascade element comprises a cascade input, a cascade output, a reset element and first and second switches connected in series between a high rail and the low rail. Specifically, in Patella et al the cascade input is on line 411 shown in figure 4A, the cascade output is on line 410 in figure 4A, the reset element in each cascade element is reset element 415, 416 and 417 in figure 4B, and the first and second switches are either transistors 401 and 402 in figure 4A of Patella et al or switches 403 and 404 in this figure, note that the high and low rails are the rails which receive VDD and ground, respectively. In figure 25 of Jinbo, a first cascade element is formed by the combination of inverter 9 together with reset element 15, a second cascade element is formed by the combination of inverter 10 together with reset element 18, a third cascade element is formed by the combination of inverter 11 together with reset element 16, etc. in figure 1 of Tomita et al, a first cascade element is formed by the combination of inverter INV2 together with the reset element TP having its drain terminal coupled directly to the voltage V2, a second cascade element is formed by the combination of inverter INV3 together with the reset element TN having its drain terminal coupled directly to voltage V3, a third cascade element is formed by the combination of inverter INV4 together with the reset element TP having its drain terminal coupled directly to voltage V4, etc. However, none of Patella et al, Jinbo and Tomita et al discloses or suggests that the second switch is driven by a clock input (as recited on line 13 of claim 1) or that the second switches of any two adjacent cascade elements are driven two opposite states by the clock input (as recited on lines 21-22 of claim 1), nor does any of Patella et al, Jinbo and Tomita et al disclose or suggest that the clocking switch of claim 22 is driven by a clock input (as recited on line 6 of this claim) or that the clocking switches of any two adjacent cascade elements are driven two opposite states by the clock input (as recited on lines 13-14 of this claim). As such, independent claims 1 and 22 are in condition for allowance in their current form, and claims 2-21 and 23 are allowable in view of their dependencies, directly or indirectly, on allowable claims 1 and 22.
Conclusion
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH B WELLS whose telephone number is (571)272-1757. The examiner can normally be reached Monday-Friday, 8:30am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, REGIS J BETSCH, can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/KENNETH B WELLS/Primary Examiner, Art Unit 2836 August 21, 2026
Prosecution Insights