DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
2. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 1 – 3, 5 – 7, 9 – 13 are rejected under 35 U.S.C. 103 as being unpatentable over Colnot (US Publication Number 2014/0096222) in view of Graif et al. (US Patent Number 10,496,562, hereinafter “Graif”).
4. As per claims 1 and 9, Colnot teaches a portable electronic device and method comprising: a microcontroller (host processor 230, figure 2b), a secure element (master secure element 250, figure 2b), and at least one peripheral component (touchscreen 218, figure 2b) controlled by the secure element, wherein: the secure element is connected to the microcontroller through a first serial data link (MSE500/505, figure 5 includes host interface 570 coupling CPU 510 to the host over path, with additional teachings of SWP, paragraphs 18 and 20) and is connected to the peripheral component through at least one second serial data link (touchscreen 218, figure 2b, and 531 figure 5b, directly connected to the MSE via a second path serial data link with additional peripheral component interface seen in 630, figure 6).
Colnot does not appear to explicitly disclose at least one digital input of the peripheral component is connected to at least one digital input/output of the microcontroller, the secure element is configured to send to the microcontroller, via the first serial data link, control commands of said digital input/output of the microcontroller such that the secure element provides a specified signal to the digital input of the peripheral component, and the microcontroller is configured to execute the digital input/output control commands received from the secure element.
However, Graif discloses at least one digital input of the peripheral component is connected to at least one digital input/output of the microcontroller (300, figure 3, communicating with links 310, 312, 414 for control command signals that run between 302 and peripherals), the secure element is configured to send to the microcontroller, via the first serial data link, control commands of said digital input/output of the microcontroller such that the secure element provides a specified signal to the digital input of the peripheral component (410 in 402, figure 4, packetizes GPIO via 420, and transmits over 422, host 502 and peripheral 512, figure 5 exchanges data over bus 510 via I3C protocol, column 12, lines 26 – 46), and the microcontroller is configured to execute the digital input/output control commands received from the secure element (FSM 426, 32, 438, figure 4 in the peripheral devices convert virtual messages to physical SPIO state of internal pin mapping as further seen in 1306, figure 13 executed by 1316 via 1318).
Colnot and Graif are analogous art because they are from the same field of endeavor of interface handling for peripherals.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Colnot and Graif before him or her, to modify the connectivity of Colnot to include the interfacing of Graif because to enhance efficiency in the connectivity over a serial bus.
One of ordinary skill would be motivated to make such modification in order to reduce latency and power consumption (column 10, lines 28 – 37). Therefore, it would have been obvious to combine Graif with Colnot to obtain the invention as specified in the instant claims.
5. Colnot modified by the teachings of Graif as seen in claim 1 above, as per claims 2 and 10, Graif teaches a device and method, wherein the microcontroller is devoid of an application program capable of controlling its digital input/output connected to the digital input of the peripheral component (FSMs 410/426/432/438 virtualize GPIO state without intervention by 402, figure 4 or peripherals, where the signaling state of the receiving device’s physical pin is fixed by the received VGI state and not written by locally executing application column 8, line 63 to column 9, line 59), except for a program ensuring the execution of commands received from the secure element by which the secure element controls said digital input/output of the microcontroller (1302, figure 13 processing circuit executes instructions in 1318 to implement 1306 conversion of VGI state into physical GPIO state, column 22, lines 6 – 67).
6. Colnot modified by the teachings of Graif as seen in claim 1 above, as per claims 3 and 11, Graif teaches a device and method, wherein the digital input/output of the microcontroller controlled by the secure element forms an extension of inputs/outputs of the secure element (reduce number of physical pins used to connect 402 with peripherals 424/430/436, figure 4, physical pins driven by state originating at processor) to compensate for an insufficient number of inputs/outputs for the control of the peripheral component (column 1, lines 26 – 55, enhance efficiency to compensate for insufficiencies).
7. Colnot modified by the teachings of Graif as seen in claim 1 above, as per claim 5, Colnot teaches a device, wherein the digital input of the peripheral component is a peripheral component selection input allowing the secure element to communicate with the peripheral component (MUX 540/640, via keypad interface and touchscreen interface and host interface controlled by application 525 running in 250, with a selection line asserted by the secure element to determine data path coupling, figures 2, 5, and 6) via the second serial data link (taught by Graif, figure 2 slave devices couple to serial bus 220 and addressed individually by master 202 through interface controller 204, according to bus protocol, sideband signals 320/322/324 control signals, figure 3).
8. Colnot modified by the teachings of Graif as seen in claim 1 above, as per claim 6, Graif teaches a device, wherein: the secure element is connected to two peripheral components through the second serial data link (Graif, 500, figure 5 with host 502 coupled through the bis 510 for peripherals 512), an input/output of the secure element provides a first selection signal ensuring the selection of a first of the two peripheral components (Colnot, dedicated output of MSE figures 5 and 6 drives MUX 540/640 via application 525/625 and security indicator 215 via 655), and the digital input/output of the microcontroller controlled by the secure element provides a second selection signal ensuring the selection of the second of the two peripheral components (FSM 426/432/438, figure 4 to physical GPIO pins with sideband for peripherals 320/322/324, figure 3), such that the two peripheral components are accessible to the secure element through the second serial data link, with the secure element configured to select either of the two peripheral components by means of the first or second selection signal (devices monitor shared bus with bit handling figures 7 – 9, master linked to peripherals and handling control pins).
9. Colnot modified by the teachings of Graif as seen in claim 1 above, as per claims 7 and 13, Colnot teaches a device and method, wherein the peripheral component is a touch screen (touchscreen 218, figure 2b).
10. Colnot modified by the teachings of Graif as seen in claim 9 above, as per claim 12, Colnot teaches a method, wherein the digital input of the peripheral component is a peripheral component selection input allowing the secure element to communicate with the peripheral component (MUX 540/640 figures 5a, 5b, 6 driven by output of secure element via application 525/625 to determine path couple to 510/610 or host interfaces 550/551/650) via the second serial data link (Graif, selectable slaves on bus 220 by master, figure 2).
11. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Colnot in view of Graif further in view of Beals (US Publication Number 2011/0017825).
12. As per claim 4, Colnot/Graif does not appear to explicitly disclose device, wherein the secure element comprises 10 inputs/outputs.
However, Beals discloses a device, wherein the secure element comprises 10 inputs/outputs (smartcard 208 having a plurality of pin configuration in the case of figure 7, at least 10 input/output configuration when in 708 instance, paragraphs 47 – 50).
Colnot/Graif and Beals are analogous art because they are from the same field of endeavor if input/output handling.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Colnot/Graif and Beals before him or her, to modify the configuration of Colnot/Graif to include the flexibility of Beals because it would allow for additional flexibility for input/outputs.
One of ordinary skill would be motivated to make such modification in order to for sufficient data exchange (paragraph 1). Therefore, it would have been obvious to combine Beals with Colnot/Graif to obtain the invention as specified in the instant claims.
13. Claims 8 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Colnot in view of Graif further in view of Taylor (US Publication Number 2010/0225597).
14. As per claims 8 and 14, Colnot/Graif teaches a device, comprising: a display module configuration component also connected to the secure element through the second serial data link (Graif: slave device 222 coupled to bus 220 for control function via 232, bus controlled by 202 via 204 for display 126 figures 1 and 2), and wherein: an input/output of the secure element provides a first selection signal ensuring the selection of the display module (Colnot, MUX 540/640 driven by output of secure element via application 525/625 selecting component for the data path, figures 5a, 5b, and 6), and the digital input/output of the microcontroller controlled by the secure element provides a second selection signal ensuring the selection of the display module configuration component (Graif, figure 4 and 13 remote device’s physical GPIO pin driven to the state command over the seria link by VGI FSM 426/432/438 and 1306 for the pin on the sideband control line 320/322/324 to a peripheral figure 3).
Colnot/Graif does not appear to explicitly disclose a display module connected to the secure element through the second serial data link and a touch module connected to the secure element through a third serial data link.
However, Taylor discloses a display module connected to the secure element through the second serial data link and a touch module connected to the secure element through a third serial data link (EEPROM 18 is associated with the display 12 with the configuration information, figure 1, paragraphs 33 – 35 with internal configurations of the touch screen seen in figure 3).
Colnot/Graif and Taylor are analogous art because they are from the same field of endeavor of secure touchscreen utilization.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Colnot/Graif and Taylor before him or her, to modify the touchscreen structure of Colnot/Graif to include the backend processing of Taylor because it would allow for secure touchscreen management.
One of ordinary skill would be motivated to make such modification in order to enhance touch screen calibration (paragraphs 3 – 5). Therefore, it would have been obvious to combine Taylor with Colnot/Graif to obtain the invention as specified in the instant claims.
Conclusion
15. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tuscano/Surwumwe/Ortiz/Han/Sung has teachings of secure elements in conjunction with peripheral devices such as touchscreens for enhance communication interfacing therein.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AURANGZEB HASSAN whose telephone number is (571)272-8625. The examiner can normally be reached 7 AM to 3 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached at 571-272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
AH
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184