DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted by applicant dated 03/21/2025 has been considered by the examiner.
Drawings
Figures 2, 3a, 3b, 4 and 5 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-8 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea of a mathematical concept without significantly more. The independent claims and corresponding dependent claims recite steps of manipulating information through mathematical correlations such as “matrix expansion mapping…”, “polynomial multiplication…”, “generating coefficients…”, etc.
This judicial exception is not integrated into a practical application because the resulting data of applying the mathematical manipulations have no use associated with them (See at least MPEP 2106.04(a)(2) - iv. organizing information and manipulating information through mathematical correlations, Digitech Image Techs., LLC v. Electronics for Imaging, Inc., 758 F.3d 1344, 1350, 111 USPQ2d 1717, 1721 (Fed. Cir. 2014). The patentee in Digitech claimed methods of generating first and second data by taking existing information, manipulating the data using mathematical functions, and organizing this information into a new form. The court explained that such claims were directed to an abstract idea because they described a process of organizing information through mathematical correlations, like Flook's method of calculating using a mathematical formula. 758 F.3d at 1350, 111 USPQ2d at 1721.).
The dependent claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception because the additional limitations presented by each of the respective dependent claims are further modifying and/or providing additional details with respect to the mathematical relationship of the polynomial data. For at least the above reasoning claims 1-8 are rejected under 35 USC 101 as being drawn to an abstract idea.
To alleviate this 35 USC § 101 issue, the examiner suggests to amend the independent claim to recite significantly more (e.g. generating a signature based on the result of the polynomial multiplication).
Claim 7 is rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
As per claim 7, the claim recites a computer program product directly loadable into the memory… comprising software code instructions. In other words, the claim is reciting a software program. This does not fall under one of the four statutory categories.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al., "Efficient Implementation of Dilithium Signature Scheme on FPGA SoC Platform" (hereinafter Wang).
As per claim 1, Wang teaches a method for optimizing an execution of a cryptographic process from a key value, said cryptographic process comprising - a matrix expansion mapping said key value into a matrix in a Number Theoretic Transform domain representation using an extendable output function, each element of the polynomial matrix being a polynomial (Wang pg 1158, abstract. pgs 1159, 1161, 1166-1167, perform expandA to a matrix in NTT domain representation using conflict free memory mapping scheme),
- and a polynomial multiplication between said polynomial matrix and a vector of polynomials (Wang pgs 1159, 1162, 1165-1166, perform multiplication between matrix A and vector),
said method being performed by a cryptographic device comprising a processor, an extendable output function hardware accelerator and a memory storing said vector and comprising: for each polynomial element of the polynomial matrix, repeating the following steps until all coefficients of the polynomial element of the polynomial matrix are generated (Wang pgs 1161-1162, 1165-1167, perform expand matrix and polynomial multiplication until all polynomials are processed):
by said extendable output function hardware accelerator, generating a set of coefficients of the polynomial element of the polynomial matrix from said key value using the extendable output function (Wang pgs 1161-1162, 1166-1167, generating coefficients by performing expand matrix)
by said processor, performing a polynomial multiplication between said vector stored in said memory and at least one generated set of coefficients of the polynomial element of the polynomial matrix to obtain a partial polynomial multiplication result (Wang pgs 1159, 1162, 1165-1166, performing polynomial multiplication to obtain results),
storing said partial polynomial multiplication result in said memory, wherein generating a set of coefficients of the polynomial element by said extendable output function hardware accelerator and performing a polynomial multiplication between said vector and at least one different generated set of coefficients by said processor are performed in parallel for at least a part of the generated sets of coefficients (Wang pgs 1159, 1162, 1165-1166, storing multiplication results in memory. Expand matrix and polynomial multiplication are performed in parallel),
obtaining a result of said polynomial multiplication between said polynomial matrix and said vector from said partial polynomial multiplication results stored in said memory (Wang pgs 1159, 1165-1166, performing polynomial multiplication to obtain results. Implicit that a final result of the multiplication is obtained).
As per claim 2, Wang teaches the method of claim 1, wherein said cryptographic process is among a key generation process, a signature generation process, a signature verification, an encryption process and a decryption process (Wang pgs 1158-1159, 1162, process such as key generation).
As per claim 3, Wang teaches the method of claim 1, wherein said cryptographic process is a Dilithium cryptographic process or Kyber cryptographic process (Wang pgs 1158-1159, 1161, process such as dilithium).
As per claim 4, Wang teaches the method of claim 1, wherein said extendable output function is Keccak hash function (Wang pgs 1161, 1166, Keccak hash).
As per claim 5, Wang teaches the method of claim 1, wherein said extendable output function is one selected from a group comprising among SHAKE-128, SHAKE-256, AES-128 and AES-256 (Wang pgs 1161, 1166, SHAKE).
As per claim 6, Wang teaches the method of claim 1, wherein said processor comprises at least one processor register, comprising storing in said at least one processor register said set of coefficients generated by said extendable output function hardware accelerator (Wang pgs 1164-1167, registers to store coefficients).
As per claims 7-8, the claims claim a computer program product and a device essentially corresponding to the method claim 1 above, and they are rejected, at least for the same reasons.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HENRY TSANG whose telephone number is (571)270-7959. The examiner can normally be reached M-F 9am - 5pm EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Farid Homayounmehr can be reached at (571) 272-3739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HENRY TSANG/ Primary Examiner, Art Unit 2495
