Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
2. This office action is in response to Preliminary Amendment communication filed on 03/25/2025. Claims 10 and 22-23 have been canceled. Claims 1-9 and 11-21 are pending on this application.
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yue et al. U.S patent No. 11,606,525.
Regarding claim 1. Figs. 1-3 of Yue et al. discloses a calibration method (Fig. 3) for a nonlinear analog-to-digital conversion circuit (comparators 165; Col. 7 lines 65 to Col. 8 lines 2 “non-uniform voltage spans (e.g., non-linear progression between baseline reference voltages for respective sub-ranges, with optional partial sub-range overlap), with offset-lookup used to capture an ADC adjustment corresponding to a given sub-range step down”) of an image sensor (105), comprising: providing the nonlinear analog-to-digital conversion circuit (165) of the image sensor (105); providing a reference voltage generating circuit (Vr11, Vr10, Vr01, Vref) ; and prior to or during normal operation of the nonlinear analog-to-digital conversion circuit (165) of the image sensor (105), using the nonlinear analog-to-digital conversion circuit (165) of the image sensor (105) to test multiple reference voltages generated by the reference voltage generating circuit ((Vr11, Vr10, Vr01, Vref) to obtain calibration parameters (SrSel[1:0]) of the nonlinear analog-to-digital conversion circuit (165) of the image sensor (105), wherein the calibration parameters (SrSel[1:0]) are used to calibrate an output value (e11, e10, e01) of the nonlinear analog-to-digital conversion circuit (165) of the image sensor (105) at normal operation (normal operation of 100), to improve stability and precision (Col 6 lines 51-54 discloses “a sub-range alignment interval tsra), one or more sub-range ADC operations are executed in respective/successive sub-range ADC intervals (t.sr-adc)”) of the nonlinear analog-to-digital conversion circuit (165) of the image sensor (105).
Allowable Subject Matter
5. Claims 2-9 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Prior art does not teach: at least one calibration row with drive disposed inside or outside a pixel array of the image sensor, and a voltage source or a current source disposed outside the pixel array, wherein each of the at least one calibration row with drive comprises a resistor or capacitor module comprising resistors or capacitors connected in series, and a first terminal and a second terminal of the resistor or capacitor module are respectively connected to the voltage source or the current source outside the pixel array; wherein said using the nonlinear analog-to-digital conversion circuit of the image sensor to test the multiple reference voltages generated by the reference voltage generating circuit comprises: in response to one calibration row with drive being selected, the voltage source or the current source providing multiple reference voltages before driving through the resistor or capacitor module; after being driven by the calibration row with drive, the nonlinear analog-to- digital conversion circuit of the image sensor performing analog-to-digital conversion on the multiple reference voltages after driving simultaneously; removing an offset error introduced in the calibration row with drive by a driving circuit and the nonlinear analog-to-digital conversion circuit of the image sensor using a correlated double sampling method; and obtaining the calibration parameters of the nonlinear analog-to-digital conversion circuit of the image sensor after a test
6. Claims 14-21 are allowed.
With respect to claim 1, in addition to other elements in the claim, prior art considered individual or combination does not teach: wherein in response to one calibration row with drive being selected, the voltage source or the current source provides multiple reference voltages before driving through the resistor or capacitor module; after being driven by the calibration row with drive, the nonlinear analog-to-digital conversion circuit of the image sensor performs analog-to- digital conversion on the multiple reference voltages after driving simultaneously; an offset error introduced in the calibration row with drive by a driving circuit and the nonlinear analog-to-digital conversion circuit of the image sensor is removed using a correlated double sampling method; and calibration parameters of the nonlinear analog- to-digital conversion circuit of the image sensor are obtained after a test.
Contact Information
7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Linh Van Nguyen whose telephone number is (571) 272-1810. The examiner can normally be reached from 8:30 – 5:00 Monday-Friday.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mr. Dameon E. Levi can be reached at (571) 272-2105. The fax phone numbers for the organization where this application or proceeding is assigned are (571-273-8300) for regular communications and (571-273-8300) for After Final communications.
09/23/2026
/LINH V NGUYEN/Primary Examiner, Art Unit 2845
