DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 8 objected to because of the following informalities: The claim recites “…is configured:”…. It appears that a word is missing in the phrase. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 8, 9, 11-13, 18, and 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ikedo (U.S. Pub. No. 20190182442).
Regarding claim 1, Ikedo discloses:
Counting mode decision circuitry (one or more processors that read out and execute computer executable instructions from the storage medium to perform the functions and/or controlling the one or more circuits to perform the functions, par. 216) configured to:
determine, for at least one imaging element (unit pixel 201 includes a sensor portion (light receiving portion) 301 where sensor portion 301 includes a photodiode 303, a quenching resistor 304, and an inverting buffer 305, where the photodiode 303 is an avalanche photodiode, where sensor portion substrate 501 has a plurality of sensor portions 301 arranged in a matrix, par. 61, 76, and Figs. 3 and 5), a photon number in a first photon counting mode (during the HDR mode the counter 306 only has a bit width of 14 bits, but is operated in the first driving mode to acquire a count value and perform the reset operation every time the count value of the counter 306 reaches the threshold Cth, where a 14-bit or higher gradation can be obtained, where for example 16-bit image data is output from the solid-state image sensor 100, par. 188) of at least two photon counting modes which (during the SDR mode the counter 306 operates in the second driving mode for disabling the operation of the saturation detector 205, and 14-bit image data is output from the solid-state image sensor 100, par. 188), in a standard operation mode, are applied after each other (FIG. 24 is a flowchart illustrating a flow of control in the image capturing apparatus, where following the flowchart processing proceeds to determination 1 in step S2404 in the case of the first driving mode and if the signal indicating that the threshold-reach signal PSAT has been detected has not been received (YES), the processing proceeds to step S2406, and the drive switcher 2301 selects the second driving mode, where a unit pixel 201 in which the photon count value has reached the threshold Cth outputs a threshold-reach signal PSAT, par. 50, 198-200, and Fig. 24); and
skip a second photon counting mode of the at least two photon counting modes, if the photon number in the first photon counting mode exceeds a predetermined threshold, thereby deviating from the standard operation mode (if the signal indicating that the threshold-reach signal PSAT has been detected has been received (NO), the processing proceeds to step S2408 without switching the driving mode (considered to be skipping the second photon mode), par. 200 and Fig. 24).
Regarding claim 2, Ikedo further discloses:
the at least two photon counting modes include a long counter bit length (LCBL) mode (during the HDR mode the counter 306 is operated in the first driving mode where a 16-bit image data is output from the solid-state image sensor 100, par. 188) and a short counter bit length (SCBL) mode (during the SDR mode the counter 306 operates and 14-bit image data is output from the solid-state image sensor 100, par. 188).
Regarding claim 3, Ikedo further discloses:
the first photon counting mode is based on the LCBL mode (during the HDR mode the counter 306 is operated in the first driving mode where a 16-bit image data is output from the solid-state image sensor 100, par. 188) and the second photon counting mode includes the SCBL mode (during the SDR mode the counter 306 operates and 14-bit image data is output from the solid-state image sensor 100, par. 188).
Regarding claim 8, Ikedo further discloses:
a logic element which (under control of the one or more processors or circuits (logic), par. 216), when the counting mode decision circuitry operates with two consecutive LCBL modes (flow chart proceeds in order of S2403, S2404, S2408, S2402, S2403, and S2404, where in S2404 if the signal indicating that the threshold-reach signal PSAT has been detected has been received (NO), the processing proceeds to step S2408 without switching the driving mode (considered to be skipping the second photon mode) and in S2408 shooting continues and the flow chart loops to S2402, par. 198-202 and Fig. 24), is configured:
generate a skip signal for skipping the SCBL mode, if the two LCBL modes indicate that the predetermined threshold is exceeded (in S2404 if the signal indicating that the threshold-reach signal PSAT has been detected has been received (NO), the processing proceeds to step S2408 without switching the driving mode (considered to be skipping the second photon mode), and note that the one or more processor or circuits are controlling the process using signals to control the apparatus, par. 200 and Fig. 24).
Regarding claim 9, Ikedo further discloses:
the logic element is further configured to:
store a logic value in a memory, wherein the logic value is indicative of an outcome of a comparison of the two consecutive LCBL modes (the one or more processors or circuits have memory of the results of operations in order to function and therefore store an outcome of a comparison of the two consecutive LCBL modes (PSAT outcome), par. 50, 200, 216, and Fig. 24).
Regarding claim 11, see the rejection of claim 1 and note that the limitations of claim 11 were shown.
Regarding claim 12, see the rejection of claim 2 and note that the limitations of claim 12 were shown.
Regarding claim 13, see the rejection of claim 3 and note that the limitations of claim 13 were shown.
Regarding claim 18, see the rejection of claim 8 and note that the limitations of claim 18 were shown.
Regarding claim 19, see the rejection of claim 9 and note that the limitations of claim 19 were shown.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4, 5, 14, and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikedo (U.S. Pub. No. 20190182442).
Regarding claim 4, Ikedo further discloses:
LCBL mode is based on at least two counts
Ikedo is silent with regards to at least two counters being shared. Official Notice is taken that it was well known before the effective filing date of the claimed invention to include using at least two/multiple counters cascaded in series (shared) to create a larger bit value than a signal counter alone. This is advantageous in that individual counters width/length can be kept smaller within circuit design. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include at least two counters being shared.
Regarding claim 5, Ikedo further discloses:
the at least one imaging element is based on a single-photon avalanche diode (photodiode 303 is an avalanche photodiode operating in a Geiger mode, par. 61).
Regarding claim 14, see the rejection of claim 4 and note that the limitations of claim 14 were shown.
Regarding claim 15, see the rejection of claim 5 and note that the limitations of claim 15 were shown.
Claim(s) 6 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikedo (U.S. Pub. No. 20190182442) in further view of Yasuda et al. (U.S. Pub. No. 20200252563).
Regarding claim 6, Ikedo is silent with regards to the two counters are configured to count photons for at least two different imaging elements. Yasuda discloses two counters are configured to count photons for at least two different imaging elements (signals for display and recording can be obtained (i.e., an image can be generated) by the counter 105AB counting the numbers of photons received by the APD 101A and the APD 101B, par. 54 and Fig. 1). As can be seen in par. 57 this is advantageous in that counter 105AB can obtain an image for display and recording by adding both signals from the different regions of the exit pupil. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include two counters are configured to count photons for at least two different imaging elements.
Note that the SCBL mode was previously shown in Ikedo.
Regarding claim 16, see the rejection of claim 6 and note that the limitations of claim 16 were shown.
Allowable Subject Matter
Claims 7, 10, 17, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 7, no prior art could be located that teaches or fairly suggests predetermined threshold is based on a standard deviation from the photon number, in combination with the rest of the limitations of the claim and limitations of the parent claim.
Regarding claim 10, no prior art could be located that teaches or fairly suggests the logic element is a NOR gate, in combination with the rest of the limitations of the claim and limitations of the parent claims.
Claim 17 is objected to for similar reasons as claim 7.
Claim 20 is objected to for similar reasons a claim 10.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS G GILES whose telephone number is (571)272-2824. The examiner can normally be reached M-F 6:45AM-3:15PM EST (HOTELING).
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/NICHOLAS G GILES/ Primary Examiner, Art Unit 2639
