DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Preliminary Amendment: 5/14/2025.
Other Refs: Non-Patent Literature - Wu, Fenggang (Performance Evaluation of Host Aware Shingled Magnetic Recording drives)(IEEE, 2017, pages 1932-1945) disclose access patterns to Shingled Magnetic Recording drives, which relates to claimed write instructions applied to SMR hard drive.
Shergill (US 20200174938) discloses Storage class memory read cache, which relates to claimed SCM being a cache area of the SRM hard drive.
Burr, G.W., Overview of candidate device technologies for storage-class memory, IBM Journal of Research and Development (Vol 52, pages 449-464), relates to claimed shingled magnetic recording hard drive and storage class memory.
In order to potentially overcome the rejections, the Office suggest amending the claims (providing showing of support from the original disclosure) to clarify the limitations related to: requesting idle memory space from the host device to be used as the temporary memory cache area (Claims 1, 6, and 17); and to clarify whether the amended requesting idle memory space from the host, is idle memory space in any storage connected to the host or whether the idle memory space is in the host (it would have been unclear to one of ordinary skill at the time of the invention whether the idle space is actually in the host or connected in a separate device).
Allowable Subject Matter
Claims 4-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
REASONS FOR ALLOWANCE
The following is an examiner’s statement of reasons for indicating allowability:
For Claims 4-15, the prior art discloses and/or renders obvious the limitations from Claims 1.
The prior art does not appear to disclose the limitations from Claims 4-15 when viewed in combination with their respective base claims and intervening claims.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1,2,16,17, 21 are rejected under 35 U.S.C. 103 as being unpatentable over Subbarao (US 20200104047) and in view of Jibbe (US 20170315913 A1) and further in view of Zhong (US 20150134889 A1) and Eemani (US 11487439 B1) and Dixon (US 20060112252)
Claim 1. Subbarao discloses A random write instruction processing method, applied to a main controller in a shingled magnetic recording SMR hard drive that further comprises a storage class memory SCM and a platter, the SCM being a cache area of the SMR hard drive (eg., Fig. 1B 0031 - Shingled Magnetic Recording (SMR) STL in a Hard Disk Drive (HDD); 0041 - FIG. 2, DSD 106 includes RAM 140, which can include, for example, a volatile RAM such as DRAM, a non-volatile RAM, SCM, ; Fig. 2 - 0043 - disk 150 may form part of a disk pack including multiple disks that are radially aligned with disk 150. In such implementations, head 136 may form part of a Head Stack Assembly (HSA) including heads arranged to read data from and write data to a corresponding disk surface in the disk pack), the method comprising:
in response to receiving a random write instruction and random write data sent from a host device (eg., 0036 - Application(s) 14 can include one or more applications, such as applications 14.sub.1, 14.sub.2, and 14.sub.3 with reference to FIG. 1B that are executed by processor 102 to read and/or write data in DSD 106.),
performing a data buffering operation (eg., 0041 - Data stored in RAM 140 can include data read from solid-state memory 142 and/or disk 150, and data to be stored in solid-state memory 142 and/or disk 150. ) and
a data integration operation in the SCM, and caching track rewriting temporary data to the SCM when performing track rewriting on the platter (eg., 0050 - insert command of the API can be used to only write the portion of the file that has changed.; 0030 - a rotating magnetic disk storage media written using overlapping tracks for SMR (e.g., disk 150 in FIG. 2); 0062 - modified data may append to a beginning, middle, or end of the previously written data for the data object of file stored in data container 31.sub.2 as a result of an insert command of the container API described above with reference to FIG. 3);
Subbarao does not disclose, but Jibbe discloses
the method further comprises: monitoring occupied capacity of the SCM (eg., 0042 - monitoring a current utilization of the data storage capacity of the data cache 220. );
in response to the occupied capacity of the SCM being not less than a first capacity threshold (eg., 0042 - Upon determining that the current utilization of the data storage capacity of the data cache 220 exceeds a threshold),
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, providing the benefit of The provisioned capacity of the thin volume 222 is used by the storage controller 200 to sequentially write data blocks from the non-sequential write requests received from the hosts 204 (see Jibbe, 0040).
Subbarao in view of Jibbe does not disclose, but Zhong discloses
detecting whether a temporary memory cache area is provided in a memory of the host device, the first capacity threshold being less than a total storage capacity of the SCM (eg., Fig. 1 0027, 0068 - the temporary memory space of the data storage device 10 may be extended to the internal memory of the host device 12, buffering the management tables and data to the temporary memory 124 of the host device 12. The data storage device 10 may dynamically utilize the internal temporary memory 124 of the host device 12 to buffer the data and management tables which were originally to be buffered in the local temporary memory 106.) and
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, providing the benefit of When the data storage device 10 and the host device 12 are in connection with each other, the data storage device 10 not only may use the local internal temporary memory 106, but also may use the internal temporary memory 124 of the host device 12 for data-buffering operations (see Zhong, 0027).
Subbarao in view of Jibbe and Zhong does not disclose, but Eemani discloses
in response to detecting that no temporary memory cache area is provided in the memory of the host device, requesting an idle memory space from the host device to be used as the temporary memory cache area (eg., col 8:7-16).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, providing the benefit of utilizing a host memory buffer to store data configured to recover the storage device from a fatal error, thus reducing the need for manufacturer or third party interventions to continue operation (see Eemani, col 1:8-12).
Subbarao in view of Jibbe, Zhong and Eemani does not disclose, but Dixon discloses
wherein the requesting an idle memory space from the host device to be used as the temporary memory cache area comprises: requesting memory usage information from the host device (eg., [0020] Fig. 2 - After start block 202, the process proceeds to block 204. At block 204, the peripheral device 100 queries the host computer 140 whether memory is available in the memory space of the host 140.);
determining whether a preset application condition is met based on the memory usage information (eg., 0020 - At decision block 206, the host computer 140 evaluates whether memory is available in the memory space of the host 140); and
in response to the preset application condition being met, requesting the idle memory space from the host device to be used as the temporary memory cache area (eg., [0021] At block 208, the host 140 allocates additional cache memory from the memory space of the host computer 140.).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, with Dixon providing the benefit of memory caching in a peripheral device and more particularly to a method and apparatus for using a portion of a memory space of a host computer as additional cache memory for a peripheral device (see Dixo, 0001).
Claim 2. Subbarao does not disclose, but renders obvious
the data integration operation is used for integrating original track data retrieved from the platter according to the random write instruction with new data corresponding to the data integration operation to form new track data (eg., 0062 - second data portion in data container 31.sub.2 may then be assembled or replayed with the modified data 36 from the first data portion from data container 31.sub.1. In this regard, a replay module (e.g., replay module 28 in FIG. 3) may determine whether edits made by modified data 36 replace all or some of the previously written data for the data object or file stored in data container 31.sub.2. In other cases, modified data may append to a beginning, middle, or end of the previously written data for the data object of file stored in data container 31.sub.2 as a result of an insert command of the container API described above with reference to FIG. 3. )
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao as suggested above, providing the benefit of the elastic container data structures of the present disclosure allow for only the changed portion of the file or data object to be written as a smaller data fragment (see Subbarao, 0055) can have an especially large impact on performance in the case of Hard Disk Drives (HDDs), which require a mechanical seek time to access data on the storage media (0025).
Subbarao does not disclose, but Jibbe discloses
wherein the data buffering operation is used for organizing the random write data into sequential write data (eg., 0013 - storage controller uses a data cache, e.g., a dynamic random access memory (DRAM), as an indirection layer to convert non-sequential write requests received from the host(s) into sequential writes),
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, providing the benefit of The provisioned capacity of the thin volume 222 is used by the storage controller 200 to sequentially write data blocks from the non-sequential write requests received from the hosts 204 (see Jibbe, 0040).
Claim 16. Subbarao discloses A random write instruction processing device, located in a shingled magnetic recording SMR hard drive that further comprises a storage class memory SCM and a platter, the SCM being a cache area of the SMR hard drive, the random write instruction processing device (eg., Fig. 1B 0031 - Shingled Magnetic Recording (SMR) STL in a Hard Disk Drive (HDD); 0041 - FIG. 2, DSD 106 includes RAM 140, which can include, for example, a volatile RAM such as DRAM, a non-volatile RAM, SCM, ; Fig. 2 - 0043 - disk 150 may form part of a disk pack including multiple disks that are radially aligned with disk 150. In such implementations, head 136 may form part of a Head Stack Assembly (HSA) including heads arranged to read data from and write data to a corresponding disk surface in the disk pack), the method comprising:
in response to receiving a random write instruction and random write data sent from a host device (eg., 0036 - Application(s) 14 can include one or more applications, such as applications 14.sub.1, 14.sub.2, and 14.sub.3 discussed above with reference to FIG. 1B that are executed by processor 102 to read and/or write data in DSD 106.),
a memory configured to store a computer program; a processor, wherein the computer program, when executed by the processor, causes the processor to perform operations of: (eg., 0041 - RAM 140 can store instructions loaded from DSD firmware 18 for execution by control circuitry 120, and/or data used in executing DSD firmware 18,);
performing a data buffering operation (eg., 0041 - Data stored in RAM 140 can include data read from solid-state memory 142 and/or disk 150, and data to be stored in solid-state memory 142 and/or disk 150. ) and
a data integration operation in the SCM in response to receiving a random write instruction and random write data sent from a host device (eg., 0050 - insert command of the API can be used to only write the portion of the file that has changed.; 0030 - a rotating magnetic disk storage media written using overlapping tracks for SMR (e.g., disk 150 in FIG. 2); 0062 - modified data may append to a beginning, middle, or end of the previously written data for the data object of file stored in data container 31.sub.2 as a result of an insert command of the container API described above with reference to FIG. 3);
caching caching track rewriting temporary data to the SCM when performing track rewriting on the platter (eg., 0027 Fig. 1B - container data structure(s) 20 can include one or more data structures of variable size with entries that allow for the access of data stored in at least one non-volatile storage media of DSD 106 (e.g., solid-state memory 142 and/or disk 150 in FIG. 2)
Subbarao does not disclose, but Jibbe discloses
monitoring occupied capacity of the SCM (eg., 0042 - monitoring a current utilization of the data storage capacity of the data cache 220. );
in response to the occupied capacity of the SCM being not less than a first capacity threshold (eg., 0042 - Upon determining that the current utilization of the data storage capacity of the data cache 220 exceeds a threshold),
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, providing the benefit of The provisioned capacity of the thin volume 222 is used by the storage controller 200 to sequentially write data blocks from the non-sequential write requests received from the hosts 204 (see Jibbe, 0040).
Subbarao in view of Jibbe does not disclose, but Zhong discloses
detecting whether a temporary memory cache area is provided in a memory of the host device, the first capacity threshold being less than a total storage capacity of the SCM (eg., Fig. 1 0027, 0068 - the temporary memory space of the data storage device 10 may be extended to the internal memory of the host device 12, buffering the management tables and data to the temporary memory 124 of the host device 12. The data storage device 10 may dynamically utilize the internal temporary memory 124 of the host device 12 to buffer the data and management tables which were originally to be buffered in the local temporary memory 106.) and
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, providing the benefit of When the data storage device 10 and the host device 12 are in connection with each other, the data storage device 10 not only may use the local internal temporary memory 106, but also may use the internal temporary memory 124 of the host device 12 for data-buffering operations (see Zhong, 0027).
Subbarao in view of Jibbe and Zhong does not disclose, but Eemani discloses
in response to detecting that no temporary memory cache area is provided in the memory of the host device, requesting an idle memory space from the host device to be used as the temporary memory cache area (eg., col 8:7-16).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, with Eemani providing the benefit of utilizing a host memory buffer to store data configured to recover the storage device from a fatal error, thus reducing the need for manufacturer or third party interventions to continue operation (see Eemani, col 1:8-12).
Subbarao in view of Jibbe, Zhong and Eemani does not disclose, but Dixon discloses
wherein the requesting an idle memory space from the host device to be used as the temporary memory cache area comprises: requesting memory usage information from the host device (eg., [0020] Fig. 2 - After start block 202, the process proceeds to block 204. At block 204, the peripheral device 100 queries the host computer 140 whether memory is available in the memory space of the host 140.);
determining whether a preset application condition is met based on the memory usage information (eg., 0020 - At decision block 206, the host computer 140 evaluates whether memory is available in the memory space of the host 140); and
in response to the preset application condition being met, requesting the idle memory space from the host device to be used as the temporary memory cache area (eg., [0021] At block 208, the host 140 allocates additional cache memory from the memory space of the host computer 140.).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, with Dixon providing the benefit of memory caching in a peripheral device and more particularly to a method and apparatus for using a portion of a memory space of a host computer as additional cache memory for a peripheral device (see Dixo, 0001).
Claim 21 (dependent from Claim 16). Subbarao does not disclose, but renders obvious
the data integration operation is used for integrating original track data retrieved from the platter according to the random write instruction with new data corresponding to the data integration operation to form new track data (eg., 0062 - second data portion in data container 31.sub.2 may then be assembled or replayed with the modified data 36 from the first data portion from data container 31.sub.1. In this regard, a replay module (e.g., replay module 28 in FIG. 3) may determine whether edits made by modified data 36 replace all or some of the previously written data for the data object or file stored in data container 31.sub.2. In other cases, modified data may append to a beginning, middle, or end of the previously written data for the data object of file stored in data container 31.sub.2 as a result of an insert command of the container API described above with reference to FIG. 3. )
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao as suggested above, providing the benefit of the elastic container data structures of the present disclosure allow for only the changed portion of the file or data object to be written as a smaller data fragment (see Subbarao, 0055) can have an especially large impact on performance in the case of Hard Disk Drives (HDDs), which require a mechanical seek time to access data on the storage media (0025).
Subbarao does not disclose, but Jibbe discloses
wherein the data buffering operation is used for organizing the random write data into sequential write data (eg., 0013 - storage controller uses a data cache, e.g., a dynamic random access memory (DRAM), as an indirection layer to convert non-sequential write requests received from the host(s) into sequential writes),
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, providing the benefit of The provisioned capacity of the thin volume 222 is used by the storage controller 200 to sequentially write data blocks from the non-sequential write requests received from the hosts 204 (see Jibbe, 0040).
Claim 17. Subbarao discloses A shingled magnetic recording SMR hard drive, comprising a main controller, a storage class memory SCM, and a platter, the SCM being a cache area of the SMR hard drive (eg., Fig. 1B 0031 - Shingled Magnetic Recording (SMR) STL in a Hard Disk Drive (HDD); 0041 - FIG. 2, DSD 106 includes RAM 140, which can include, for example, a volatile RAM such as DRAM, a non-volatile RAM, SCM, ; Fig. 2 - 0043 - disk 150 may form part of a disk pack including multiple disks that are radially aligned with disk 150. In such implementations, head 136 may form part of a Head Stack Assembly (HSA) including heads arranged to read data from and write data to a corresponding disk surface in the disk pack),,
in response to receiving a random write instruction and random write data sent from a host device, performing a data buffering operation (eg., 0041 - Data stored in RAM 140 can include data read from solid-state memory 142 and/or disk 150, and data to be stored in solid-state memory 142 and/or disk 150. ; 0042 - positioned to read and write data on the surface of disk 150.) and
a data integration operation in the SCM (eg., 0050 - insert command of the API can be used to only write the portion of the file that has changed.; 0030 - a rotating magnetic disk storage media written using overlapping tracks for SMR (e.g., disk 150 in FIG. 2); 0062 - modified data may append to a beginning, middle, or end of the previously written data for the data object of file stored in data container 31.sub.2 as a result of an insert command of the container API described above with reference to FIG. 3);
caching track rewriting temporary data to the SCM when performing track rewriting on the platter (eg., 0027 Fig. 1B - container data structure(s) 20 can include one or more data structures of variable size with entries that allow for the access of data stored in at least one non-volatile storage media of DSD 106 (e.g., solid-state memory 142 and/or disk 150 in FIG. 2)
Subbarao does not disclose, but Jibbe discloses
wherein the main controller is configured to execute operations of: monitoring occupied capacity of the SCM (eg., 0042 - monitoring a current utilization of the data storage capacity of the data cache 220. );
in response to the occupied capacity of the SCM being not less than a first capacity threshold (eg., 0042 - Upon determining that the current utilization of the data storage capacity of the data cache 220 exceeds a threshold),
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, providing the benefit of The provisioned capacity of the thin volume 222 is used by the storage controller 200 to sequentially write data blocks from the non-sequential write requests received from the hosts 204 (see Jibbe, 0040).
Subbarao in view of Jibbe does not disclose, but Zhong discloses
detecting whether a temporary memory cache area is provided in a memory of the host device, the first capacity threshold being less than a total storage capacity of the SCM (eg., Fig. 1 0027, 0068 - the temporary memory space of the data storage device 10 may be extended to the internal memory of the host device 12, buffering the management tables and data to the temporary memory 124 of the host device 12. The data storage device 10 may dynamically utilize the internal temporary memory 124 of the host device 12 to buffer the data and management tables which were originally to be buffered in the local temporary memory 106.) and
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, providing the benefit of When the data storage device 10 and the host device 12 are in connection with each other, the data storage device 10 not only may use the local internal temporary memory 106, but also may use the internal temporary memory 124 of the host device 12 for data-buffering operations (see Zhong, 0027).
Subbarao in view of Jibbe and Zhong does not disclose, but Eemani discloses
in response to detecting that no temporary memory cache area is provided in the memory of the host device, requesting an idle memory space from the host device to be used as the temporary memory cache area (eg., col 8:7-16).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, with Eemani providing the benefit of utilizing a host memory buffer to store data configured to recover the storage device from a fatal error, thus reducing the need for manufacturer or third party interventions to continue operation (see Eemani, col 1:8-12).
Subbarao in view of Jibbe, Zhong and Eemani does not disclose, but Dixon discloses
wherein the requesting an idle memory space from the host device to be used as the temporary memory cache area comprises: requesting memory usage information from the host device (eg., [0020] Fig. 2 - After start block 202, the process proceeds to block 204. At block 204, the peripheral device 100 queries the host computer 140 whether memory is available in the memory space of the host 140.);
determining whether a preset application condition is met based on the memory usage information (eg., 0020 - At decision block 206, the host computer 140 evaluates whether memory is available in the memory space of the host 140); and
in response to the preset application condition being met, requesting the idle memory space from the host device to be used as the temporary memory cache area (eg., [0021] At block 208, the host 140 allocates additional cache memory from the memory space of the host computer 140.).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, with Dixon providing the benefit of memory caching in a peripheral device and more particularly to a method and apparatus for using a portion of a memory space of a host computer as additional cache memory for a peripheral device (see Dixo, 0001).
Claim 18 are rejected under 35 U.S.C. 103 as being unpatentable over Subbarao (US 20200104047) and in view of Jibbe (US 20170315913 A1) and further in view of Zhong (US 20150134889 A1) and Eemani (US 11487439 B1) and Dixon (cited above) and Desai (US 20150356020)
Claim 18. Subbarao in view of Jibbe, Zhong, Eemani and Dixon does not disclose, but Desai discloses
wherein the SCM comprises a first firmware storage area for storing host memory borrowing firmware (eg., 0024 - FIG. 1, for example, device 104 retrieves metadata from NVM 116 and stores that metadata, possibly in the form of a control table 124, in cache 118. When cache 118 becomes full, if more metadata is needed, as in the case of a high-end application, for example, rather than moving some metadata from cache 118 back into NVM 116, device 104 will transfer that metadata from cache 118 into host buffer 112 via host bus 106.).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, Eemani, and Dixon with Desai, providing the benefit of SSD architecture that can perform caching across a host bus, i.e., an SSD device that can store some of its cache in the host memory rather than on the SSD device. By reversing the normal direction of cache operations—the host caches data for the SSD rather than the SSD caching data for the host as is conventionally done (see Desai, 0018).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Subbarao (US 20200104047) and in view of Jibbe (US 20170315913 A1) and further in view of Zhong (US 20150134889 A1) and Eemani (US 11487439 B1) and Dixon (cited above) and Bulusu (US 20200387325 A1)
Claim 19. Subbarao in view of Jibbe, Zhong, Eemani and Dixon does not disclose, but Bulusu discloses
wherein the SCM comprises a second firmware storage area for storing BIOS that is a basic input/output system (eg., 0012] Software-defined storage-class memory, such as a non-volatile dual in-line memory module (NVDIMM) may be used to divide non-volatile storage between an operating system and system firmware, such as Basic Input/Output System (BIOS) or Unified Extensible Firmware Interface (UEFI).).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, Eemani, and Dixon with Bulusu, providing the benefit of feature of software-defined storage-class memory is made possible through firmware-assisted coupling of volatile memory regions and non-volatile storage partitions (see Bulusu, 0001).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Subbarao (US 20200104047) and in view of Jibbe (US 20170315913 A1) and further in view of Zhong (US 20150134889 A1) and Eemani (US 11487439 B1) and Dixon (cited above) and Macko (US 20170123944 A1)
Claim 20. Subbarao in view of Jibbe, Zhong, Eemani and Dixon does not disclose, but Macko discloses
comprising a host device and the SMR hard drive according to claim 17 (eg., 0035 - storage system 100 includes a host 105 with an SMR array subsystem 130, non-volatile storage 140,).
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the SMR having data caching as disclosed by Subbarao with Jibbe, with Zhong, Eemani, and Dixon with Macko, providing the benefit of shingled writing can place readable tracks closer together and increase data density within tracks themselves, further extending the limits of perpendicular magnetic recording (see Macko, 0003).
Response to Arguments
Applicant's arguments filed 9/7/2026 have been fully considered but they are not persuasive.
For claims 1, 16 and 17, Applicant argues that that the cited references do not disclose the amended limitations. The Office disagrees.
In the present OA, the updated combination of references render the amended limitations as obvious.
Specifically, Subbarao in view of Jibbe, Zhong and Eemani does not disclose, but Dixon discloses
wherein the requesting an idle memory space from the host device to be used as the temporary memory cache area comprises: requesting memory usage information from the host device (eg., [0020] Fig. 2 - After start block 202, the process proceeds to block 204. At block 204, the peripheral device 100 queries the host computer 140 whether memory is available in the memory space of the host 140.);
determining whether a preset application condition is met based on the memory usage information (eg., 0020 - At decision block 206, the host computer 140 evaluates whether memory is available in the memory space of the host 140); and
in response to the preset application condition being met, requesting the idle memory space from the host device to be used as the temporary memory cache area (eg., [0021] At block 208, the host 140 allocates additional cache memory from the memory space of the host computer 140.).
Applicant’s arguments for dependent claims are based on their respective base independent claims 1, 16 and/or 17, which are addressed above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GAUTAM SAIN whose telephone number is (571)270-3555. The examiner can normally be reached M-F 9-5.
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/GAUTAM SAIN/Primary Examiner, Art Unit 2135
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