DETAILED ACTION
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/16/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-8, and 13-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Blinick et al US Patent No. 8,055,934.
Regarding claim 1, Blinick teaches a computer system (see figure 2) comprising:
a plurality of processors (servers 8a-8d);
a plurality of peripheral devices (device adapter 24a-n);
a switch network (switch 27a) coupled between the plurality of processors and the plurality of peripheral devices, wherein the plurality of processors and plurality of peripheral drivers are configured in a plurality of partitions (see col 4 ln 64-65, Each server 8 a-8 d may have one or more logical partitions executing in the server 8 a-8 d, also see col 5 ln31-34, Each server 8 a-8 d may be assigned a portion of the adapters 22 a, 22 b . . . 22 n, 23 a, 23 b . . . 23 n, 24 a, 24 b . . . 24 n, and 26 a, 26 b . . . 26 n);
a driver executing on a first processor of the processors, the driver storing state information (see col 2 ln 21-24, the driver software of the root server stores configuration data in the switch); and
a registry executing on the first processor of the processors (construed as data stored in the memory and registers of switch 27 by the root server), the registry storing the state information (see col 6 ln 65-66, the detected error may be stored in error registers such as the error registers 214),
wherein the driver reads new state information from the registry when a path between a first processor and a first peripheral device through the switch network changes (see col 7 ln 6-8, the root server may also read the information stored in the error registers 214).
Regarding claim 2, Blinick further teaches the switch network is a peripheral component interconnect express (PCIe) switch network, the driver is a PCIe driver, and the registry is a PCIe registry (see col 1 ln 17-18, PCIe switch, also see col 2 ln 59-60, PCI standard advanced error reporting (AER) registers).
Regarding claim 3, Blinick further teaches the state information is routing information (see figure 2, routing logic 200).
Regarding claim 4, Blinick further teaches the driver reads new routing information from the registry when a route between the first processor and the first peripheral device, through the switch network, in a first partition changes (see col 7 ln 6-8, the root server may also read the information stored in the error registers 214, also see col 4 ln 64-66, each server 8 a-8 d may have one or more logical partitions executing in the server 8 a-8 d).
Regarding claim 5, Blinick further teaches the registry receives routing information from an operating system managing a plurality of partitions of the plurality of processors and the plurality of peripheral devices (see col 4 ln 64-66, each server 8 a-8 d may have one or more logical partitions executing in the server 8 a-8 d. Each logical partition separately executes an operating system and device drivers).
Regarding claim 6, Blinick further teaches each partition comprising at least one processor and a first plurality of peripheral drivers coupled together through a portion of the switch network (see col 4 ln 65-68 col 5 ln 1-2, The logical partitions comprise a division of the processors into logical independent but cooperating processing systems each having their own operating systems and device drivers).
Regarding claim 7, Blinick further teaches the registry comprises a plurality of routing paths between the processors and peripheral devices (see figure 2, routing logic 200, also see col 5 ln 24-26, The fabric 30 may comprise one or more interfaces providing communication paths between the servers 8 a-8 d and adapters).
Regarding claim 8, Blinick further teaches each routing path of the plurality of routing paths is stored at a unique address in the registry (see figure 2 and col 5 ln 24-26, further it is clear that every database has unique addresses to store information).
Regarding claim 13, Blinick further teaches one or more of the plurality of processors comprise one or more of an x86 processor, an ARM processor, or an artificial intelligence optimized processor (see col 4 ln 57-59, Each processor can include one or more central processing units (CPUs)).
Regarding claim 14, Blinick further teaches one or more of the plurality of peripheral devices comprise one or more of a solid state drive, a graphics processing unit, or a field programmable gate array (see col 10 ln 47-49, an integrated circuit chip, Programmable Gate Array (PGA), Application Specific Integrated Circuit (ASIC), etc.).
Regarding claims 15-17, please refer to the rejection of claims 1, 3 and 5 since the claimed subject matter is substantially similar. The claims recite the method performed by the computer system of claims 1, 3 and 5 addressed above.
Regarding claims 18-20, please refer to the rejection of claims 1, 3 and 4 since the claimed subject matter is substantially similar. Blinick further teaches a non-transitory computer-readable medium storing a program executable by one or more processors (see col 10 ln 38-39, a processor may read and execute the code from the computer readable medium).
Allowable Subject Matter
Claims 9-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Tu et al US 20260019386 discloses a registry or table having rules for a switch device driver to connect to one or more external devices
Thubert et al US 20130291117 discloses a registry maintains a binding table for addresses associated with a device for the purpose of data routing in a network
Mitomi et al US 20130219082 discloses a mobile router is able to automatically update a registry table when switching paths
Arai et al US 20110055622 discloses failover switching in a network apparatus using registries in an interface database
Komatsu et al US 20070234113 discloses a path switching method in a switch between a host and a storage system
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PHONG H DANG whose telephone number is (571)272-0470. The examiner can normally be reached Monday-Friday 9:30AM - 6:00PM.
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/PHONG H DANG/Primary Examiner, Art Unit 2184
