CTNF 19/122,676 CTNF 91325 NON-FINAL REJECTION DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 101 Claims 31-37 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. Specifically, rejected claim 31 recites “[a]t least one machine readable medium” per se. Applicant teaches “at least one non-transitory computer readable medium or machine readable medium, such as an optical, magnetic or semiconductor storage. The examples are not limited in this context ” in the instant specification at paragraph [0050]. Specifically, the Examiner draws the Applicant’s attention to the open-ended language that the Examiner has bold-faced in the quoted portions of the text. The specification does not limit the claimed “[a]t least one machine readable medium” to a non-transitory computer readable medium. The United States Patent and Trademark Office (USPTO) is obliged to give claims their broadest reasonable interpretation consistent with the specification during proceedings before the USPTO. See In re Zietz, 893 F.2d 319 (Fed. Cir. 1989). The broadest reasonable interpretation of a claim drawn to a computer readable medium typically covers forms of non-transitory tangible media and transitory propagating signals per se in view of the ordinary and customary meaning of computer readable media, particularly when the specification is silent. (See MPEP 2111.01.) When the broadest reasonable interpretation of a claim covers a signal per se, the claim must be rejected under 35 U.S.C. § 101 as covering non-statutory subject matter. See In re Nuijten, 500 F.3d 1346, 1356-57 (Fed. Cir. 2007). The USPTO recognizes that applicants may have claims directed to computer readable media that cover signals per se, which the USPTO must reject under 35 U.S.C. § 101 as covering both non-statutory subject matter and statutory subject matter. In an effort to assist the patent community in overcoming a rejection or potential rejection under 35 U.S.C. § 101 in this situation, the USPTO suggests the following approach. A claim drawn to such a computer readable medium that covers both transitory and non-transitory embodiments may be amended to narrow the claim to cover only statutory embodiments to avoid a rejection under 35 U.S.C. § 101 by adding the limitation "non-transitory" to the claim. Such an amendment would typically not raise the issue of new matter, even when the specification is silent because the broadest reasonable interpretation relies on the ordinary and customary meaning that includes signals per se. The limited situations in which such an amendment could raise issues of new matter occur, for example, when the specification does not support a non-transitory embodiment because a signal per se is the only viable embodiment such that the amended claim is impermissibly broadened beyond the supporting disclosure. See e.g., Gentry Gallery, Inc. v. Berkline Corp., 134F.3d 1473 (Fed. Cir. 1998). In view of the Applicant’s specification (as cited above) and the guidance provided (also above), “[a]t least one machine readable medium” under the broadest reasonable interpretation includes signals per se and therefore constitutes non-statutory subject matter. The Examiner recommends that the Applicant amend the rejected claims to recite “[a]t least one non-transitory machine readable medium.” Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 24-25, 29-32, 36, 38-39, and 43 are rejected under 35 U.S.C. 103 as being unpatentable over Davis et al. (US 2006/0224830) and Mandal et al. (US 2021/0303467) . Regarding claim 24, Davis et al. disclose: An apparatus comprising: …a cache (Figure 1 L2 Cache 103) ; and …receive an indication of whether data to be included in a cache line of the cache is likely to be reused (Figure 5A step 507 Read operation? YES) ; set a priority bit for the data to be included in the cache line based on an indication that the data is likely to be reused (Figure 5A step 509 Set reused bit (R) to logical value of one in tag of accessed cache line) ; and set an age bit for the data to indicate an order of access for the cache line to store the data to the cache compared to at least one other cache line to be configured to separately store data to the cache (Figure 5A step 505 Modify LRU bits in tag associated with cache line where requested data is located to indicate cache line as most recently used, step 506 Adjust LRU bits of other cache lines in congruence class) , wherein the priority bit and the age bit are to be used to determine when to evict the data included in the cache line from the cache (Figure 6 step 609 Select least recently used cache line in selected congruence class with R=0, step 610 Invalidate or cast out current contents of selected cache line) . Davis et al. do not appear to explicitly teach “a plurality of processing cores…a cache controller configured to.” However, Mandal et al. disclose: a plurality of processing cores (FIG. 1 Processor 102 Core 0…Core N) …a cache controller configured to (FIG. 1 L2/MLC Cache Controller 120) Davis et al. and Mandal et al. are analogous art because Davis et al. and Mandal et al. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Davis et al. and Mandal et al. before him/her, to modify the teachings of Davis et al. with the Mandal et al. teachings of processing cores and cache controllers because …because such a modification would have amounted to little more than combining “familiar elements according to known methods” and would have been obvious because it would have done “no more than yield predictable results.” (MPEP 2143 I.A.) Implementing caching for processing cores and cache controllers are well-known techniques used faster retrieval of the items that would have yielded the predictable result performing the caching methods taught by Davis et al. Regarding claim 25, Davis et al. further disclose: The apparatus of claim 24, wherein the cache controller is configured to determine when to evict the data based on a least recently used (LRU) cache replacement policy that causes the cache controller to evict the data from the cache when the priority bit and the age bit are separately decremented to a value of 0 (Figure 6 step 609 Select least recently used cache line in selected congruence class with R=0; [0031] Field 303 may store a lowest number, e.g., 000 in binary, for cache line 203 who is least recently used. That is, field 303 may store a lowest number, e.g., 000 in binary, for cache line 203 located at the bottom of the logical stack) . Regarding claim 29, Davis et al. further disclose: The apparatus of claim 24, wherein the indication that the data is likely to be reused is received in response to an instruction set architecture (ISA) MOVREUSE instruction that is used to load the data to the cache line and indicate that the data is likely to be reused ([0052] Referring to FIG. 6, in conjunction with FIGS. 1-2 and 4, in step 601, data requested by processor 101 is not found in the cache memory of L1 cache 102…In step 604, the requested data is retrieved from system memory 105; [0057] In step 611, new data is loaded in the selected cache line 203; [0041] the state of reused bit 401 may depend on the read operation) . Davis et al. do not appear to explicitly teach “an instruction set architecture (ISA) MOVREUSE instruction.” However, Mandal further disclose: an instruction set architecture (ISA) MOVREUSE (MOVREUSE is merely a label for the instruction) instruction ([0002] A processor, or set of processors, executes instructions from an instruction set, e.g., the instruction set architecture (ISA); [0098]) Regarding claim 30, Davis et al. further disclose: The apparatus of claim 24, wherein the cache comprises level 2 (L2) cache or level 3 (L3) cache (Figure 1 L2 Cache 103) . Claim 31-32, 36, 38-39, and 43 recite limitations that are substantially similar to the limitations of claims 24-25 and 39-30. Therefore, claims 31-32, 36, 38-39, and 43 are rejected under the same reasoning as claims 24-25 and 39-30 . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 26-28, 33-35, and 40-42 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is the examiner’s statement of reasons for allowance: While one or more reasons are offered below citing reasons that the claims are allowable over the prior art, it is each claim taken as a whole, including interrelationships and interconnections between various claimed elements, which are allowable over the prior art of record and not any individual limitation of a claim. The prior art of Davis et al. and Mandal et al., when taken alone or in combination with each other, fail to anticipate and/or make obvious to one of ordinary skill in the art the claimed invention prior to the effective filing date. Regarding claim 26, the prior art, alone or in combination, does not disclose the following limitation, as claimed, in combination with the other claimed limitations: “The apparatus of claim 24, wherein the data is likely to be reused based on use of the data in a hash join operation.” Claims 27 and 28 would be allowable based on their dependency from claim 26. Claims 33-35 and 40-42 would be allowable under the same rationale as claims 26-28. Conclusion The prior art made of record and not relied upon. Moyer (US 2023/0100230), is considered pertinent to applicant's disclosure because it discloses insertion policies for low-level caches. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TRACY A WARREN whose telephone number is (571)270-7288. The examiner can normally be reached M-Th 7:30am-5pm, Alternate F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan P. Savla can be reached at 571-272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TRACY A WARREN/Primary Examiner, Art Unit 2137 Application/Control Number: 19/122,676 Page 2 Art Unit: 2137 Application/Control Number: 19/122,676 Page 3 Art Unit: 2137 Application/Control Number: 19/122,676 Page 4 Art Unit: 2137 Application/Control Number: 19/122,676 Page 5 Art Unit: 2137 Application/Control Number: 19/122,676 Page 6 Art Unit: 2137 Application/Control Number: 19/122,676 Page 7 Art Unit: 2137 Application/Control Number: 19/122,676 Page 8 Art Unit: 2137
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