Prosecution Insights
Last updated: August 18, 2026
Application No. 19/132,837

POOR ANTENNA POSITIONING DETECTION

Final Rejection §102§103
Filed
May 26, 2025
Priority
Nov 29, 2022 — EU 22306752.1 +1 more
Examiner
WALSH, DANIEL I
Art Unit
2876
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Thales Group
OA Round
2 (Final)
64%
Grant Probability
Moderate
3-4
OA Rounds
1y 10m
Est. Remaining
76%
With Interview

Examiner Intelligence

Grants 64% of resolved cases
64%
Career Allowance Rate
516 granted / 802 resolved
-3.7% vs TC avg
Moderate +12% lift
Without
With
+11.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
39 currently pending
Career history
870
Total Applications
across all art units

Statute-Specific Performance

§101
12.2%
-27.8% vs TC avg
§103
56.6%
+16.6% vs TC avg
§102
9.6%
-30.4% vs TC avg
§112
15.8%
-24.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 802 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-17 and 20-21 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Finn et al. (US 20140091149). Re claim 1, Finn et al. teaches: A card (FIG. 4A+) comprising: a core layer (FIG. 1+, CB FIG. 4A+); an antenna pattern (BA/ CA/ CC/ EA) formed on the core layer; and one or more bump out-areas (on right side of FIG. 4A a, f) of the antenna pattern having a threshold distance towards a process boundary, each bump out area comprises a deviation of the antenna pattern towards the process boundary such as the bump out areas bumping out toward the process boundary/ edge of the card, wherein the card is configured to pass a continuity test if a cutting process fails to create an open circuit at the bump-out area (card passes a test if cutting fails to create an open circuit at the bump out area, as the structure meets such claimed limitations which are drawn to a method of using the card/ testing the card, and as far as the card is concerned, because the bump-out is within the card it is configured to pass a test as recited. A threshold distance is interpreted as the spacing from the antenna to the edge of the card. Re the limitations of the continuity test and identifying it as defective, the Examiner note that limitations of testing that is performed on the card itself is not germane to the card structure (it’s a device/ card claim) and is instead drawn to intended use of the card, which is not patentably distinguishing in a card (device) claim. Re claim 2, the Examiner notes that the claim is directed to a card and therefore the method of forming the device is not germane to the issue of patentability of the device itself and therefore such limitations of the manufacture of the card is not given patentable weight. Re claim 3, FIG. 4A shows the bump-out areas on an upper periphery. Re claim 4, for purposes of claim 4, the Examiner has interpreted that the lower periphery bump-out areas are read on by the lower rounded corner sections of the antenna (FIG. 4A) as there are inner and outer looping of the antenna wire, and therefore an outer looping is a bumped out area compared to an inner looping. Re claim 5, for claim 5 examination purposes, the Examiner will interpret the 4 rounded corners of the antenna (FIG. 4A) as the bump-out areas on the upper and lower periphery (bumped out compared to inner loop windings). Re claim 6, this has been discussed above wherein the top antenna corners are the bump-out areas on a left and right periphery, (bumped out compared to inner loop windings)for example. Re claim 7, this has been discussed above wherein the antenna corners are the bump-out areas on a left and right periphery, (bumped out compared to inner loop windings) for example. Re claim 8, the Examiner notes that FIG. 4A shows a milled cavity that has an one or more bump out areas (corners, bumped out compared to inner loop windings). Re claim 9, the milled cavity has bump-out areas on its corners, which read on the limitations. Re claim 10, FIG. 4A+ shows that if a,f is shifted to up or down enough, or a corner is shifted up or down enough, that it will fail a test when cut (continuity test). Re claim 11, FIG. 4A+ shows that if a,f is shifted to the left or right, or a corner bump out area is shifted to the left or right, that it will fail a test when cut making an open circuit (continuity test). Re claims 12-13, the milling areas are interpreted to structurally read on such claims . Re claim 14, as discussed above, the antenna corners read on such limitations. Re claim 15, as discussed above, the left and right antenna corners read on such limitations. Re claim 16, as discussed above, the upper and lower periphery bump out areas of the milled area antenna pattern are met by the corners of the pattern, such as those outside a winding of the same corner. Re claim 17, as discussed above, the perimeter concentric windings of the EA/ IW/ CC/ OW antenna patterns which have a number of turns (paragraph [0124]+, [0071]+,[0131]+ FIG. 1+), ) and thus their corners are interpreted as bump-out areas, compared to inner areas, for example, read on the claimed limitations. If the structure of the card antenna pattern is shifted too much, the structure is interpreted to fail a continuity test if cutting produces an open circuit. As a card claim, the card structure is interpreted to read on such limitations, as it is not a method claim. Re claims 20-21, a milling process/ milled area has been discussed above. A card is configured to pass a test if a milling does not create an open circuit at the bump out areas, as discussed above, and fails if cutting creates an open circuit. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 20-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Finn et al., as discussed above, in view of Mear et al. (US 2018046893). The teachings of Finn et al. have been discussed above. Finn et al. is silent to using the embossing area to detect and avoid overprinting with the antenna. Mear et al. teaches at paragraph [0008]+ that embossing can damage or cut the antenna tracks and Mear et al. attempts to fix such an issue. Prior to the effective filing date, it would have been obvious to one of ordinary skill in the art to combine the teachings to try to avoid interfering with the embossing and antenna for proper functioning and appearance. Claim(s) 22-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Finn et al., as discussed above, in view of Boiron et al. (US 20150186769) and Weis (US 20210194111). Re claim 22, the teachings of Finn et al. have been discussed above. The antenna is formed on the core layer as the antenna is on a substrate/ layer. The bump out areas have been discussed above as a deviation toward a process boundary such as a periphery of the card. Finn et al. is silent to the continuity test passing if an open circuit is not made at the bump out and is performed before a card personalization or chip embedding and a card is defective if there is a discontinuity. Boiron et al. teaches that the card belongs to a board collectively forming the cards and the board is cut to individualize the cards after the antennas are formed and before implanting the module in each card (paragraph [0020]+). Such teachings are interpreted to read on cutting the cards before chip module implanting. Prior to the effective filing date, it would have been obvious to one of ordinary skill in the art to combine the teachings in order to form cards in a known and accepted way to be ready for chip implanting. Finn et al./ Boiron et al. teaches the cutting before chip embedding, but is silent to testing the antenna for an open circuit before the chip embedding. Weis teaches a smartcard (paragraph [0017]) and testing the antenna before the chip is installed (paragraph [0111]). Prior to the effective filing date, it would have been obvious to one of ordinary skill in the art to combine the teachings to verify antenna functionality ( defective per the claim) prior to chip insertion as part of confirming proper card manufacture, wherein as the card is cut the testing of the antenna is interpreted to include testing for functionality, which would include discontinuity failing the test. Re claim 23, as discussed above, if a cut interrupts the antenna, it is implicit it would not be verified due to lack of communication. Claim(s) 22-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Finn et al., as discussed above, in view of Boiron et al. (US 20150186769) and Koch et al. (US 20090000107). Re claim 22, the teachings of Finn et al. have been discussed above. The antenna is formed on the core layer as the antenna is on a substrate/ layer. The bump out areas have been discussed above as a deviation toward a process boundary such as a periphery of the card. Finn et al. is silent to the continuity test passing if an open circuit is not made at the bump out and is performed before a card personalization or chip embedding and a card is defective if there is a discontinuity. Boiron et al. teaches that the card belongs to a board collectively forming the cards and the board is cut to individualize the cards after the antennas are formed and before implanting the module in each card (paragraph [0020]+). Such teachings are interpreted to read on cutting the cards before chip module implanting. Prior to the effective filing date, it would have been obvious to one of ordinary skill in the art to combine the teachings in order to form cards in a known and accepted way to be ready for chip implanting. Finn et al./ Boiron et al. teaches the cutting before chip embedding, but is silent to testing the antenna for an open circuit before the chip embedding. Koch et al. teaches testing an antenna electrically before inserting the chip module (paragraph [0008]+). Prior to the effective filing date, it would have been obvious to one of ordinary skill in the art to combine the teachings to verify antenna functionality ( defective per the claim) prior to chip insertion as part of confirming proper card manufacture, wherein as the card is cut the testing of the antenna is interpreted to include testing for functionality, which would include discontinuity failing the test. Re claim 23, as discussed above, if a cut interrupts the antenna, it is implicit it would not be verified due to lack of communication. Response to Arguments Applicant's arguments filed have been fully considered but they are not persuasive. The Examiner notes that the details of a testing process are not germane to the device (card) claims 1-17 and 20-21 as they are an intended use of the card. Re the method claims 22-23, new art has been applied above to address the newly added limitations. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL I WALSH whose telephone number is (571)272-2409. The examiner can normally be reached 7-9pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Paik can be reached at 571-272-2404. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DANIEL I WALSH/ Primary Examiner, Art Unit 2876
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Prosecution Timeline

May 26, 2025
Application Filed
Apr 09, 2026
Non-Final Rejection mailed — §102, §103
Jun 25, 2026
Response Filed
Jul 23, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
64%
Grant Probability
76%
With Interview (+11.9%)
3y 1m (~1y 10m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 802 resolved cases by this examiner. Grant probability derived from career allowance rate.

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