Prosecution Insights
Last updated: October 04, 2026
Application No. 19/133,604

Driving Apparatus for SIC-MOSFET Device

Non-Final OA §102§103§112
Filed
May 28, 2025
Priority
Nov 29, 2022 — nonprovisional of PCTCN2022135127
Examiner
RETEBO, METASEBIA T
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Siemens Aktiengesellschaft
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
595 granted / 665 resolved
+21.5% vs TC avg
Moderate +5% lift
Without
With
+5.3%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 10m
Avg Prosecution
30 currently pending
Career history
691
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
49.2%
+9.2% vs TC avg
§102
30.1%
-9.9% vs TC avg
§112
13.5%
-26.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 665 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 1 is objected to because of the following informalities: Claim 1, “a SiC-MOSFET device” in line 15 should be --the SiC-MOSFET--. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 4-6 and 8-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 4 recites “any Sic-MOSFET” in line 4. The phrase “any Sic-MOSFET” is ambiguous because it is unclear whether it refers to the MOSFET device of claim 1 or introduce a second MOSFET device. Claims 5-6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being depended on claim 4. Claims 8 and 9 recite “each Sic-MOSFET”. The phrase “each Sic-MOSFET” is unclear because the independent claim 1 recites only a single SiC-MOSFET device. The phrase “each” implies a plurality of MOSFET devices and unclear as to whether claims 8 and 9 introduces additional MOSFET devices or further limit the single MOSFET device of claim 1. Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being depended on claim 8. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim 1 is rejected under 35 U.S.C. 102(a) (1) as being anticipated by Morini et al. (US 2020/0280311 and Morini hereinafter) Regarding claim 1, Morini discloses a driving [301, fig. 3] apparatus for a SiC- MOSFET device [D1/D2, par. 0049], the apparatus comprising: a power source conditioning circuit [35/25]; an independent driving power source module [32/31] connected to the power source conditioning circuit;, and a driver [34/31] connected to the independent driving power source module; wherein the power source conditioning circuit connects a preset DC power source [Vcc] and converts power output from the preset DC power source into supply power needed by the independent driving power source module; the independent driving power source module corresponds, one to one, to a SiC-MOSFET device [D1/D2]; the independent driving power source module provides output to the driver, driving power, needed by the corresponding SiC-MOSFET device; and the driver connects the SiC-MOSFET device, providing the driving power from the independent driving power source module [33/34] into the corresponding SiC-MOSFET device, and controlling turn-on and turn-off of the SiC-MOSFET device [D1/D2]. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Kenney (US 2012/0013323). Regarding claim 1, Kenney discloses a driving [fig. 2] apparatus for a MOSFET device [4/8], the apparatus comprising: a power source conditioning circuit [7/11]; an independent driving power source module [12] connected to the power source conditioning circuit;, and a driver [6/10] connected to the independent driving power source module; wherein the power source conditioning circuit connects a preset DC power source [18, fig. 3] and converts power output from the preset DC power source into supply power needed by the independent driving power source module; the independent driving power source module corresponds, one to one, to a MOSFET device [4/8]; the independent driving power source module provides output to the driver, driving power, needed by the corresponding MOSFET device; and the driver connects the MOSFET device, providing the driving power from the independent driving power source module into the corresponding MOSFET device, and controlling turn-on and turn-off of the SiC-MOSFET device [4/8]. Kenny does not explicitly disclose SiC-MOSFET device. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to replace the transistors 4/8 of Kenney SiC-MOSFET because such a modification would have been merely a replacement with a well-known, art-recognized functionally equivalent transistor device. Regarding claim 2, Kenney discloses [see fig. 3] further comprising: a controlling chip [Vok?, fig. 3], to send a driving signal [output signal Vok?, fig. 3] to a logic conditioning circuit [AND logic gate, fig. 3]; and the logic conditioning circuit- connected to the controlling chip and the driver, to receive the driving signal sent from the controlling chip, and sending the driving signal to the driver so the driver controls turn-on and turn-off of the SiC-MOSFET device [fig. 2]. Regarding claim 3, Kenney discloses [see fig. 3] further comprising a pulse width modulation circuit [PWM CONTROL, fig. 3] connected to the controlling chip, to deliver a pulse signal [output of PWM CONTROL]; wherein, the controlling chip generates the driving signal according to the pulse signal output from the pulse width modulation circuit. Regarding claim 7, Kenney discloses [see fig. 2] wherein the driver comprises a capacitor [C, fig. 2] isolation grid electrode driver. Claims 4-6 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Kenney in view of Krug et al. (US 11362651 and Krug). Regarding claim 8, Kenney discloses all the features with respect to claim 7 as outlined above. Kennedy does not explicitly disclose wherein: the driver comprises a first protection circuit and a driving module; when a source-drain voltage of any SiC-MOSFET device is detected to reach a preset value, the first protection circuit determines that the SiC-MOSFET device is in a desaturation state, and sends a notification signal to the driving module; and when receiving the notification signal, the driving module controls the Sic-MOSFET device to turn off. However, Krug discloses wherein: the driver [20, fig. 2] comprises a first protection circuit [25] and a driving module [202]; when a source-drain voltage of any SiC-MOSFET device [210] is detected to reach a preset value, the first protection circuit determines that the SiC-MOSFET device is in a desaturation state [desaturation mode], and sends a notification signal to the driving module; and when receiving the notification signal, the driving module controls the Sic-MOSFET device to turn off [cl. 9, ln. 1-65]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Kenney by incorporating a first protection circuit as taught in Krug in order to provide protection against power switch malfunction. Regarding claims 4 and 5, Kenney discloses all the features with respect to claim 3 as outlined above. Kenney does not explicitly disclose wherein the driver sends an error signal to the logic conditioning circuit when any SiC-MOSFET device is detected in an abnormal state; and the logic conditioning circuit sends the error signal to the controlling chip, so the controlling chip controls the pulse width modulation circuit to stop delivering the pulse signal and wherein the abnormal state comprises one of: an overcurrent state, a desaturation state, an undervoltage state, or a short circuit state. However, Krug discloses wherein: the driver [20, fig. 2] sends an error signal to logic conditioning circuit [25] when any SiC-MOSFET device [210] is detected in an abnormal state [desaturation state]; and the logic conditioning circuit sends the error signal to the controlling chip, so the controlling chip controls the pulse width modulation circuit to stop delivering the pulse signal and wherein the abnormal state comprises one of: an overcurrent state, a desaturation state, an undervoltage state, or a short circuit state [cl. 8, cl. 32-67 and cl. 9, ln. 1-67]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Kenney by incorporating a first protection circuit as taught in Krug in order to provide protection against power switch malfunction. Regarding claim 6, Kenney in view of Krug discloses wherein: [see fig. 2] the controlling chip and the logic conditioning circuit are connected; the logic conditioning circuit comprises: an isolation input module [input 25], a logic controlling module [204/206], and an isolation output module [output 25]; wherein: the isolation input module converts the driving signal in the form of signal, from the controlling chip, into the driving signal in the form of electrical signal, and send the driving signal in the form of electrical signal to the logic controlling module; the logic controlling module sends the driving signal in the form of electrical signal to the driver; the logic controlling module [25, fig. 2, cl. 9, ln. 1-65 ] receives the error signal in the form of electrical signal sent by the driver, and send the error signal in the form of electrical signal to the isolation output module; and the isolation output module converts the error signal in the form of electrical signal into the error signal in the form of signal, and sending the error signal in the form of signal to the controlling chip. Kenney in view of Krug does not explicitly disclose an optical fiber. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Kenney in view of Krug by incorporating optical fiber for electrical wiring to converts the electrical signal into optical signal by utilizing well known transmission media used to convey signals between electronic devices. Allowable Subject Matter Claims 9-10 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to METASEBIA T RETEBO whose telephone number is (571)272-9299. The examiner can normally be reached M - F 8:30 - 5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch can be reached at 571-270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /METASEBIA T RETEBO/Primary Examiner, Art Unit 2836
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Prosecution Timeline

May 28, 2025
Application Filed
Sep 18, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
95%
With Interview (+5.3%)
1y 10m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 665 resolved cases by this examiner. Grant probability derived from career allowance rate.

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