Prosecution Insights
Last updated: July 17, 2026
Application No. 19/135,102

PIXEL DRIVING CIRCUIT, DRIVING METHOD THEREOF, DISPLAY PANEL AND DISPLAY APPARATUS

Non-Final OA §102
Filed
Jun 03, 2025
Priority
Dec 26, 2022 — CN 202211679463.6 +1 more
Examiner
PERVAN, MICHAEL
Art Unit
2629
Tech Center
2600 — Communications
Assignee
BOE Technology Group Co., Ltd.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
1y 4m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
752 granted / 928 resolved
+19.0% vs TC avg
Moderate +7% lift
Without
With
+7.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
14 currently pending
Career history
940
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
73.1%
+33.1% vs TC avg
§102
14.8%
-25.2% vs TC avg
§112
1.3%
-38.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 928 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3, 8 and 12-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhang (CN 111785211; provided by Applicant; machine translation provided). In regards to claims 1 and 14-15, Zhang discloses a display device (display device 200), comprising a display panel (display panel 100) (Figs. 13-14), wherein the display panel comprises a pixel driving circuit, and the pixel driving circuit comprises: a first driving transistor (driving transistor T), wherein a first electrode (T1) of the first driving transistor is connected to a first power terminal (power signal terminal PVDD), a second electrode (T2) of the first driving transistor is connected to a first electrode of the light-emitting unit (light emitting element 60), and a gate (G) of the first driving transistor is connected to a first node (first node N1) (Figs. 1-6 and pages 6-9); and a current compensation circuit (data writing compensation unit 40), wherein the current compensation circuit is connected in parallel to the first driving transistor between the first power terminal and the first electrode of the light-emitting unit, and is configured to provide, in response to a first control signal, a driving current to the light-emitting unit through the first power terminal (Figs. 1-6 and pages 6-9). In regards to claim 2, Zhang discloses the pixel driving circuit according to claim 1, wherein the current compensation circuit comprises: one or more parallel second driving transistors (compensation driving transistor 411), wherein a first electrode of each second driving transistor is connected to the first electrode of the first driving transistor, a second electrode of each second driving transistor is connected to the second electrode of the first driving transistor, and a gate of each second driving transistor is connected to the first node (Figs. 1-6 and pages 6-9). In regards to claim 3, Zhang discloses the pixel driving circuit according to claim 2, further comprising: a first light-emitting control circuit (light emitting control unit 51), wherein the first light-emitting control circuit is connected to the first power terminal and the first electrode of the first driving transistor, and is configured to connect, in response to a second control signal, the first power terminal and the first electrode of the first driving transistor (Figs. 1-6 and pages 6-9); and wherein the current compensation circuit further comprises: a second light-emitting control circuit (light emitting control unit 52), wherein the second light-emitting control circuit is connected to the first power terminal and the first electrode of the first driving transistor, and is configured to connect, in response to a third control signal, the first power terminal and the first electrode of the first driving transistor (Figs. 1-6 and pages 6-9). In regards to claim 8, Zhang discloses the pixel driving circuit according to claim 1, wherein the current compensation circuit comprises: one or more parallel tenth transistors (compensation switch transistor 421), wherein a first electrode of each tenth transistor is connected to the first power terminal, a second electrode of each tenth transistor is connected to the first electrode of the light-emitting unit, and a gate of each tenth transistor is connected to a second enabling signal terminal (Figs. 1-6 and pages 6-9). In regards to claim 12, Zhang discloses a driving method of a pixel driving circuit according to claim 1, the method comprising: at a first light-emitting stage, using a first driving transistor to drive a light-emitting unit to emit light (Figs. 1-6 and pages 6-9); and at a second light-emitting stage, using a current compensation circuit to drive the light- emitting unit to emit light (Figs. 1-6 and pages 6-9). In regards to claim 13, Zhang discloses a driving method of a pixel driving circuit according to claim 1, the method comprising: at a light-emitting stage, using simultaneously a first driving transistor and a current compensation circuit to drive a light-emitting unit to emit light (Figs. 1-6 and pages 6-9). Allowable Subject Matter Claims 4-7, 9-11 and 16-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kuo et al (US 2021/0056900) discloses a light emitting apparatus and a display device are provided. The light emitting apparatus includes a light emitting unit and a pixel circuit. The pixel circuit is electrically connected to the light emitting unit. The pixel circuit includes a first driving transistor and a second driving transistor. The first driving transistor and the second driving transistor are configured to provide a first driving current and a second driving current to the light emitting unit at the same time, respectively. The first driving transistor includes a first gate terminal. The second driving transistor includes a second gate terminal. The first gate terminal and the second gate terminal are electrically connected to different nodes. The display device includes the light emitting apparatus. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michael Pervan whose telephone number is (571)272-0910. The examiner can normally be reached Mon - Fri between 7:00am - 4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin Lee can be reached at (571) 272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL PERVAN/Primary Examiner, Art Unit 2629 May 29, 2026
Read full office action

Prosecution Timeline

Jun 03, 2025
Application Filed
Jun 03, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
88%
With Interview (+7.1%)
2y 6m (~1y 4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 928 resolved cases by this examiner. Grant probability derived from career allowance rate.

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