DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities: Page 12, line 6 delete “110” and replace it with –115--. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 13-16, 18-21 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Leitner (EP 4054128) (Document Provide on the IDS of 7/11/2025).
With respect to claim 13, Leitner discloses a method for initializing a system including a primary electronic module and at least one secondary electronic module, the at least one secondary electronic module being connected to the primary electronic module by a signal line formed as a daisy chain (paragraphs 0001-0002 discloses a master and N subscribers for initializing the subscribers that are connected in a daisy chain connection), the method comprises the following steps: a) opening the signal line in the at least one secondary electronic module; b) providing an initialization signal on the signal line through the primary electronic module (paragraph 0006 discloses providing the initialization signal to the subscribers); c) initializing one secondary electronic module receiving the initialization signal and not yet being initialized (the initialization signal is provided to the subscriber); d) closing the signal line through a last initialized secondary electronic module; and e) repeating steps b) to d) until all secondary electronic modules are initialized (paragraph 0006 discloses sending the initialization signal to the first subscriber and after initialization of the first subscriber to the (i-1) subscriber).
With respect to claim 14, Leitner discloses the method according to claim 13, which further comprises including a communication with the primary electronic module in the initialization of the secondary electronic module. Paragraph 0001 discloses communication between the master and the subscribers.
With respect to claim 15, Leitner discloses the method according to claim 14, which further comprises updating a software component of the secondary electronic module from the primary electronic module. Paragraphs 0007, 0023 discloses updating/calibrating the subscribers based on the data receive.
With respect to claim 16, Leitner discloses the method according to claim 14, which further comprises connecting the at least one secondary electronic module to the primary electronic module by a data bus, and carrying out communication over the data bus. Paragraphs 0001-0003 discloses a communication bus for communicating between the master and the subscribers.
With respect to claim 18, Leitner discloses the method according to claim 14, which further comprises using the communication to transmit a configuration from the secondary electronic module to the primary electronic module, causing the primary electronic module to determine a topology of the at least one secondary electronic module in the system, based on received configurations. Paragraph 0006 discloses that the subscribers send a configuration signal to master.
With respect to claim 19, Leitner discloses the method according to claim 14, which further comprises once all electronic modules are initialized, using one of the electronic modules to connect the signal line to a predetermined potential in order to provide an interrupt request. Paragraph 0014 discloses that the subscribers include a resistor to determine the last subscriber and thus interrupt the initialization request.
With respect to claim 20, Leitner discloses an electronic module, comprising: an output for connection to a signal line formed as a daisy chain (paragraphs 0001-0002 discloses a master and N subscribers for initializing the subscribers that are connected in a daisy chain connection); and a processing facility configured to provide an initialization signal over the signal line to at least one further electronic module (paragraph 0006 discloses a master providing the initialization signal to the subscribers).
With respect to claim 21, Leitner discloses an electronic module, comprising: an input and an output for a signal line formed as a daisy chain (paragraphs 0001-0002 discloses a master and N subscribers for initializing the subscribers that are connected in a daisy chain connection); a switch connected between the input and the output (paragraph 0019 discloses a switch for allowing or not allowing the subscriber to communicate); and a processing facility configured, upon the switch being open, to detect an initialization signal at the input, to initialize the electronic module, and to close the switch (paragraphs 0006, 0019 discloses sending the initialization signal to the first subscriber and closing the switch to allow communication to take place).
Claim(s) 13, 20, 21, 23-24 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by KIM (US 2020/0169466).
With respect to claim 13, KIM discloses a method for initializing a system including a primary electronic module and at least one secondary electronic module, the at least one secondary electronic module being connected to the primary electronic module by a signal line formed as a daisy chain (abstract discloses a master module connected to a slave module via communication line in series), the method comprises the following steps: a) opening the signal line in the at least one secondary electronic module; b) providing an initialization signal on the signal line through the primary electronic module (figures 1 and 2-3 discloses slave modules with respective switch for opening/closing the switches 120 to provide initialization to the slave modules, paragraphs 0016, 0063-0069); c) initializing one secondary electronic module receiving the initialization signal and not yet being initialized (paragraphs 0061-0064 discloses initialization the secondary modules); d) closing the signal line through a last initialized secondary electronic module; and e) repeating steps b) to d) until all secondary electronic modules are initialized (figure 3, paragraph 077 discloses repeating the initialization scheme until all the slave modules are initialized).
With respect to claim 20, KIM discloses an electronic module, comprising: an output for connection to a signal line formed as a daisy chain (abstract discloses a master module connected to a slave module via communication line in series); and a processing facility configured to provide an initialization signal over the signal line to at least one further electronic module (figures 1 and 2-3 discloses slave modules with respective switch for opening/closing the switches 120 to provide initialization to the slave modules, paragraphs 0016, 0063-0069).
With respect to claim 21, KIM discloses an electronic module, comprising: an input and an output for a signal line formed as a daisy chain (abstract discloses a master module connected to a slave module via communication line in series); a switch connected between the input and the output (switches 120, figure 2); and a processing facility configured, upon the switch being open, to detect an initialization signal at the input, to initialize the electronic module, and to close the switch (figures 1 and 2-3 discloses slave modules with respective switch for opening/closing the switches 120 to provide initialization to the slave modules, paragraphs 0016, 0063-0069).
With respect to claim 23, KIM discloses a system, comprising: a signal line formed as a daisy chain (paragraphs 0010, 0081-0082 discloses communicating through a single communication line); a primary electronic module including an output for connection to the signal line, and a processing facility configured to provide an initialization signal over the signal line to at least one further electronic module (figure 1 discloses master module with a processor for providing an initialization signal, paragraph 0016); and at least one secondary electronic module including an input and an output for the signal line, a switch connected between the input and the output, and a processing facility configured, upon the switch being open, to detect an initialization signal at the input, to initialize the electronic module, and to close the switch (figures 1 and 2-3 discloses slave modules with respective switch for opening/closing the switches 120, paragraphs 0063-0069); the signal line connecting the at least one secondary module to the primary module (figure 1 discloses that the signal line connects the master module to the slave modules).
With respect to claim 24, KIM discloses an electrical appliance, comprising the system according to claim 23. Paragraphs 0003-0007 discloses that the system is provided in an electric vehicle.
Allowable Subject Matter
Claims 17, 22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 17 is allowable over the prior art of record, because the prior art of record does not disclose terminating the initialization when, during a predetermined time period after providing the initialization signal, no communication occurs between the primary electronic module and the secondary electronic module which is not yet initialized.
Claim 22 is allowable over the prior art of record, because the prior art of record does not disclose which further comprises a further switch for connecting the signal line to a predetermined potential in order to provide an interrupt request.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lotzenburger et al. (US 2011/0202698) discloses a master and slave circuit interconnected via a serial line.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CARLOS AMAYA whose telephone number is (571)272-8941. The examiner can normally be reached M-F 7:00AM-4:00PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached at (571) 270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CARLOS AMAYA/Primary Examiner, Art Unit 2836
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