Prosecution Insights
Last updated: August 17, 2026
Application No. 19/152,084

Relay Control Apparatus and Method

Non-Final OA §102
Filed
Jul 30, 2025
Priority
Jun 16, 2023 — RE 10-2023-0077690 +1 more
Examiner
WILLOUGHBY, TERRENCE RONIQUE
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Energy Solution Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
1y 7m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
428 granted / 533 resolved
+12.3% vs TC avg
Moderate +12% lift
Without
With
+12.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
8 currently pending
Career history
542
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
46.5%
+6.5% vs TC avg
§102
26.0%
-14.0% vs TC avg
§112
22.4%
-17.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 533 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 7/30/25 and 6/2/26 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 3,5, 6, 7, 8, 9, 10, 11, 12, 14, 15, 16, 17, 18 and 20 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Cho (US 2023/0146895). Regarding claims 1 and 10, Cho in [Figs. 1 and 2], discloses a relay control apparatus [see 100], comprising: a processor [see 110] configured to output a basic control signal [see CS1 and/or CS2] for controlling an operation of a relay [see either the first and/or second relay 200, 300] and a first decision-control signal [see RCS1] having a first differential signal level according to an operation state thereof [see 0072-0075]; a monitoring unit [see 120] configured to monitor the operation state of the processor [see 110] and output a second decision-control signal having a second differential signal level according to the operation state of the processor [see 110] and a retain signal [see RS] for maintaining an operation state of the relay [see 0043,0058-0059,0063-0064]; and relay state determining unit [see 130] configured to output one of the basic control signal [see RCS1 and/or RCS2] and the retain signal [see RS] as a relay control signal for controlling on/off of the relay based on the signal levels of the first and second decision-control signals [see 0063-0068]. Regarding claims 2, 11 and 17, Cho discloses in [Figs. 1 and 2] the relay control apparatus relay control apparatus [see 100] according to claims 1, 8 and 9, wherein the relay state determining unit [see 130] is configured to output one of the basic control signal [see CS1 and/or CS2] and the retain signal [see Rs] as the relay control signal based on a signal level of a result signal of computing the first and second decision-control signals [see CS1-CS3 and 0051-0066]. Regarding claims 3, 12 and 18, Cho in [Figs. 1 and 3] discloses the relay control apparatus according to claims 1, 8 and 9, wherein when the operation state of the processor [see 110] is a reset state [such that the signa level of control signal CS3 is set to be maintained as a low level, see 0063], and the processor [see 110] is configured to output a first switching control signal [see CS1], which is a first decision-control signal [see RCS1] having a different signal level from the first decision-control signal output when the processor [see 110] is in a normal state, to the relay state determining unit [see 130], and wherein when the operation state of the processor is the reset state [such that the signa level of control signal CS3 is set to be maintained as a low level, see 0063], the monitoring unit is configured to output a second switching control signal, which is a second decision-control signal [see RCS2] having a different signal level from the second decision-control signal output when the processor [see 110] is in the normal state, to the relay state determining unit [see 130 and 0058-0066]. Regarding claims 5, 14 and 20, Cho in [Figs. 1 and 2] discloses the relay control apparatus according to claims 3, 12 and 18, wherein the relay state determining unit [see 130] is configured to output the basic control signal [see RCS1 and/or RCS2] as the relay control signal when either of the first and second switching control signals [CS1 and CS2] is not received, and to output the retain signal [see RS] as the relay control signal when both the first and second switching control signals are received [see 0051-0066]. Regarding claims 6 and 15, Cho in [Figs. 1 and 2] discloses the relay control apparatus according to claims 1 and 8, wherein when the operation state of the processor [see 110] is a reset state [such that the signa level of control signal CS3 is set to be maintained as a low level, see 0063], the monitoring unit [see 120] is configured to output the retain signal [see RS] having a signal level corresponding to the basic control signal output by the processor in a normal state immediately before the reset state [see 0058-0066]. Regarding claims 7 and 16, Cho in [Figs. 1 and 2] discloses the relay control apparatus according to claims 1 and 8, wherein when a reset state of the processor [see 110] continues for a reference time [such that the signa level of control signal CS3 is set to be maintained as a low level, see 0063], the monitoring unit [see 120] is configured to output the retain signal [see RS] at a second signal level, and to output the retain signal at a first signal level after the reference time. Regarding claim 8, Cho in [Figs. 1 and 2] discloses a battery pack [see 0005, 0023 and 0139-0140], comprising the relay control apparatus [see 100] according to claim 1. Regarding claim 9, Cho in [Figs. 1 and 2] discloses a vehicle [see 0141], comprising the relay control apparatus [see 100] according to claim 1. Allowable Subject Matter Claim 4 is objected to as being dependent upon a rejected base claim 3, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 13 is objected to as being dependent upon a rejected base claim 12, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 19 is objected to as being dependent upon a rejected base claim 18, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERRENCE RONIQUE WILLOUGHBY whose telephone number is (571)272-2725. The examiner can normally be reached M-F 9:30-5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rexford Barnie can be reached at 571-272-7492. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TERRENCE R WILLOUGHBY/Examiner, Art Unit 2836 7/25/26 /REXFORD N BARNIE/Supervisory Patent Examiner, Art Unit 2836
Read full office action

Prosecution Timeline

Jul 30, 2025
Application Filed
Jul 30, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
93%
With Interview (+12.4%)
2y 8m (~1y 7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 533 resolved cases by this examiner. Grant probability derived from career allowance rate.

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