DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to Application filed on 08/07/2025
Application is a 371 of PCT/JP2024/006443 02/22/2024
Application claims a FP date of 03/03/2023
Claims 1, 16 and 18 are independent
Claims 1-18 are pending
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in the instant Application.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 08/07/2025 is in compliance with the provisions of 37 CFR 1.97 and 37 CFR 1.98(a)(4). Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed to.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-5 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over by Kaizu (U.S. Patent Publication Number 2021/0227116 A1) in view of Tsuboi et al. (Application JP 2022142845 A which has a filing date of Sep 08, 2022, and therefore prior art. U. S. Patent Publication Number 2025/0203238 A1 has been used for citing purposes).
Regarding Claim 1, Kaizu discloses a photodetection device (Fig 1 – pixel array 103) comprising:
a pixel array section including a plurality of pixels arranged in a first direction and a second direction and divided into a plurality of pixel groups including some pixels different from each other on a basis of a plurality of pixel control signals (In ¶0072, Kaizu discloses that the pixel array 103 includes a plurality of pixels arranged in two dimensions. In ¶0073, he further discloses that the vertical drive unit 102 provided to provide each pixel in the pixel array 103 with signals to control exposure timing to accumulate photoelectrically converted light and timing to read out the accumulated charge.);
a control signal generation circuit that is arranged in a layer different from the pixel array section and generates the plurality of pixel control signals (In ¶0075 and throughout, Kaizu discloses that the signal processing unit 105 generates data necessary for controlling the pixels and feeds it back to the controller 101);
a thinned image generation section that generates a plurality of thinned images by exposing the plurality of pixel groups within a predetermined frame period while shifting at least one of exposure start times or exposure end times from each other (Kaizu discloses method and process to control exposure time by adjusting the exposure density and exposure period and another unit that adjusts a start time of exposure frame and generating images. This is parallel to limitation claimed here. Fig 2 of Kaizu discloses global shutter that performs exposure of the respective rows and Fig 3 shows timing examples of exposure and readout performed in sequence. In ¶0083, Kaizu discloses how the exposure timing can be controlled by the controller 101. Fig 7 discloses two timing adjustment mechanisms by adjusting the start time and the length of exposure. See ¶0085-¶0097.); and
an image composition section that generates a composite image obtained by combining the plurality of thinned images (In ¶0017 Kaizu discloses a blend processing unit that determines a blend ration between the first image and second image captured under an exposure condition and blends the images. In ¶0063, Kaizu also discloses a method of combining a plurality of images captured in different exposure times and a method of capturing a single image in different exposure times at different pixels and combining them).
Kaizu discloses a control circuit and a pixel array, however, Kaizu fails to clearly disclose a control signal generation circuit that is arranged in a layer different from the pixel array section.
Instead in a similar endeavor, Tsuboi discloses a control signal generation circuit that is arranged in a layer different from the pixel array section (Figs 2-4 are a diagram illustrating the sensor substrate and the circuit substrate. In ¶0038, Tsuboi teaches that the photoelectric conversion device 100 includes a sensor substrate 11 – first substrate – and a circuit substrate – second substrate – stacked on each other which are electrically connected to each other).
Kaizu and Tsuboi are combinable because both are related to photoelectric conversion devices.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use different layers as taught by Tsuboi in the imaging module disclosed by Kaizu.
The suggestion/motivation for doing so would have been to “manufacture the sensor substrate and the circuit substrate as diced chips or wafers” as disclosed by Tsuboi in ¶0040.
Therefore, it would have been obvious to combine Kaizu and Tsuboi to obtain the invention as specified in claim 1.
Regarding Claim 3, Kaizu in view of Tsuboi discloses wherein the image composition section generates the plurality of thinned images at a frame rate identical to a frame rate in a case where image data based on all of the plurality of pixels is generated (Kaizu: Kaizu discloses this in Fig 26 and in ¶0122 -¶0135. It is well known that frame rate depends on the length of exposure time. Kaizu discloses use of gain and blend ratio before generating the blended image to achieve this.).
Regarding Claim 4, Kaizu in view of Tsuboi discloses wherein each of the plurality of pixel groups includes two or more pixels that are not adjacent to each other in the first direction and the second direction (Tsuboi: Fig 10, 10B discloses this)
Regarding Claim 5, Kaizu in view of Tsuboi discloses herein each of the plurality of pixels includes:
a photoelectric conversion element that accumulates a charge according to an amount of incident light (Kaizu: Fig 4- Element 401, PD);
a charge holding portion that holds the charge accumulated in the photoelectric conversion element (Kaizu: Fig 4- Element 405, FD);
a charge-voltage conversion portion that converts the charge held in the charge holding portion into a voltage signal (Kaizu: Since element 405, FD is a floating diffusion and is used to hold charge it is interpreted as charge-to-voltage conversion means for generating corresponding amount of voltage); and
a transfer transistor that transfers the charge held in the charge holding portion to the charge-voltage conversion portion (Kaizu: Fig 4- Element 402, TRX), and
the charge holding portion holds the charge photoelectrically converted in each of the plurality of pixel groups at an aligned timing for each pixel group (Kaizu: Since element 405, FD is a floating diffusion – it can also be interpreted as the charge holding portion aligned to the pixel)
Regarding Claim 18, this claim is an “electronic apparatus” claim that has limitations parallel to Claim 1. Claim 18 is therefore rejected on the same grounds as Claim 1.
Claims 2 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over by Kaizu (U.S. Patent Publication Number 2021/0227116 A1) in view of Tsuboi et al. (Application JP 2022142845 A which has a filing date of Sep 08, 2022, and therefore prior art. U. S. Patent Publication Number 2025/0203238 A1 has been used for citing purposes) and further in view of Hara (U.S Patent Publication Number 2015/0237247 A1).
Regarding Claim 2, Kaizu in view of Tsuboi discloses a first substrate on which the pixel array section is arranged (Tsuboi: Fig 2 – sensor substrate 11 – first substrate includes photoelectric conversion device);
a second substrate on which at least a part of a pixel circuit that generates a pixel signal according to charges photoelectrically converted by the plurality of pixels and the control signal generation circuit are arranged and that is stacked on the first substrate (Tsuboi: Fig 2 and in ¶0038, Tsuboi teaches that the second substrate includes the circuit substrate – which is electrically connected to substrate 1. Fig 2 discloses the stacked structure).
Kaizu in view of Tsuboi fails to clearly disclose a third substrate on which the thinned image generation section and the image composition section are arranged and that is stacked on the first substrate and the second substrate.
Instead in a similar endeavor, Hara discloses a third substrate on which the thinned image generation section and the image composition section are arranged and that is stacked on the first substrate and the second substrate (Hara in Fig 1 and 2 teaches a layered structure in which pixel array section and the peripheral circuit section are formed on layers different from each other and in addition, multiple layer structure of three or more layers are formed on layers different from each other in which the ADC 113 and frame memory are formed on different layers. In ¶0049 he also teaches that the ADCs may include signal processing section 201 and the composition procession section 210 which in Fig 13 and in ¶0104, Hara teaches that the composition processing section 201 generates a first image at a desired first exposure and a second image at a second exposure and obtain a composite image having an expanded dynamic range by composing the first and second image).
Kaizu, Tsuboi and Hara are combinable because they are all related to photoelectric conversion devices.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a third layer as taught by Hara in the imaging module disclosed by Kaizu in view of Tsuboi.
The suggestion/motivation for doing so would have been to “manufacture the sensor substrate and the circuit substrate as diced chips or wafers” as this is a well-known advantage of layered architecture.
Therefore, it would have been obvious to combine Kaizu, Tsuboi and Hara to obtain the invention as specified in claim 2.
Regarding Claim 8, Kaizu in view of Tsuboi fails to clearly disclose further comprising a motion vector detection section that detects a motion vector on a basis of the composite image.
Instead in a similar endeavor, Hara discloses further comprising a motion vector detection section that detects a motion vector on a basis of the composite image (Hara ¶0111 teaches that the captured image data can be used to calculate a motion vector between the frames and matching a position and an effect with the position).
Kaizu, Tsuboi and Hara are combinable because they are all related to photoelectric conversion devices.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the composite image to calculate the motion vector as taught by Hara in the imaging module disclosed by Kaizu in view of Tsuboi.
The suggestion/motivation for doing so would have been to determine the position of an object.
Therefore, it would have been obvious to combine Kaizu, Tsuboi and Hara to obtain the invention as specified in claim 8.
Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over by Kaizu (U.S. Patent Publication Number 2021/0227116 A1) in view of Tsuboi et al. (Application JP 2022142845 A which has a filing date of Sep 08, 2022, and therefore prior art. U. S. Patent Publication Number 2025/0203238 A1 has been used for citing purposes) and further in view of Nishio et al. (U.S. Patent Publication Number 2023/0232112 A1).
Regarding Claim 1, Kaizu discloses a photodetection device (Fig 1 – pixel array 103) comprising:
a pixel array section including a plurality of pixels arranged in a first direction and a second direction and divided into a plurality of macro pixels each including two or more of the pixels adjacent to each other in at least one of the first direction or the second direction on a basis of a plurality of pixel control signals (In ¶0072, Kaizu discloses that the pixel array 103 includes a plurality of pixels arranged in two dimensions. In ¶0073, he further discloses that the vertical drive unit 102 provided to provide each pixel in the pixel array 103 with signals to control exposure timing to accumulate photoelectrically converted light and timing to read out the accumulated charge.);
a control signal generation circuit that is arranged in a layer different from the pixel array section and generates the plurality of pixel control signals (In ¶0075 and throughout, Kaizu discloses that the signal processing unit 105 generates data necessary for controlling the pixels and feeds it back to the controller 101);
an image generation section that generates a phase difference detection image on a basis of pixel signals generated by the plurality of macropixels in a state where charge reading from some pixels is stopped, the some pixels being included in each of the plurality o fmacropixels and arranged in the first direction or the second direction (Kaizu discloses method and process to control exposure time by adjusting the exposure density and exposure period and another unit that adjusts a start time of exposure frame and generating images. This is parallel to limitation claimed here. Fig 2 of Kaizu discloses global shutter that performs exposure of the respective rows and Fig 3 shows timing examples of exposure and readout performed in sequence. In ¶0083, Kaizu discloses how the exposure timing can be controlled by the controller 101. Fig 7 discloses two timing adjustment mechanisms by adjusting the start time and the length of exposure. See ¶0085-¶0097.);
Kaizu discloses a control circuit and a pixel array, however, Kaizu fails to clearly disclose a control signal generation circuit that is arranged in a layer different from the pixel array section.
Instead in a similar endeavor, Tsuboi discloses a control signal generation circuit that is arranged in a layer different from the pixel array section (Figs 2-4 are a diagram illustrating the sensor substrate and the circuit substrate. In ¶0038, Tsuboi teaches that the photoelectric conversion device 100 includes a sensor substrate 11 – first substrate – and a circuit substrate – second substrate – stacked on each other which are electrically connected to each other).
Kaizu and Tsuboi are combinable because both are related to photoelectric conversion devices.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the electronic shield as taught by Tsuboi in the imaging module disclosed by Kaizu.
The suggestion/motivation for doing so would have been to “manufacture the sensor substrate and the circuit substrate as diced chips or wafers” as disclosed by Tsuboi in ¶0040.
Kaizu in view of Tsuboi discloses fails to clearly disclose generation of a phase difference detection image.
Instead in a similar endeavor, Nishio discloses a phase difference detection image on a basis of pixel signals generated by the plurality of macropixels in a state where charge reading from some pixels is stopped (Nishio teaches throughout his disclosure that the pixel group includes phase detection pixels that has a short-time exposure or a long-time exposure; See Fig 7; Further in ¶0127, Nishio teaches that the phase difference pixel signals may be used for HDR synthesis in addition to the imaging pixel signals; In ¶0143 and in figs 10-11 and 17 Nishio teaches that in the first embodiment the control unit performs readout alternately from pixel group PG1 and PG2 and in ¶0144 he teaches that the readout is performed “successively”. It could be reasonably interpreted that when reading is performed in the first pixel group, reading in the second pixel group is “stopped”).
Kaizu, Tsuboi and Nishio are combinable because all are related to photoelectric conversion devices.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the electronic shield as taught by Tsuboi and use phase difference pixels as taught by Nishio in the imaging module disclosed by Kaizu.
The suggestion/motivation for doing so would have been to “execute phase processing of reducing a phase shift between the signal which is read out from the first and second pixel group” as disclosed by Nishio in ¶0014.
Therefore, it would have been obvious to combine Kaizu, Tsuboi and Nishio to obtain the invention as specified in claim 16.
Regarding Claim 17, Kaizu in view of Tsuboi and Nishio discloses wherein in two of the macropixels adjacent to each other in the first direction or the second direction, pixels for which charge reading is stopped are arranged symmetrically with each other (Nishio: Nishio teaches this in Fig 8 where the pixels ZL and ZR are symmetrically arranged).
Allowable Subject Matter
Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 6-7, 9-15 are objected as they depend on objected claim 5.
Reference Cited
The following prior art made of record but not relied upon is considered pertinent to applicant's disclosure.
Nagata (WO 2020/170565 A1 – Publication date of Aug 27, 2020; U.S. Patent Publication Number 2022/0132014 A1) discloses an imaging device according to one embodiment of the present invention comprises: a plurality of pixels that each include a photoelectric conversion element, and are arranged in a matrix on a light-receiving surface; a plurality of light-receiving lenses that are provided to the plurality of pixels, one per pixel; and a control unit that controls the exposure periods of the plurality of pixels. The control unit controls the exposure periods of the plurality of pixels such that the exposure periods of at least two pixels among the plurality of pixels corresponding to each of the lenses are the same, and the exposure periods of at least two pixels among the plurality of pixels corresponding to each of the lenses are different from one another.
Jo (U.S. Patent Publication Number 2013/0051700 A1) discloses an image processing apparatus including: an exposure compensation unit carrying out exposure compensation of a long exposure image and a short exposure image in keeping with an exposure ratio; a blur information measuring unit using the exposure-compensated images to calculate blur information showing a degree of discrepancy between pixel values at a corresponding pixel position in the long exposure image and the short exposure image; a blending coefficient calculating unit using the blur information to decide a blending coefficient to be used in a blending process on pixel values at the corresponding pixel position in the long exposure image and the short exposure image; and a blending unit carrying out the blending process on the pixel values at the corresponding pixel position in the long exposure image and the short exposure image using the calculated blending coefficient to decide the pixel value of an output image.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PADMA HALIYUR whose telephone number is (571)272-3287. The examiner can normally be reached Monday-Friday 7AM - 4PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Twyler Haskins can be reached at 571-272-7406. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PADMA HALIYUR/Primary Examiner, Art Unit 2639 September 2, 2026
Prosecution Insights