DETAILED ACTION
This action is in response to claims filed for Application 19/162981 on September 8, 2025, in which Claims 1-9 and 13-23 are presented for examination.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-9 and 13-23 are pending, of which Claims 1-5, 7-9, 13-18 and 21-23 are rejected under 112b. Claims 6, 19 and 20 are objected to. Claims 1-9 and 13-23 do not include a prior art rejection.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-5, 7-9, 13-18 and 20-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the I/O control module" in Lines 7-8. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation "the I/O unit" in Line 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation "the data" in Line 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 2 recites the limitation "the I/O control module" in Line 7. There is insufficient antecedent basis for this limitation in the claim.
Claim 3 recites the limitation "the CPUs" in Lines 5 and 7. There is insufficient antecedent basis for this limitation in the claim.
Claim 3 recites the limitation "the I/O units" in Lines 5 and 8. There is insufficient antecedent basis for this limitation in the claim.
Claim 4 recites the limitation "the I/O units" in Lines 2 and 3. There is insufficient antecedent basis for this limitation in the claim.
Claim 4 recites the limitation "the first ports" in Lines 3-4. There is insufficient antecedent basis for this limitation in the claim.
Claim 4 recites the limitation "the first DUTs" in Lines 4-5. There is insufficient antecedent basis for this limitation in the claim.
Claim 4 recites the limitation "the first ports" in Line 7. There is insufficient antecedent basis for this limitation in the claim.
Claim 4 recites the limitation "the second ports" in Line 7. There is insufficient antecedent basis for this limitation in the claim.
Claim 5 recites the limitation "the CPUs" in Lines 4, 9 and 13-14. There is insufficient antecedent basis for this limitation in the claim.
Claim 5 recites the limitation "the plurality of I/O units" in Lines 5 and 10. There is insufficient antecedent basis for this limitation in the claim.
Claim 5 recites the limitation "the I/O units" in Line 14. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the distributed memory units" in Line 4. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the I/O unit" in Line 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the industrial-personal-computer" in Line 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the operation result" in Line 10. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "the target memories" in Line 11. There is insufficient antecedent basis for this limitation in the claim.
Claim 8 recites the limitation "the next-level distributed memory unit" in Lines 5-6. There is insufficient antecedent basis for this limitation in the claim.
Claim 8 recites the limitation "the first distributed memory unit" in Lines 7 and 16. There is insufficient antecedent basis for this limitation in the claim.
Claim 8 recites the limitation "the last distributed memory unit" in Lines 8, 16 and 19. There is insufficient antecedent basis for this limitation in the claim.
Claim 8 recites the limitation "the previous-level distributed memory unit" in Line 14. There is insufficient antecedent basis for this limitation in the claim.
Claim 8 recites the limitation "the target memories" in Lines 20 and 22. There is insufficient antecedent basis for this limitation in the claim.
Claim 8 recites the limitation "the distributed memory units " in Line 22. There is insufficient antecedent basis for this limitation in the claim.
Claim 9 recites the limitation "the target device" in Line 6, 7 and 12. There is insufficient antecedent basis for this limitation in the claim.
Claim 9 recites the limitation "the test process" in Line 14. There is insufficient antecedent basis for this limitation in the claim.
Claim 9 recites the limitation "the data" in Line 14. There is insufficient antecedent basis for this limitation in the claim.
Claim 13 recites the limitation "the range" in Line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 13 recites the limitation "the I/O unit" in Line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 14 recites the limitation "the released CPUs " in Lines 3-4. There is insufficient antecedent basis for this limitation in the claim.
Claim 15 recites the limitation "the operation instructions" in Line 7. There is insufficient antecedent basis for this limitation in the claim.
Claim 15 recites the limitation "the received operation instructions " in Lines 8-9. There is insufficient antecedent basis for this limitation in the claim.
Claim 16 recites the limitation "the I/O unit" in Lines 6 and 7. There is insufficient antecedent basis for this limitation in the claim.
Claim 17 recites the limitation "the range" in Line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 17 recites the limitation "the I/O unit" in Line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 18 recites the limitation "the first testing task" in Lines 2 and 10. There is insufficient antecedent basis for this limitation in the claim.
Claim 18 recites the limitation "the I/O units" in Lines 4 and 7. There is insufficient antecedent basis for this limitation in the claim.
Claim 18 recites the limitation "the processing module" in Lines 4-5, 6 and 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 18 recites the limitation "the cluster control module" in Line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 18 recites the limitation "the I/O unit" in Lines 7 and 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 18 recites the limitation "the released processing module" in Lines 10-11. There is insufficient antecedent basis for this limitation in the claim.
Claim 21 recites the limitation "the distributed memory units" in Lines 4 and 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 21 recites the limitation "the corresponding distributed memory units" in Lines 5-6. There is insufficient antecedent basis for this limitation in the claim.
Claim 21 recites the limitation "the corresponding distributed memory unit" in Lines 7-8. There is insufficient antecedent basis for this limitation in the claim.
Claim 21 recites the limitation "the I/O unit" in Line 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 21 recites the limitation "the industrial-personal-computer" in Line 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 21 recites the limitation "the operating result" in Line 10. There is insufficient antecedent basis for this limitation in the claim.
Claim 21 recites the limitation "the target memories" in Line 11. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the processing module" in Line 5. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the currently idle processing modules" in Line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the I/O unit" in Line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the currently idle I/O units" in Lines 6-7. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the range" in Line 7. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the industrial-personal-computers" in Line 7. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the current first testing task" in Line 8. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the industrial computers" in Lines 10-11. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the industrial computer pool" in Line 11. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the I/O pool" in Line 11. There is insufficient antecedent basis for this limitation in the claim.
Claim 22 recites the limitation "the I/O control module" in Lines 12 and 14. There is insufficient antecedent basis for this limitation in the claim.
Claim 23 recites the limitation "the plurality of industrial-personal-computers" in Lines 5-6. There is insufficient antecedent basis for this limitation in the claim.
Claim 23 recites the limitation "the plurality of I/O units" in Lines 5-6. There is insufficient antecedent basis for this limitation in the claim.
Prior Art Made of Record
Jardini et al. (US Patent Application No. 2023/0168985) teaches different test mechanisms, such as Model in the Loop (MIL), Software in the Loop (SIL), Processor in the Loop (PIL), and Hardware in the Loop (HIL). HIL testing enables the testing of embedded systems and their integration as implemented in the SUT.
Grohmann et al. (US Patent No. 6,918,061) teaches the controller is simulated in a simulated technical environment (software-in-the-loop SIL) in the early development phases. As soon as the control components are actually available, the test of the complete component is continued on a hardware-in-the-loop (HIL) test system. Those components which belong to the complete control system are also tested linked together using such HIL test systems. In the final step, the controllers are integrated and tested once again jointly with the other components that make up the overall system.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARAI E BUTLER whose telephone number is (571)270-3823. The examiner can normally be reached 8 am to 4 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ashish Thomas can be reached at 571-272-0631. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SARAI E BUTLER/Primary Examiner, Art Unit 2114