Prosecution Insights
Last updated: October 04, 2026
Application No. 19/162,981

Testing System

Non-Final OA §112
Filed
Sep 08, 2025
Priority
Mar 06, 2023 — CN 202310214698.6 +1 more
Examiner
BUTLER, SARAI E
Art Unit
2114
Tech Center
2100 — Computer Architecture & Software
Assignee
Kunyi Electronics Technology (Shanghai) Co. Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
1y 3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
1019 granted / 1156 resolved
+33.1% vs TC avg
Moderate +11% lift
Without
With
+10.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
19 currently pending
Career history
1177
Total Applications
across all art units

Statute-Specific Performance

§101
4.3%
-35.7% vs TC avg
§103
54.5%
+14.5% vs TC avg
§102
20.2%
-19.8% vs TC avg
§112
9.7%
-30.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1156 resolved cases

Office Action

§112
DETAILED ACTION This action is in response to claims filed for Application 19/162981 on September 8, 2025, in which Claims 1-9 and 13-23 are presented for examination. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 1-9 and 13-23 are pending, of which Claims 1-5, 7-9, 13-18 and 21-23 are rejected under 112b. Claims 6, 19 and 20 are objected to. Claims 1-9 and 13-23 do not include a prior art rejection. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-5, 7-9, 13-18 and 20-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "the I/O control module" in Lines 7-8. There is insufficient antecedent basis for this limitation in the claim. Claim 1 recites the limitation "the I/O unit" in Line 9. There is insufficient antecedent basis for this limitation in the claim. Claim 1 recites the limitation "the data" in Line 9. There is insufficient antecedent basis for this limitation in the claim. Claim 2 recites the limitation "the I/O control module" in Line 7. There is insufficient antecedent basis for this limitation in the claim. Claim 3 recites the limitation "the CPUs" in Lines 5 and 7. There is insufficient antecedent basis for this limitation in the claim. Claim 3 recites the limitation "the I/O units" in Lines 5 and 8. There is insufficient antecedent basis for this limitation in the claim. Claim 4 recites the limitation "the I/O units" in Lines 2 and 3. There is insufficient antecedent basis for this limitation in the claim. Claim 4 recites the limitation "the first ports" in Lines 3-4. There is insufficient antecedent basis for this limitation in the claim. Claim 4 recites the limitation "the first DUTs" in Lines 4-5. There is insufficient antecedent basis for this limitation in the claim. Claim 4 recites the limitation "the first ports" in Line 7. There is insufficient antecedent basis for this limitation in the claim. Claim 4 recites the limitation "the second ports" in Line 7. There is insufficient antecedent basis for this limitation in the claim. Claim 5 recites the limitation "the CPUs" in Lines 4, 9 and 13-14. There is insufficient antecedent basis for this limitation in the claim. Claim 5 recites the limitation "the plurality of I/O units" in Lines 5 and 10. There is insufficient antecedent basis for this limitation in the claim. Claim 5 recites the limitation "the I/O units" in Line 14. There is insufficient antecedent basis for this limitation in the claim. Claim 7 recites the limitation "the distributed memory units" in Line 4. There is insufficient antecedent basis for this limitation in the claim. Claim 7 recites the limitation "the I/O unit" in Line 9. There is insufficient antecedent basis for this limitation in the claim. Claim 7 recites the limitation "the industrial-personal-computer" in Line 9. There is insufficient antecedent basis for this limitation in the claim. Claim 7 recites the limitation "the operation result" in Line 10. There is insufficient antecedent basis for this limitation in the claim. Claim 7 recites the limitation "the target memories" in Line 11. There is insufficient antecedent basis for this limitation in the claim. Claim 8 recites the limitation "the next-level distributed memory unit" in Lines 5-6. There is insufficient antecedent basis for this limitation in the claim. Claim 8 recites the limitation "the first distributed memory unit" in Lines 7 and 16. There is insufficient antecedent basis for this limitation in the claim. Claim 8 recites the limitation "the last distributed memory unit" in Lines 8, 16 and 19. There is insufficient antecedent basis for this limitation in the claim. Claim 8 recites the limitation "the previous-level distributed memory unit" in Line 14. There is insufficient antecedent basis for this limitation in the claim. Claim 8 recites the limitation "the target memories" in Lines 20 and 22. There is insufficient antecedent basis for this limitation in the claim. Claim 8 recites the limitation "the distributed memory units " in Line 22. There is insufficient antecedent basis for this limitation in the claim. Claim 9 recites the limitation "the target device" in Line 6, 7 and 12. There is insufficient antecedent basis for this limitation in the claim. Claim 9 recites the limitation "the test process" in Line 14. There is insufficient antecedent basis for this limitation in the claim. Claim 9 recites the limitation "the data" in Line 14. There is insufficient antecedent basis for this limitation in the claim. Claim 13 recites the limitation "the range" in Line 6. There is insufficient antecedent basis for this limitation in the claim. Claim 13 recites the limitation "the I/O unit" in Line 6. There is insufficient antecedent basis for this limitation in the claim. Claim 14 recites the limitation "the released CPUs " in Lines 3-4. There is insufficient antecedent basis for this limitation in the claim. Claim 15 recites the limitation "the operation instructions" in Line 7. There is insufficient antecedent basis for this limitation in the claim. Claim 15 recites the limitation "the received operation instructions " in Lines 8-9. There is insufficient antecedent basis for this limitation in the claim. Claim 16 recites the limitation "the I/O unit" in Lines 6 and 7. There is insufficient antecedent basis for this limitation in the claim. Claim 17 recites the limitation "the range" in Line 6. There is insufficient antecedent basis for this limitation in the claim. Claim 17 recites the limitation "the I/O unit" in Line 6. There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites the limitation "the first testing task" in Lines 2 and 10. There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites the limitation "the I/O units" in Lines 4 and 7. There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites the limitation "the processing module" in Lines 4-5, 6 and 9. There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites the limitation "the cluster control module" in Line 6. There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites the limitation "the I/O unit" in Lines 7 and 9. There is insufficient antecedent basis for this limitation in the claim. Claim 18 recites the limitation "the released processing module" in Lines 10-11. There is insufficient antecedent basis for this limitation in the claim. Claim 21 recites the limitation "the distributed memory units" in Lines 4 and 6. There is insufficient antecedent basis for this limitation in the claim. Claim 21 recites the limitation "the corresponding distributed memory units" in Lines 5-6. There is insufficient antecedent basis for this limitation in the claim. Claim 21 recites the limitation "the corresponding distributed memory unit" in Lines 7-8. There is insufficient antecedent basis for this limitation in the claim. Claim 21 recites the limitation "the I/O unit" in Line 9. There is insufficient antecedent basis for this limitation in the claim. Claim 21 recites the limitation "the industrial-personal-computer" in Line 9. There is insufficient antecedent basis for this limitation in the claim. Claim 21 recites the limitation "the operating result" in Line 10. There is insufficient antecedent basis for this limitation in the claim. Claim 21 recites the limitation "the target memories" in Line 11. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the processing module" in Line 5. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the currently idle processing modules" in Line 6. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the I/O unit" in Line 6. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the currently idle I/O units" in Lines 6-7. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the range" in Line 7. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the industrial-personal-computers" in Line 7. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the current first testing task" in Line 8. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the industrial computers" in Lines 10-11. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the industrial computer pool" in Line 11. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the I/O pool" in Line 11. There is insufficient antecedent basis for this limitation in the claim. Claim 22 recites the limitation "the I/O control module" in Lines 12 and 14. There is insufficient antecedent basis for this limitation in the claim. Claim 23 recites the limitation "the plurality of industrial-personal-computers" in Lines 5-6. There is insufficient antecedent basis for this limitation in the claim. Claim 23 recites the limitation "the plurality of I/O units" in Lines 5-6. There is insufficient antecedent basis for this limitation in the claim. Prior Art Made of Record Jardini et al. (US Patent Application No. 2023/0168985) teaches different test mechanisms, such as Model in the Loop (MIL), Software in the Loop (SIL), Processor in the Loop (PIL), and Hardware in the Loop (HIL). HIL testing enables the testing of embedded systems and their integration as implemented in the SUT. Grohmann et al. (US Patent No. 6,918,061) teaches the controller is simulated in a simulated technical environment (software-in-the-loop SIL) in the early development phases. As soon as the control components are actually available, the test of the complete component is continued on a hardware-in-the-loop (HIL) test system. Those components which belong to the complete control system are also tested linked together using such HIL test systems. In the final step, the controllers are integrated and tested once again jointly with the other components that make up the overall system. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARAI E BUTLER whose telephone number is (571)270-3823. The examiner can normally be reached 8 am to 4 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ashish Thomas can be reached at 571-272-0631. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SARAI E BUTLER/Primary Examiner, Art Unit 2114
Read full office action

Prosecution Timeline

Sep 08, 2025
Application Filed
Sep 01, 2026
Non-Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+10.7%)
2y 4m (~1y 3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1156 resolved cases by this examiner. Grant probability derived from career allowance rate.

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