Prosecution Insights
Last updated: October 01, 2026
Application No. 19/164,104

DISPLAY PIXEL HAVING A DYNAMIC CURRENT-CALIBRATION

Non-Final OA §102§103
Filed
Sep 10, 2025
Priority
Apr 03, 2023 — provisional 63/493,863 +1 more
Examiner
SHARIFI-TAFRESHI, KOOSHA
Art Unit
2628
Tech Center
2600 — Communications
Assignee
Google LLC
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
1y 3m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
733 granted / 937 resolved
+16.2% vs TC avg
Moderate +10% lift
Without
With
+9.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
20 currently pending
Career history
962
Total Applications
across all art units

Statute-Specific Performance

§101
3.9%
-36.1% vs TC avg
§103
42.8%
+2.8% vs TC avg
§102
25.7%
-14.3% vs TC avg
§112
21.6%
-18.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 937 resolved cases

Office Action

§102 §103
DETAILED ACTION Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by [Lin, Chiao-Ju, US 20040178407 A1]. Regarding claim 1: Lin discloses: 1. (Original) A pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”; Fig.6; ¶ 0033: “FIG. 6 shows an exemplary driving circuit of a current-driven AMOLED pixel”] comprising: a first portion (411) [Lin: Figs.3 or 6; the pixel sub-circuit comprising driving TFT 250 and capacitor 260] including: a current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] coupled at a source terminal to a power supply (420) [Lin: Figs.3 or 6: source of driving TFT 250 tied to the Vss rail, the same rail to which capacitor 260’s far plate connects; Examiner: That Vss rail is the “power supply” under BRI]; and a charge-storage element (430) [Lin: Figs.3 or 6: capacitor 260] coupled between a gate terminal of the current-source transistor (404) [Lin: Figs.3 or 6: gate of driving TFT 250] and the source terminal of the current-source transistor (404) [Lin: Figs.3 or 6: capacitor 260 connected between the gate node of driving TFT 250 and the Vss/source rail; ¶ 0033: the third switch’s other end “is connected to the gate of the driving thin film transistor 650 and one end of the capacitor 660,” while “the other end of the capacitor 660 and the source of the driving film transistor 650 are connected to a positive power source Vdd”]; a calibration transistor (406) [Lin: Figs.3 or 6: second switch 220] configured to couple the gate terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] to a drain terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] while the pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] is in a calibration mode [Lin: Figs.3 or 6: second switch 220 connects one end to the current source and the other to the drain of driving TFT 250; ¶ 0033: “On end of the third switch 630 is connected to the drain of the driving thin film transistor 650 and another end of the third switch 630 is connected to the gate of the driving thin film transistor 650”; ¶ 0035: turned on during the driving-voltage adjustment stage, diode-connecting 650]; and a calibration-source transistor (405) [Lin: Figs.3 or 6: second switch 620] configured to couple the drain terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] to a hybrid calibration source (200) while the pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] is in the calibration mode [Lin: ¶ 0033: “One end of the second switch 620 is connected to a current source and another end of the second switch 620 is connected to the drain of the driving thin film transistor 650”; Examiner: The “hybrid calibration source” equates to current source plus Vt under BRI, second switch 620 couples the drain to the current branch while Vt reaches the same diode-connected node via pre-charge switch 670 and the closed gate-drain short 630, both jointly charging capacitor 660], the hybrid calibration source (200) [Lin: ¶ 0033: “the driving circuit comprises a pre-charge switch 670 connected to a driving power source Vt”, the driving power source Vt together with the current source; Examiner: The “hybrid calibration source” equates to current source plus Vt under BRI] configured to charge the charge-storage element (430) [Lin: Figs.3 or 6: capacitor 260] to a gate- source voltage during a calibration period [Lin: ¶ 0034: “The pre-charge switch 670 is first turned on, so that the driving power source Vt is able to pre-charge the capacitor 660 to a pre-charge voltage level before the current source charges/discharges the capacitor 660”. Preferably, the pre-charge voltage level is close to a level of the threshold voltage of the driving thin film transistor 650”; ¶ 0035: “After the pre-charge a driving voltage adjustment stage is proceeded. At this time, the pre-charge switch 670 is turned off, and the second switch 620 and the third switch 630 are turned on, so that the voltage across the capacitor 660 can be fast adjusted to a driving voltage level corresponding to a gray scale current of the current source”] so that the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] conducts a calibrated current after the calibration period [Lin: ¶ 0036: “Then, the driving circuit proceeds to a illumination stage … a current, which flows through the OLED 640 and the drain and the source of the driving thin film transistor 650, will be equal to the gray scale current of the current source due to the driving of the voltage across the capacitor 260]. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Rajasekaran; Vijay, US 20120218451 A1]. Regarding claim 2: Lin discloses. 2. (Original) The pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”; Fig.6; ¶ 0033: “FIG. 6 shows an exemplary driving circuit of a current-driven AMOLED pixel”] according to claim 1, wherein: the calibration transistor (406) [Lin: Figs.3 or 6: second switch 220] generates an unwanted voltage at the gate terminal of the current- source transistor during the calibration period [Lin: Fig.6; the calibration transistor is third switch 630, a MOS switch coupled to the gate node of the driving TFT 650; Examiner: Toggling such a switch necessarily couples charge (clock feedthrough) onto the gate node, an unwanted voltage.]; Rajasekaran discloses: and the pixel (400), for increasing an accuracy of the gate-source voltage stored in the charge-storage element (430), further includes: a voltage source configured to cancel the unwanted voltage at the gate terminal of the current-source transistor (404) during the calibration period [Rajasekaran: ¶ 0029: “ image sensing pixel 28 may include one or more dummy transistors such as dummy transistor 70 that may be used to reduce or eliminate the reset charge injection (e.g., by injecting an approximately equal and opposite amount of charge)”; ¶ 0030: “By applying a rising edge of a dummy signal to dummy transistor 70 at approximately the same time as applying a falling edge of a reset signal to reset transistor 44, reset charge injection attributable to reset transistor 44 may be offset by charge injection attributable to dummy transistor 70”; Examiner: The dummy transistor 70, driven by a complementary (mirrored) signal to inject equal-and-opposite charge, is the “voltage source” that cancels the switch-induced unwanted voltage at the stored-voltage node, corresponding to the application’s compensation transistor 407 driven by a complementary signal at TERM5 (425)]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to add to the pixel of Lin a dummy/compensation transistor driven by a complementary signal to inject equal and opposite charge that cancels the charge-injection voltage produced at the gate node by the switching calibration transistor, as taught by Rajasekaran. One of ordinary skill would have been motivated to do so to keep the stored gate-source voltage accurate. the same functions as Rajasekaran’s dummy transistor does at its storage node (¶¶ 0029-0030, 0036). Both references address switch charge injection at a sampled node and are analogues art. Claim(s) 3-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Takahara; Hiroshi, US 20070046587 A1]. Regarding claim 3: Lin discloses: 3. (Currently Amended) The pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] according to claim 1, wherein: the hybrid calibration source (200) includes a voltage source and a current source [Lin: ¶ 0033: “a pre-charge switch 670 connected to a driving power source Vt” together with the current source coupled via second switch 620]; However, Lin does not expressly disclose: the voltage source is coupled to the calibration-source transistor (405) by a first switch (210); and the current source is coupled to the calibration-source transistor (405) by a second switch (220). Takahara discloses: the voltage source is coupled to the calibration-source transistor (405) by a first switch (210) [Takahara: ¶ 0477: “outputs from the … voltage tone circuit 231 are controlled by the switch Sp,” and the signal are “applied to the source signal line terminal 242”]; and the current source is coupled to the calibration-source transistor (405) by a second switch (220) [Takahara: ¶ 0477: “Program current output from the current tone circuit 154 is controlled by a switch Si”, likewise applied to the source signal line terminal 242]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the voltage source and current source of Lin as separate circuits switched onto one shared line, as taught by Takahara, in order to apply the pre-charge voltage and the program current to the source signal line through their respective switches, as Takahara teaches (¶ 0477). Lin and Takahara are analogues art, both directed to current-calibrated active matrix display pixel driving. Regarding claim 4: Lin discloses: 4. (Original) The pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] according to claim 3, wherein: the calibration period includes a first phase and a second phase [Lin: ¶ 0034: “The pre-charge switch 670 is first turned on” (first phase); ¶ 0035: “ the pre-charge switch 670 is turned off, and the second switch 620 and the third switch 630 are turned on” (second phase)]; However, Lin does not expressly disclose: the first switch (210) is CLOSED and the second switch (220) is OPEN during the first phase; and the first switch is OPEN and the second switch is CLOSED during the second phase. Takahara discloses: the first switch (210) is CLOSED and the second switch (220) is OPEN during the first phase [Takahara: ¶ 0492: “only one of the voltage and program currents may be applied in each 1H period … period A is a 1H period during which voltage programming is performed ”]; and the first switch is OPEN and the second switch is CLOSED during the second phase [Takahara: ¶ 0483: “the program current in period B causes the current flowing through the EL element 15 to reach a predetermined value”; ¶ 0477: “ Program current output from the current tone circuit 154 is controlled by a switch Si.”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to operate the first and second switches of Lin so that the voltage-source switch is closed and the current-source switch is open during the first phase, and the reverse during the second phase, as taught by Takahara, in order to apply the voltage during period A, only one being applied in a given period (Takahara ¶¶ 0483, 0492 ). Lin and Takahara are analogous art, both directed to current-calibrated active matrix display pixel driving. Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Knez; Ivan et al., US 20190347990 A1] and further in view of [Lu; Tong et al., US 20200135106 A1] . Regarding claim 5: Lin discloses: 5. (Currently Amended) The pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] according to claim 1,further comprising: a second portion (412) [Lin: Fig.6: the OLED-side circuitry coupled to the drain of driving TFT 650 through first switch 610] including: a light emitting diode (LED) [Lin: Fig.6: OLED 640]; However, Lin does not expressly disclose: a modulation transistor (401) coupled between the LED (122) and the current-source transistor (404) while the pixel (400) is in a radiation mode, the modulation transistor (401) being configurable in an ON-condition to conduct the calibrated current to the LED so that the LED emits light or in an OFF-condition to block the calibrated current from the LED so that the LED does not emit light. Knez discloses: a modulation transistor (401) [Knez: Fig.12: switching transistor (MS) 226] coupled between the LED (122) [Knez: Fig.12: LED 230] and the current-source transistor (404) [Knez: Fig.12: driving transistor (MDR) 222] while the pixel (400) is in a radiation mode [Knez: Fig.12: MS 226 connected between drive transistor MDR 222 and LED 230; Fig.14: emission process], the modulation transistor (401) being configurable in an ON-condition to conduct the calibrated current to the LED so that the LED emits light or in an OFF-condition to block the calibrated current from the LED so that the LED does not emit light [Knez: ¶ 0102: “The MS 226 activates in response to an enabled CSimage.data signal 247”, when the signal is not enabled, MS 226 is OFF and the current to LED 230 is blocked; ¶ 0099: isolating the LED to avoid “unintentional emissions of light from the LED 230”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the pixel of Lin with a modulation transistor coupled between the light-emitting device and the current-source transistor, configurable on to conduct the calibrated current to the LED or off to block it, as taught by Knez. One of ordinary skill would have been motivated to add Knez’s modulation transistor (MS226) in order to gate the calibrated current to the LED under a PWM image-data signal and thereby obtain pulse-width-modulated control of the emission (Knez ¶¶ 0100, 0102). Lin and Knez are analogues art, both directed to active matrix pixel driving. Furthermore, Lin in view of Knez discloses: the limitations as discussed above. However, Lin in view of Knez does not expressly disclose: wherein the isolation transistor (402) is configured to: decouple the first portion (411) and the second portion when the pixel (400) is in the calibration mode; and couple the first portion (411) and the second portion when the pixel (400) is in the radiation mode. Lu discloses: wherein the isolation transistor (402) [Lu: Fig.4: transistor T4] is configured to: decouple the first portion (411) and the second portion when the pixel (400) is in the calibration mode [Lu: ¶ 0041: during the threshold compensation phase “the EMI(n) signal level is changed from a low voltage value to a high voltage value, causing transistor T4 to be turned off,” disconnecting the drive transistor from the OLED]; and couple the first portion (411) and the second portion when the pixel (400) is in the radiation mode [Lu: ¶ 0048: during the emission phase “causing transistor T4 to be turned on. With transistor T4 turning on, the drain of the drive transistor is connected to the anode of the OLED”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the pixel of Lin in view of Knez with an isolation transistor coupled between the current-source transistor and the modulation transistor that is off during the calibration mode and on during the radiation mode, as taught by Lu. One of ordinary skill would have been motivated to add Lu’s isolation transistor (T4) so that the drive transistor is disconnected from the light-emitting device while the drive transistor is being calibrated, and reconnected to the light-emitting device for emission (Lu ¶¶ 0041, 0048), so that the light-emitting device does not emit during calibration. Lin, Knez and Lu are analogous art, all directed to active matrix display driving. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Knez; Ivan et al., US 20190347990 A1], [Lu; Tong et al., US 20200135106 A1] and further in view of [Long; Chunping et al., US 20110090208 A1]. Regarding claim 6: Lin in view of Knez and Lu discloses: 6. (Original) The pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] according to claim 5. However, Lin in view of Knez and Lu does not expressly disclose: further comprising: a blocking transistor (403) configured to block switching signals from the second portion, during the radiation mode, in order to prevent the switching signals from changing the gate- source voltage. Long discloses: further comprising: a blocking transistor (403) [Long: Fig.2: blocking transistor 303] configured to block switching signals from the second portion, during the radiation mode [Long: ¶ 0017: “The blocking transistor 303 is used to prevent the driving transistor 304 from being turned on to charge the node B when the switching transistor 301 is turned on to write the data signal voltage from the data line 350 to the pixel circuit”], in order to prevent the switching signals from changing the gate- source voltage [Long: ¶ 0017: “ the threshold voltage pre-stored by the compensating transistor 302 will not be deviated”; ¶ 0023: “it is prevented that the pre-stored threshold voltage drifts”; ¶ 0015: “The blocking transistor may be connected with the power source line so that the voltage across the storage capacitor is not decreased during the data is written”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the pixel of Lin in view of Knez and Lu with a blocking transistor that prevents switching signals from changing the stored gate-source voltage, as taught by Long. One of ordinary skill would have been motivated to add Long’s blocking transistor (303) so that the voltage stored on the storage capacitor is not deviated by switching signals applied to the pixel (Long ¶ 0015, 0017, 0023); in the combined pixel, those switching signals are produced by the second portion (the modulation transistor of Knez, which switches per the PWM signal during the radiation mode), so the blocking transistor blocks them during the radiation mode. Lin, Knez, Lu, and Long are analogous art, all directed to active matrix display pixel driving. Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Knez; Ivan et al., US 20190347990 A1], [Lu; Tong et al., US 20200135106 A1] and further in view of [Lee; Jae Hoon et al., US 20210233463 A1]. Regarding claim 8: Lin in view of Knez and Lu discloses: 8. (Currently Amended) The pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] according to claim 5, including the modulation transistor (401) [Knez: Fig.12: switching transistor MS 226]. However, Lin in view of Knez and Lu does not expressly disclose wherein a gate terminal of the modulation transistor (401) is coupled to a static random access memory (SRAM) cell [Examiner: Knez teaches an in-pixel memory whose output gates the modulation transistor, buts detailed description does not disclose that the memory is SRAM]. Lee discloses: a static random access memory (SRAM) cell (410) [Lee: ¶ 0050: “The embedded pixel memory unit of the pixel circuit according to the present specification may include 4T SRAM cells”; ¶ 0051: “ Referring to FIG. 4, transistors included in each 4T SRAM cell will be classified into first to fourth transistors M1 to M4”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to couple the gate of the modulation transistor of Lin in view of Knez, and Lu to an SRAM cell, as taught by Lee. One of ordinary skill would have been motivated to store the per-pixel modulation data in an in-pixel 4T SRAM cell whose stored state controls turn-on/turn-off of the light-emitting element (Lee ¶¶ 0044, 0050-0051), in place of Knez’s generic in-pixel memory, in order to retain emission setting locally at the pixel with a compact, low-transistor-count memory; doing so amounts to using a known in-pixel memory (Lee’s SRAM) to drive the gate of the modulation transistor, with predictable results. Lin, Knez, Lu and Lee are analogues art, all directed to active matrix display pixel driving. Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Knez; Ivan et al., US 20190347990 A1], [Lu; Tong et al., US 20200135106 A1], [Lee; Jae Hoon et al., US 20210233463 A1] and further in view of [Li; Bo et al., US 20210407455 A1]. Regarding claim 9: Lin in view of Knez, Lu and Lee discloses: 9. (Original) The pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] according to claim 8. However, Lin in view of Knez, Lu and Lee does not expressly disclose: wherein the SRAM cell is configured in a first state or a second state by a pulse width modulation (PWM) signal. Li discloses: wherein the SRAM cell is configured in a first state or a second state [Li: ¶ 0031: “only one of the complementary outputs of the SRAM memory cell is required. The choice between S.sub.POS and S.sub.NEG depends on the design of the remainder of the pixel drive circuit”; Examiner: The SRAM cell (101) holds one of two complementary states.] by a pulse width modulation (PWM) signal [Li: ¶ 0031: “The data state of the SRAM memory cell 101 is asserted onto the gate of data modulation FET 130, thereby largely determining the state of pixel drive circuit 100”; ¶ 0036: “FET 130 comprises a data modulation section suitable to respond to pulse-width modulation waveforms used to create gray scale modulation. The value of this function is well understood in the art. The output of the drain of FET 115 is asserted onto the source of FET 130 over conductor 121. The gate of PWM modulation FET 130 is connected to output S.sub.NEG of SRAM 101 over conductor 109. When the data state of SRAM 101 is on, then S.sub.NEG is low and acts on the gate of PWM modulation FET 130 to enable it to assert the current asserted onto its source over conductor 121 onto its drain over conductor 126”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to configure the SRAM cell in a first or second state by a PWM signal, as taught by Li. One of ordinary skill would have been motivated to store the per-pixel modulation data as one of the two complementary states of the in-pixel SRAM cell and to assert that stored state onto the data modulation transistor to pulse-width-modulate the emission and impose gray scale on the LED (Li ¶ 0031, 0036), in order to obtain locally stored PWM gray-scale control, with predictable results. Lin, Knez, Lu, Lee, and Li are analogues art, all directed to active matrix display pixel driving. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Ahmed; Khaled, US 20220198995 A1]. Regarding claim 10: Lin discloses: 10. (Currently Amended) The pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] according to claim 1, including the charge-storage element (430) [Lin: Fig.6: capacitor 660]. However, Lin does not expressly disclose: wherein the charge-storage element (430) is a metal oxide semiconductor field effect transistor (MOSFET) configured as a capacitor. Ahmed discloses: wherein the charge-storage element (430) is a metal oxide semiconductor field effect transistor (MOSFET) configured as a capacitor [Ahmed: ¶ 0056: “The capacitor can be implemented in any suitable way. For example, the capacitor(s) is implemented by transistors configured as capacitors, metal-insulator-metal (MIM) capacitors, ferroelectric capacitors, etc.”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the charge-storage element (capacitor) of Lin as a MOSFET configured as a capacitor, as taught by Ahmed. One of ordinary skill would have been motivated to do so because Ahmed expressly identifies a transistor configured as a transistor as a suitable way to implement the in-pixel capacitor (Ahmed ¶ 0056), and implementing the storage capacitor as a MOSFET allows it to be fabricated together with the pixel’s other transistors in the same process, with predictable results. The substitution of one known capacitor implementation (MOSET configured as a capacitor) for another (a discrete capacitor) yields no more than the predictable result of storing charge. Lin and Ahmed are analogues art, both directed to active matrix display pixel driving. Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Lee; Jae Hoon et al., US 20210233463 A1]. Regarding claim 11: Lin discloses: 11. (Currently Amended) A[Lin: ¶ 0010: A “current-driven AMOLED pixel “ display comprising the pixel and its calibration process.], comprising: the hybrid calibration source (200) [Lin: ¶ 0033: “the driving circuit comprises a pre-charge switch 670 connected to a driving power source Vt”, the driving power source Vt together with the current source; Examiner: The “hybrid calibration source” equates to current source plus Vt under BRI]; and at least one pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] according to claim 1 [Examiner: Refer to the rejection of claim 1 above]. However, Lin does not expressly disclose: the display is a micro-light emitting-diode (micro-LED). Lee discloses: a micro-LED display [Lee: ¶ 0043: “The LED may be a micro LED having a size of 80 μm or less”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the active matrix display of Lin with inorganic micro-LED emitters, as taught by Lee, thereby arriving at a micro-LED display comprising Lin’s hybrid calibration source and Lin’s calibration pixel. One of ordinary skill in the art would have been motivated to substitute micro-LEDs for Lin’s organic LEDs in order to obtain the recognized advantages of micro-LEDs, such as higher luminance and longer operating lifetime, while retaining Lin’s current calibration that corrects drive transistor threshold and mobility variation (Lin ¶ 0009), a benefit equally applicable to a micro-LED display. Such substitution of one known emitter for another yields predictable results and requires no change to Lin’s calibration operation. Lin and Lee are analogous art. Claim(s) 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Knez; Ivan et al., US 20190347990 A1]. Regarding claim 12: Lin discloses: 12. (Original) A method for driving a pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”; ¶ 0039: “a driving method of a current-driven AMOLED can be concluded”] in a display, the method comprising: configuring the pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] in a calibration mode by: and connecting the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] to a hybrid-calibration source so that the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] conducts a calibrated current [Lin: ¶ 0034: “The pre-charge switch 670 is first turned on, so that the driving power source Vt is able to pre-charge the capacitor 660”; ¶ 0035: “the second switch 620 and the third switch 630 are turned on, so that the voltage across the capacitor 660 can be fast adjusted to a driving voltage level corresponding to a gray scale current of the current source”]; generating a gate-source voltage at the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] while the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] conducts the calibrated current [Lin: ¶ 0033: “On end of the third switch 630 is connected to the drain of the driving thin film transistor 650 and another end of the third switch 630 is connected to the gate of the driving thin film transistor 650 and one end of the capacitor 660”; ¶ 0035: “At this time, the pre-charge switch 670 is turned off, and the second switch 620 and the third switch 630 are turned on, so that the voltage across the capacitor 660 can be fast adjusted to a driving voltage level corresponding to a gray scale current of the current source”]; storing the gate-source voltage in a capacitor coupled between a source terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] and a gate terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250; ¶ 0033: the capacitor’s one end at “the gate of the driving thin film transistor 650,” while “the other end of the capacitor 660 and the source of the driving thin film transistor 650 are connected to a positive power source Vdd”]; and configuring the pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] in a radiation mode by: disconnecting the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] from the hybrid-calibration source [Lin: ¶ 0036: “the second switch 620 and the third switch 630 are turned off, and the first switch 610 is turned on”]; However, Lin does not expressly disclose: disconnecting the current-source transistor from a PWM portion during the calibration mode; and connecting the current-source transistor to a PWM portion during the radiation mode, the PWM potion including a modulation transistor (401) and light emitting diode (LED). Knez discloses: a PWM portion including a modulation transistor (401) (401) and light emitting diode (LED) (122) [Knez: ¶ 0098: a “switching transistor (MS) 226” and “a light emitting portion such as a LED 230”; ¶ 0102: “ the sub-pixel 72 emits light according to image data control (CSimage.data) signal 247 transmitted to the MS 226 … The MS 226 activates in response to an enabled CSimage.data signal 247”; Examiner: MS 226 modulates the drive current to LED 230 under PWM image data.]; connecting the current-source transistor (404) to the PWM portion (412) during the radiation mode [Knez: ¶ 0100: “the driving current enables the emission of light from the LED 230 while the MS 226 is activated”]; and disconnecting the current-source transistor (404) from the PWM portion (412) during the calibration mode [Knez: ¶ 0099: isolating the LED to avoid “ unintentional emissions of light from the LED 230”; ¶ 0101: during programming “the sub-pixel 72 is programmed with electrical signals ready to transmit through to the LED 230 upon activation of the MS 226”, MS 226 deactivated (LED disconnected) during calibration/programming, activated for emission]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the pixel driving method of Lin to deliver the calibrated drive current to a light emitting diode through a modulation transistor (401) controlled by a PWM signal, and to disconnect the current source transistor from that PWM portion during the calibration mode, as taught by Knez. One of ordinary skill would have been motivated to do so in order to provide a PWM gray scale control of the emission while preventing unintended illumination of the LED during calibration, as expressly suggested by Knez (¶¶ 0099, 0102), thereby achieving accurate gray scale emission atop a uniform, calibrated drive current. Lin and Knez are analogues art, both being directed to active matrix display pixel driving. Regarding claim 13: Lin discloses: 13. (Original) The method according to claim 12, further comprising, while in the radiation mode: biasing the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] to conduct the calibrated current based on the gate- source voltage stored in the capacitor (430) [Lin: ¶ 0036: during the illumination stage, “ a current, which flows through … the drain and the source of the driving thin film transistor 650, will be equal to the gray scale current of the current source due to the driving of the voltage across the capacitor 260”]. However, Lin does not expressly disclose: receiving the calibrated current at the modulation transistor (401); controlling the modulation transistor (401) ON and OFF with a PWM signal to generate a PWM current; and radiating light at the LED based on the PWM current. Knez discloses: receiving the calibrated current at the modulation transistor (401) [Knez: Fig.12: Switching transistor MS 226 connected in the current path between the drive transistor MDR 222 and LED 230, receiving the drive current]; controlling the modulation transistor (401) ON and OFF with a PWM signal to generate a PWM current [KnezL ¶ 0102: “The MS 226 activates in response to an enabled CSimage.data signal 247”; ¶ 0100: “the driving current enables the emission of light from the LED 230 while the MS 226 is activated”]; and radiating light at the LED based on the PWM current [Knez: ¶ 0100: “the driving current enables the emission of light from the LED 230 while the MS 226 is activated”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to gate the calibrated current of Lin ON and OFF at a modulation transistor with a PWM signal to radiate light at the LED, as taught by Knez. Lin biases the current-source transistor to conduct the calibrated (gray-scale) current from the stored gate-source voltage during illumination (¶ 0036), and Knez controls the modulation transistor ON and OFF with the image-data signal so the conducted current produces emission at the LED (¶¶ 0100, 0102); performing these steps in the combined method yields the predictable result of pulse-width-modulated emission from the calibrated current. Lin and Knez are analogues art, both directed to active matrix display pixel driving. Claim(s) 14-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Knez; Ivan et al., US 20190347990 A1] and further in view of [Takahara; Hiroshi, US 20070046587 A1]. Regarding claim 14: Lin in view of Knez discloses: 14. (Currently Amended) The method according to claim 12, including connecting the current-source transistor to a hybrid-calibration source. However, Lin in view of Knez does not expressly disclose: wherein: the hybrid-calibration source is coupled to a plurality of pixels s in the display by a calibration bit line; and the hybrid-calibration source includes a voltage source and a current source. Takahara discloses: wherein: the hybrid-calibration source is coupled to a plurality of pixels s in the display by a calibration bit line [Takahara: ¶ 0477: “The signals for that are applied to the source signal line terminal 242 from the output terminal 83”; Examiner: The combined voltage and current programming delivered over a shared source signal line (18). Also, in an active-matrix display the source signal line is shared by the column of the pixels it serves (i.e., a plurality of pixels) ]; and the hybrid-calibration source includes a voltage source and a current source [Takahara: ¶ 0477: “ outputs from the current tone circuit 154 and voltage tone circuit 231 are controlled by the switches Si and Sp to implement precharge driving (voltage programming)+current programming”; Examiner: Current tone circuit 154 being a current source and the voltage tone circuit being a voltage source]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to deliver the calibration from a hybrid-calibration source comprising a voltage source and a current source over a shared calibration bit line to a plurality of pixels, as taught by Takahara. One having ordinary skill would have been motivated to combine the voltage programming and current programming onto a single shared source signal line, controlled by switches, so that one hybrid-calibration source serves a plurality of pixels (Takahara: ¶ 0477), reducing the per-pixel calibration circuitry and routing. Lin, Knez, and Takahara are analogues art, all directed to active-matrix display pixel driving. Regarding claim 15: Lin in view of Knez discloses: 15. (Original) The method according to claim 14, wherein storing the gate-source voltage in the capacitor coupled between the source terminal and the gate terminal of the current- source transistor includes: coupling the gate terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] to a drain terminal of the current- source transistor, the drain terminal coupled to the hybrid-calibration source [Lin: ¶ 0033: “On end of the third switch 630 is connected to the drain of the driving thin film transistor 650 and another end of the third switch 630 is connected to the gate of the driving thin film transistor 650 and one end of the capacitor 660”]; charging the capacitor to an approximate voltage using the voltage source [Lin: ¶ 0034: “The pre-charge switch 670 is first turned on, so that the driving power source Vt is able to pre-charge the capacitor 660 to a pre-charge voltage level before the current source charges/discharges the capacitor 660. Preferably, the pre-charge voltage level is close to a level of the threshold voltage of the driving thin film transistor 650”]; and charging the capacitor from the approximate voltage to the gate-source voltage using the current source [Lin: ¶ 0035: “the second switch 620 and the third switch 630 are turned on, so that the voltage across the capacitor 660 can be fast adjusted to a driving voltage level corresponding to a gray scale current of the current source”]. However, Lin in view of Knez does not expressly disclose: coupling the voltage source of the hybrid-calibration source to the drain terminal; and replacing the voltage source at the drain terminal with the current source of the hybrid- calibration source. Takahara discloses: coupling the voltage source of the hybrid-calibration source to the drain terminal [Takahara: ¶ 0483: “a voltage is applied to the source signal line 18 by voltage programming for a certain part of a 1H period (indicated by A), and then a current is applied by current programming for a period of B. Thus, through the voltage application in period A, a predetermined voltage is applied to the gate voltage of the driving transistor 11a of the pixel 16 so that a current of an almost desired value will flow through the EL element 15”]; and replacing the voltage source at the drain terminal with the current source of the hybrid- calibration source [Takahara: ¶ 0483: “and then a current is applied by current programming for a period of B. … the program current in period B causes the current flowing through the EL element 15 to reach a predetermined value”; ¶ 0477: “outputs from the current tone circuit 154 and voltage tone circuit 231 are controlled by the switches Si and Sp to implement precharge driving (voltage programming)+current programming. The signals for that are applied to the source signal line terminal 242 from the output terminal 83”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to deliver the precharge volage and then the program current to the same drain-side node over a shared lined, switching from the voltage source to the current source, as taught by Takahara. One having ordinary skill would have been motivated to apply the voltage tone circuit and then the current tone circuit to the same source signal line through switches (Takahara ¶¶ 0477, 0483) so that a single shared calibration source performs the precharge-to-approximate and then current-to-final phase at one node, simplifying the routing relative to Lin’s separate voltage and current paths. Lin, Knez, and Takahara are analogues art, all directed to active-matrix display pixel driving. Claim(s) 16-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Knez; Ivan et al., US 20190347990 A1], [Takahara; Hiroshi, US 20070046587 A1], and further in view of [Rajasekaran; Vijay, US 20120218451 A1]. Regarding claim 16 Lin in view of Knez, and Takahara discloses: 16. (Original) The method according to claim 15, wherein coupling the gate terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] to the drain terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] includes: activating a calibration transistor (406) [Lin: Figs.3 or 6: second switch 220] to couple the gate terminal and the drain terminal [Lin: ¶ 0035: “the second switch 620 and the third switch 630 are turned on”; ¶ 0033: “On end of the third switch 630 is connected to the drain of the driving thin film transistor 650 and another end of the third switch 630 is connected to the gate of the driving thin film transistor 650 and one end of the capacitor 660”]. However, Lin in view of Knez and Takahara does not expressly disclose: the calibration transistor (406) generating a first voltage between the gate terminal and the drain terminal; and applying a second voltage to the gate terminal to cancel the first voltage generated by the calibration transistor (406). Rajasekaran discloses: the calibration transistor (406) generating a first voltage between the gate terminal and the drain terminal [Rajasekaran: ¶ 0019: “capacitive coupling (e.g., parasitic capacitance) between the gate terminals of the reset transistors and the source-drain terminals of the reset transistors may result in undesirable charge injection”; ¶ 0023: “Reset charge injection occurs on the falling edge of a reset control signal applied to the gate of the reset transistor 108”]; and applying a second voltage to the gate terminal to cancel the first voltage generated by the calibration transistor (406) [Rajasekaran: ¶ 0019: “The dummy signals generated by circuitry 32 may be applied to dummy transistors to offset the reset charge injection (e.g., by injecting an approximately equal and opposite amount of charge)”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to apply a compensating second voltage to cancel the charge-injection offset (first voltage) introduces when the calibration transistor of Lin couples the gate and drain, as taught by Rajasekaran. One of ordinary skill would have been motivated to inject an approximately equal and opposite charge to offset the charge injection caused by the switching of the calibration transistor (Rajasekaran ¶ 0019), in order to preserve the stored gate-source voltage and thereby increase the accuracy of the calibration. Lin, Knez, Takahara, and Rajasekaran are analogues art, all directed to active-matrix display pixel driving. Regarding claim 17: Lin in view of Knez, Takahara and Rajasekaran discloses: 17. (Original) The method according to claim 16. Rajasekaran further discloses: wherein the second voltage is generated by a transistor having a first size to match a second size of the calibration transistor (406) [Rajasekaran: ¶ 0034: “In reset transistor 44, the conductive channel … has a width W1 and a length L1. In dummy transistor 70, the conductive channel … has a width W2 and a length L2”; ¶ 0035: “it may be desirable to optimize the widths and lengths of the conductive channels of dummy transistor 70 and reset transistor 44 such that the capacitive coupling charge injection of dummy transistor 70 approximately (or entirely) offsets the capacitive coupling charge injection of reset transistor 44”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to generate the second voltage with a transistor sized to match the calibration transistor, as taught by Rakasekaran. One of ordinary skill would have been motivated to optimize the width and length of the compensating transistor’s channel to match those of the calibration transistor (Rajasekaran ¶¶ 0034-0035) so that the charge injection of the compensating transistor approximately or entirely offsets that of the calibration transistor, thereby canceling the first voltage and increasing calibration accuracy. Lin, Knez, Takahara, and Rajasekaran are analogues art, all directed to active-matrix display pixel driving. Claim(s) 21-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over [Lin, Chiao-Ju, US 20040178407 A1] in view of [Takahara; Hiroshi, US 20070046587 A1] and further in view of [Lee; Jae Hoon et al., US 20210233463 A1]. Regarding claim 21: Lin discloses: 21. (Original) A [Lin: ¶ 0010: A “current-driven AMOLED pixel “ display comprising the pixel and its calibration process.], comprising: a hybrid calibration source (200) [Lin: ¶ 0033: “the driving circuit comprises a pre-charge switch 670 connected to a driving power source Vt”, the driving power source Vt together with the current source; Examiner: The “hybrid calibration source” equates to current source plus Vt under BRI] and a plurality of pixels (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”], each pixel (400) [Lin: Figs.3 or 6; ¶ 0028: “FIG. 3 shows an exemplary driving circuit of a current-driven AMOLED pixel”] including: a current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] coupled at a source terminal to a power supply (420) [Lin: Figs.3 or 6: source of driving TFT 250 tied to the Vss rail, the same rail to which capacitor 260’s far plate connects; Examiner: That Vss rail is the “power supply” under BRI]; a charge-storage element (430) [Lin: Figs.3 or 6: capacitor 260] coupled between a gate terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] and the source terminal of the current-source transistor (404) [Lin: Figs.3 or 6: capacitor 260 connected between the gate node of driving TFT 250 and the Vss/source rail; ¶ 0033: the third switch’s other end “is connected to the gate of the driving thin film transistor 650 and one end of the capacitor 660,” while “the other end of the capacitor 660 and the source of the driving film transistor 650 are connected to a positive power source Vdd”]; a calibration transistor (406) [Lin: Figs.3 or 6: second switch 220] configured to couple the gate terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] to a drain terminal of the current-source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] during a calibration period [Lin: Figs.3 or 6: second switch 220 connects one end to the current source and the other to the drain of driving TFT 250; ¶ 0033: “On end of the third switch 630 is connected to the drain of the driving thin film transistor 650 and another end of the third switch 630 is connected to the gate of the driving thin film transistor 650”; ¶ 0035: turned on during the driving-voltage adjustment stage, diode-connecting 650]; and a calibration-source transistor (405) [Lin: Figs.3 or 6: second switch 620] configured to couple the drain terminal of the current- source transistor (404) [Lin: Figs.3 or 6: driving TFT 250] [Lin: ¶ 0033: “One end of the second switch 620 is connected to a current source and another end of the second switch 620 is connected to the drain of the driving thin film transistor 650”; Examiner: The “hybrid calibration source” equates to current source plus Vt under BRI, second switch 620 couples the drain to the current branch while Vt reaches the same diode-connected node via pre-charge switch 670 and the closed gate-drain short 630, both jointly charging capacitor 660] However, Lin does not expressly disclose: that the display is a micro-LED display; and the hybrid calibration source coupled to a calibration bit line, with the calibration-source transistor coupling the drain to that single calibration bit line so that the hybrid source charges the storage elements. Takahara discloses: a hybrid calibration source coupled to a calibration bit line (130) [Takahara: ¶ 0477: “outputs from the current tone circuit 154 and voltage tone circuit 231 are controlled by the switches Si and Sp to implement precharge driving (voltage programming)+current programming. The signals for that are applied to the source signal line terminal 242”], and the drain coupled to that bit line so that the source charges the storage element [Takahara: ¶ 0483: “through the voltage application in period A, a predetermined voltage is applied to the gate voltage of the driving transistor 11a of the pixel 16 so that a current of an almost desired value will flow through the EL element 15. Then, the program current in period B causes the current flowing through the EL element 15 to reach a predetermined value.”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the pixel of Lin so that calibration source transistor couples the drive transistor to drain to a single shared calibration bit line over which a voltage source and a current source apply a precharge voltage and then program current, as taught by Takahara (¶¶ 0477m 0483). One of ordinary skill would have been motivated to make this modification in order to bring the drive transistor near the target current quickly by means of the applied voltage and then set the exact calibrated current by means of the program current, all over one shared line, which is consistent with Lin’s own stated goal of reducing the number of wires and power sources. Lin and Takahara are analogues art, both being directed to current calibrated active matrix display pixel driving. Furthermore, Lin in view of Takahara discloses: the limitations as discussed above. However, Lin in view of Takahara does not expressly disclose: the display is a micro-light emitting-diode (micro-LED). Lee discloses: a micro-LED display [Lee: ¶ 0043: “The LED may be a micro LED having a size of 80 μm or less”]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to implement the active matrix display of Lin, as modified by Takahara, with inorganic micro-LED emitters, as taught by Lee, thereby arriving at a micro-LED display comprising Lin’s hybrid calibration source and Lin’s calibration pixel. One of ordinary skill in the art would have been motivated to substitute micro-LEDs for Lin’s organic LEDs in order to obtain the recognized advantages of micro-LEDs, such as higher luminance and longer operating lifetime, while retaining Lin’s current calibration that corrects drive transistor threshold and mobility variation (Lin ¶ 0009), a benefit equally applicable to a micro-LED display. Such substitution of one known emitter for another yields predictable results and requires no change to Lin’s calibration operation. Lin and Lee are analogous art. Regarding claim 22: Lin in view of Takahara discloses: 22. (Original) The micro-LED display according to claim 21, Takahara further discloses: wherein: the hybrid calibration source (200) includes a voltage source and a current source [Takahara ¶ 0477: “outputs from the current tone circuit 154 and voltage tone circuit 231; Examiner: The current tone circuit 154 being a current source and the voltage tone circuit 231 being a voltage source]; the voltage source is coupled to the calibration bit line by a first switch [Takahara: ¶ 0477: “ outputs from the current tone circuit 154 and voltage tone circuit 231 are controlled by the switches Si and Sp”; Examiner: The output of the voltage tone circuit 231 is controlled by the switch Sp and applied to the source signal line terminal 242]; the current source is coupled to the calibration bit line by a second switch [Takahara: ¶ 0477: “ outputs from the current tone circuit 154 and voltage tone circuit 231 are controlled by the switches Si and Sp”; Examiner: The program output from the current tone circuit 154 is controlled by switch Si and applied to the source signal line terminal 242]; the first switch is configured to be CLOSED while the second switch is OPEN during a first phase of the calibration period [Takahara: ¶ 0483: “a voltage is applied to the source signal line 18 by voltage programming for a certain part of a 1H period (indicated by A)”; Examiner: During period A the voltage switch Sp conducts and the current switches Si does not.]; and the second switch is configured to be CLOSED while the first switch is OPEN during a second phase of the calibration period [Takahara: ¶ 0483: “ and then a current is applied by current programming for a period of B”; Examiner: During the subsequent period B the current switch Si conducts and the voltage switch Sp does not. Periods A and B are distinct successive phases, so the voltage switch and current switch are closed in mutually exclusive phases.]. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to couple the voltage source and the current source of the hybrid calibration source to the calibration bit line through respective switches operated in mutually exclusive first and second phases, as taught by Takahara. One of ordinary skill in the art would have been motivated to control the voltage tone circuit and current tone circuit with separate switches (Sp and Si) so that the voltage source is applied to the shared line during a first (voltage-programming) phase and the current source during a second (current-programming) phase (Takahara: ¶¶ 0477, 0483), thereby performing the two-phase voltage-then-current calibration over the single calibration bit line. Lin, Takahara, and Lee are analogues art, all directed to active-matrix display pixel driving. Allowable Subject Matter Claims 7 and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 7: The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein: the blocking transistor (403) is a p-type transistor coupled between the current-source transistor (404) and the isolation transistor (402); and a gate terminal of the blocking transistor (403) is coupled to a ground”, in combination with the other recited claim features. Regarding claim 18: The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein placing the pixel (400) in the calibration mode is based on a schedule, the schedule having a calibration frequency based on a gray-scale resolution of the display”, in combination with the other recited claim features. Regarding claim 19: The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein placing the pixel (400) in the calibration mode is based on a schedule, the schedule having a calibration frequency based on a leakage current of the capacitor”, in combination with the other recited claim features. Regarding claim 20: The prior art does not teach or suggest either singularly or in combination the at least claimed “wherein placing the pixel (400) in the calibration mode is based on a schedule, the schedule having a calibration frequency based on a temperature of the LED”, in combination with the other recited claim features. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. [Nho; Hyunwoo et al., US 20180075798 A1] discloses: “A mobile electronic device includes a display having a pixel and processing circuitry separate from but communicatively coupled to the display. The processing circuitry prepares image data to send to the pixel and adjusts the image data to compensate for operational variations of the display based on feedback received from the display that describes a present operational behavior of the pixel. The mobile electronic device also includes additional electronic components that affect the present operational behavior of the pixel depending on present operational behavior of the additional electronic components,” as recited in the abstract. Inquiry Any inquiry concerning this communication or earlier communications from the examiner should be directed to Koosha Sharifi-Tafreshi whose telephone number is (571)270-5897. The examiner can normally be reached Mon - Fri 8AM to 5PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nitin Patel can be reached at (571) 272-7677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KOOSHA SHARIFI-TAFRESHI/Primary Examiner, Art Unit 2628
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Prosecution Timeline

Sep 10, 2025
Application Filed
Jul 02, 2026
Non-Final Rejection mailed — §102, §103 (current)

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