DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on April 4, 2025 was filed after the mailing date of the application on April 4, 2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The disclosure is objected to because of the following informalities: Paragraph [0001] on p. 1 of Applicant’s disclosure recites “…U.S. Patent Application No. 18,601,739, filed March 11, 2024, which is a continuation of…” where it should instead recite “…U.S. Patent Application No. 18,601,739, filed March 11, 2024, now U.S. Patent No. 12,314,833, which is a continuation of…”
Appropriate correction is required.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
Claim 20 uses the word “means” and thus is being interpreted under 35 U.S.C. 112(f).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 6, 10, 11, 16, 19, and 20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lupon (US009978014B2).
As per Claim 1, Lupon teaches a processing device comprising: a plurality of weight registers (308, Fig. 3A) for receiving and storing a first plurality of values (number of registers 308.1-308.4 for storing weights, col. 4, lines 62-64); a first multiplier (306.1) configured to receive a first value of the first plurality of values; and a second multiplier (306.2) configured to receive a second value of the first plurality of values; one or more inputs configured to receive a second plurality of values; and a plurality of multiplexers (310) configured to receive the second plurality of values and respectively route a third value of the second plurality of values to the first multiplier, and a fourth value of the second plurality of values to the second multiplier, wherein the first multiplier is configured to perform a first multiplication of the first value by the third value, and the second multiplier is configured to perform a second multiplication of the second value by the fourth value, wherein the first multiplication is configured to be performed concurrently with the second multiplication (number of registers 308.1-308.4 for storing weights and a number of multiplexers 310.1-310.6 which control when input signals and weight parameters are available to multipliers 306.1-306.4, col. 4, lines 62-66; each of multipliers 306.1-306.4 may include a first input to receive a value of the input signal and a second input to receive a weight, multipliers 306.1-306.4 may perform multiplication operation of inputs, col. 5, lines 5-9; multipliers 306.1-306.4 may operate in parallel, col. 5, line 35).
As per Claim 6, Lupon teaches wherein a first one of the plurality of multiplexers (310.1, Fig. 3A) is coupled to a first adder (314.1) and a second one of the plurality of multiplexers (310.4) is coupled to a second adder (314.3) (number of multiplexers 310.1-310.6 which control when input signals and weight parameters are available to multipliers 306.1-306.4, col. 4, lines 64-66; adders for summing products from outputs of multipliers 306.1-306.4, adders are carry-save adder 314.1-314.4, col. 5, lines 12-15; Fig. 3A shows that first multiplexer 310.1 is coupled to multiplier 306.1 which is coupled to first adder 314.1, and second multiplexer 310.4 is coupled to multiplier 306.3 which is coupled to second adder 314.3).
As per Claim 10, Lupon teaches further comprising: an adder circuitry (304, Fig. 3A) configured to generate a first sum by adding at least a portion of a product generated by the first multiplier (306.1) (reconfigurable accumulator 304 may include a network of adders for summing products from outputs of multipliers 306.1-306.4, col. 5, lines 11-13).
As per Claims 11, 16, and 19, these claims are similar in scope to Claims 1, 6, and 10 respectively, and therefore are rejected under the same rationale. As per Claim 20, Claim 20 is similar in scope to Claim 1, and therefore is rejected under the same rationale.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2-5 and 12-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lupon (US009978014B2) in view of Martin (US 20190147327A1).
As per Claim 2, Lupon is relied upon for the teachings as discussed above relative to Claim 1.
However, Lupon does not teach further comprising: a control device configured to identify data associated with the second plurality of values and transmit a third plurality of values to the plurality of multiplexers, and the plurality of multiplexers are configured to route the second plurality of values based on the third plurality of values. However, Martin teaches further comprising: a control device configured to identify data associated with the second plurality of values and transmit a third plurality of values to the plurality of multiplexers, and the plurality of multiplexers are configured to route the second plurality of values based on the third plurality of values (control block 304 may be configured to identify whether each input datum or its respective weight are zero, if either the input datum or its respective weight are zero, the datum-weight pair is skipped and not processed, the next non-zero operation may instead be performed on the same cycle, this can be achieved through the use of multiplexers 304 and 308 which are configured to pass to the multiplication logic 309 (multiplier) only on those datum-weight pairs where both the datum and weight are non-zero, [0140]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lupon to include a control device configured to identify data associated with the second plurality of values and transmit a third plurality of values to the plurality of multiplexers, and the plurality of multiplexers are configured to route the second plurality of values based on the third plurality of values because Martin suggests that if the sparsity is high many of the operations are skipped, and the total number of cycles taken to process the neuron is much reduced [0140].
As per Claim 3, Lupon does not teach wherein the data is indicative of one or more of the second plurality of values that are zero. However, Martin teaches wherein the data is indicative of one or more of the second plurality of values that are zero [0140]. This would be obvious for the reasons given in the rejection for Claim 2.
As per Claim 4, Lupon does not teach wherein the routing is configured to skip the one or more of the second plurality of values that are zero. However, Martin teaches wherein the routing is configured to skip the one or more of the second plurality of values that are zero [0140]. This would be obvious for the reasons given in the rejection for Claim 2.
As per Claim 5, Lupon does not teach wherein the third value and the fourth value are each nonzero values. However, Martin teaches wherein the third value and the fourth value are each nonzero values [0140]. This would be obvious for the reasons given in the rejection for Claim 2.
As per Claims 12-15, these claims are similar in scope to Claims 2-5 respectively, and therefore are rejected under the same rationale.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lupon (US009978014B2) in view of Langhammer (US007230451B1).
Lupon is relied upon for the teachings as discussed above relative to Claim 1.
However, Lupon does not teach wherein the first multiplier and the second multiplier are configured in a column. However, Langhammer teaches wherein the first multiplier and the second multiplier are configured in a column (plurality of multipliers arranged in column, col. 16, line 13).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lupon so that the first multiplier and the second multiplier are configured in a column as suggested by Langhammer. It is well-known in the art that this tight layout optimizes data routing, drastically reduces electrical latency, and allows for efficient processing such as executing multiply-accumulate instructions.
23. Claim(s) 8, 9, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lupon (US009978014B2) in view of Ross (US 20180046907A1).
24. As per Claim 8, Lupon is relied upon for the teachings as discussed above relative to Claim 1.
However, Lupon does not teach wherein the first plurality of values are configured to be divided into a first set of values and a second set of values. However, Ross teaches wherein the first plurality of values are configured to be divided into a first set of values and a second set of values (divide the sets of weight inputs into portions having fewer sets of weight inputs than a number of columns in the array, [0057]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lupon so that the first plurality of values are configured to be divided into a first set of values and a second set of values because Ross suggests that this way, all of the weight values are divided and distributed to be processed, so that all of the weight values are processed [0057].
25. As per Claim 9, Lupon does not teach wherein the second plurality of values are configured to be divided into a first subarray and a second sub array, wherein the third value is included in the first subarray and the fourth value is included in the second subarray. However, Ross teaches wherein the second plurality of values are configured to be divided into a first subarray and a second sub array, wherein the third value is included in the first subarray and the fourth value is included in the second subarray (divide the sets of activation inputs into portions so that each portion has a size less than or equal to a number of rows in the array, [0053]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lupon so that the second plurality of values are configured to be divided into a first subarray and a second sub array, wherein the third value is included in the first subarray and the fourth value is included in the second subarray because Ross suggests that this way, all of the second plurality of values are divided and distributed to be processed, so that all of the second plurality of values are processed [0053].
26. As per Claim 18, Claim 18 is similar in scope to Claim 9, and therefore is rejected under the same rationale.
27. Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lupon (US009978014B2) in view of Langhammer (US007230451B1) and Ross (US 20180046907A1).
Lupon is relied upon for the teachings as discussed above relative to Claim 11.
However, Lupon does not teach wherein the first multiplier and the second multiplier are configured in a column. However, Langhammer teaches this limitation, as discussed in the rejection for Claim 7.
However, Lupon and Langhammer do not teach the first plurality of values are configured to be divided into a first set of values and a second set of values. However, Ross teaches this limitation, as discussed in the rejection for Claim 8.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONI HSU whose telephone number is (571)272-7785. The examiner can normally be reached M-F 10am-6:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kee Tung can be reached at (571)272-7794. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JH
/JONI HSU/Primary Examiner, Art Unit 2611
