Prosecution Insights
Last updated: August 17, 2026
Application No. 19/171,745

SYSTEM AND METHOD FOR TRANSMITTING SIGNALS BETWEEN AT LEAST ONE CONTROLLER AND TARGET DEVICES ON MULTIPLE BUS SEGMENTS THROUGH A HUB DEVICE

Non-Final OA §103
Filed
Apr 07, 2025
Priority
Apr 08, 2024 — CN 202410414310.1
Examiner
OBERLY, ERIC T
Art Unit
Tech Center
Assignee
NXP Semiconductors N.V.
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
1y 4m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
448 granted / 606 resolved
+13.9% vs TC avg
Moderate +15% lift
Without
With
+14.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
21 currently pending
Career history
619
Total Applications
across all art units

Statute-Specific Performance

§101
5.1%
-34.9% vs TC avg
§103
53.3%
+13.3% vs TC avg
§102
24.1%
-15.9% vs TC avg
§112
13.5%
-26.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 606 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 8-9, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Anderson et al. (US Patent No. 6636924), hereinafter referred to as Anderson, in view of Tailliet et al. (US Pub. No. 2014/0347931), hereinafter referred to as Tailliet. Referring to claim 1, Anderson discloses a hub device (fig. 1, 4-port hub) comprising: a plurality of drivers coupled a plurality of target ports that are configured to be operably coupled to bus segments (a driver on each port of the bus that drives a corresponding segment of the bus; col. 1, lines 55-60); a receiver coupled to the plurality of target ports (which port is receiving a driving signal; col. 2, lines 10-15); an input/output driver controller coupled to the plurality of drivers to enable and disable the drivers (hub selectively enables only one port as a receiving port; col. 2, lines 15-20), the input/output driver controller also being coupled to the receiver to receive values on any of the bus segments via the target ports (and forces all other ports to a transmit state; col. 2, lines 15-20). While Anderson teaches the input/output driver controller, at least one controller port, and transmitting data between the at least one controller port and the target ports via input/output driver controller (conventional hub selectively…forces all other ports to a transmit state, wherein these other ports transmit the data received at the receiving port to their corresponding bus segment; col. 2, lines 10-20), Anderson is silent regarding a frame decoder. However, Tailliet discloses a frame decoder (Decoders 32 and 33 are controlled by a logic circuit 34 (CTRL) which receives the frames of bus I2C and decodes them, [0054]) Anderson and Tailliet are analogous art because they are from the same field of endeavor, bus architecture. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Anderson and Tailliet before him or her, to modify the hub of Anderson to include the frame decoder of Tailliet because decoding circuitry is well-known and common to communication bus architecture, and the prior art of Anderson and Tailliet demonstrate that the prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference; one of ordinary skill in the art could have combined the hub and frame decoder elements as claimed by known methods, and that in combination, each element merely performs the same function as it does separately; and one of ordinary skill in the art would have recognized that the results of the combination were predictable hub bus architecture with frame decoding functionality. The rationale to support a conclusion that the claim would have been obvious is that all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination yielded nothing more than predictable results to one of ordinary skill in the art. KSR, 550 U.S. at 416, 82 USPQ2d at 1395 (see MPEP 2143.I.A). Therefore, it would have been obvious to combine Anderson and Tailliet to obtain the invention as specified in the instant claim. As to claim 8, Anderson discloses the receiver is operably coupled to each of the target ports (which port is receiving a driving signal; col. 2, lines 10-15). As to claim 9, Anderson discloses each of the drivers includes an open-drain transistor (output of each device is configured as an open-collector/open-drain device; col. 1, lines 25-30). Referring to claim 17, Anderson discloses a hub device (fig. 1, 4-port hub 150) comprising: a plurality of drivers coupled a plurality of target ports that are configured to be operably coupled to bus segments (a driver on each port of the bus that drives a corresponding segment of the bus; col. 1, lines 55-60) coupled to target devices (fig. 1, devices 110) each of the drivers being coupled to a unique target port among the target ports (a driver on each port; col. 1, lines 55-60); a receiver coupled to the plurality of target ports to read values on the bus segments via the target port (which port is receiving a driving signal; col. 2, lines 10-15); an input/output driver controller coupled to the plurality of drivers to collectively enable and disable the drivers (hub selectively enables only one port as a receiving port; col. 2, lines 15-20), the input/output driver controller also being coupled to the receiver to receive values on any of the bus segments via the target ports (and forces all other ports to a transmit state; col. 2, lines 15-20). While Anderson teaches the input/output driver controller, at least one controller port via a controller, and transmitting data between the at least one controller port and the target devics via input/output driver controller (conventional hub selectively…forces all other ports to a transmit state, wherein these other ports transmit the data received at the receiving port to their corresponding bus segment; col. 2, lines 10-20), Anderson is silent regarding a frame decoder. However, Tailliet discloses a frame decoder (Decoders 32 and 33 are controlled by a logic circuit 34 (CTRL) which receives the frames of bus I2C and decodes them, [0054]) Anderson and Tailliet are analogous art because they are from the same field of endeavor, bus architecture. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Anderson and Tailliet before him or her, to modify the hub of Anderson to include the frame decoder of Tailliet because decoding circuitry is well-known and common to communication bus architecture, and the prior art of Anderson and Tailliet demonstrate that the prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference; one of ordinary skill in the art could have combined the hub and frame decoder elements as claimed by known methods, and that in combination, each element merely performs the same function as it does separately; and one of ordinary skill in the art would have recognized that the results of the combination were predictable hub bus architecture with frame decoding functionality. The rationale to support a conclusion that the claim would have been obvious is that all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination yielded nothing more than predictable results to one of ordinary skill in the art. KSR, 550 U.S. at 416, 82 USPQ2d at 1395 (see MPEP 2143.I.A). Therefore, it would have been obvious to combine Anderson and Tailliet to obtain the invention as specified in the instant claim. Allowable Subject Matter Claims 10-16 are allowed. Claims 2-7 and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: As to claim 2, the prior art of record does not appear to anticipated, explicitly teach, or fairly suggest “wherein the input/output driver controller is operable to collectively disable the drivers during a time window to allow target devices to drive the bus segments”, which in conjunction with all other limitations of the claim captures a functional step of the core inventive concept in which a hub device temporarily disables its segment drivers during a controlled time window so target devices can assert their values as described in the Applicant’s Specification paragraphs [0004-0005] and [0057-0063]. Furthermore, it would not have been obvious to combine the above limitations with the remaining limitations of the claim. Claims 3-7 are directly dependent from claim 2 and are therefore distinct from the prior art. As to claim 18, the prior art of record does not appear to anticipated, explicitly teach, or fairly suggest “wherein the input/output driver controller is operable to collectively disable the drivers during a time window to allow target devices to drive the bus segments”, which in conjunction with all other limitations of the claim captures a functional step of the core inventive concept in which a hub device temporarily disables its segment drivers during a controlled time window so target devices can assert their values as described in the Applicant’s Specification paragraphs [0004-0005] and [0057-0063]. Furthermore, it would not have been obvious to combine the above limitations with the remaining limitations of the claim. Claims 19-20 are directly dependent from claim 18 and are therefore distinct from the prior art. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The US Pub. No. 2025/0156351 of Sancon et al. is pertinent to I3C hub architecture and address assignment, the US Pub. No. 2017/0371830 of Pitigoi-Aron et al. is pertinent to I2C line driver enabling and disabling functionality, and the US Pub. No. 2007/0276977 of Coteus et al. is pertinent to I2C hub architecture and I/O driver characteristics. The examiner has cited particular column, line, and/or paragraph numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in its entirety as potentially teaching of all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R. 1.111(c). Applicants seeking an interview with the examiner, including WebEx Video Conferencing, are encouraged to fill out the online Automated Interview Request (AIR) form (http://www.uspto.gov/patent/uspto-automated-interview-request-air-form.html). See MPEP §502.03, §713.01(11) and Interview Practice for additional details. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC T OBERLY whose telephone number is (571)272-6991. The examiner can normally be reached on M-F 800am-430pm (MT). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dr. Henry Tsai can be reached on (571) 272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Center. For more information about the Patent Center, see https://patentcenter.uspto.gov/. Should you have questions on access to the Patent Center system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC T OBERLY/ Primary Examiner, Art Unit 2184
Read full office action

Prosecution Timeline

Apr 07, 2025
Application Filed
Jul 13, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12675228
MEMORY SYSTEM AND METHOD FOR OPERATING THE SAME
1y 10m to grant Granted Jul 07, 2026
Patent 12657143
DIRECT MEMORY ACCESS (DMA) ENGINE PROCESSING DATA TRANSFER TASKS IN PARALLEL
3y 9m to grant Granted Jun 16, 2026
Patent 12657140
METHOD FOR CONTROLLING A TARGET MEMORY BY PROGRAMMABLY SELECTING AN ACTION EXECUTION CIRCUIT MODULE CORRESPONDING TO A TRIGGERED PRESET STATE
1y 8m to grant Granted Jun 16, 2026
Patent 12650943
FEATURE MANAGEMENT FOR INPUT/OUTPUT (I/O) ADAPTERS
1y 12m to grant Granted Jun 09, 2026
Patent 12645620
Cross-die Interconnection Monitor Method and Cross-die Interconnection Monitor System Capable of Extracting Cross-die Interconnection Data for Multi-die Packages
1y 6m to grant Granted Jun 02, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
89%
With Interview (+14.9%)
2y 9m (~1y 4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 606 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month