DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 04/09/2025, 01/18/2025, and 03/11/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 8-10 are rejected under 35 U.S.C. 102 (a) (2) as being anticipated by Kobayashi (US 2024/0395839 to Kobayashi et al).
Regarding claim 1, Kobayashi discloses a photoelectric conversion apparatus (photoelectric conversion device 100) (Kobayashi, fig. 1) comprising:
a plurality of pixels arranged across a plurality of rows and a plurality of columns (pixel array 10) (Kobayash, fig. 1);
a plurality of column circuits (column circuits 42A, 42B) corresponding to the plurality of columns respectively (Kobayashi, figs. 1, 14, par [0118-0119]); and
a control portion (readout circuit 40A) (Kobayashi, fig. 1), wherein
each of the plurality of column circuits (column circuits 42A, 42B) includes:
a comparison circuit (comparison circuit 54) including a first input node (node connected to vertical output line 20A) to which a pixel signal is input from a plurality of pixels in a column corresponding thereto, and a second input node (node connected to buffer circuits 74, 76) to which a reference signal is input (Kobayashi, figs. 1, 14, par [0151], wherein reference signals and pixel signal via line 20a are received by comparison circuit 54); and
a buffer circuit (buffer circuits 74, 76) including an output node (node coupled to comparison circuit 54) for outputting the reference signal to the comparison circuit of the column corresponding thereto (Kobayashi, figs. 1, 14, par [0151], wherein output of buffer circuit 74 or 76 is coupled to comparison circuit 54), and
the control portion (readout circuit 40A) (Kobayashi, fig. 1) is capable of controlling a potential (vrampl or vramph) of the output node of the buffer circuit included in each of the plurality of column circuits to a predetermined potential (vrampl or vramph) (Kobayashi, figs. 1, 14, par [0151], wherein buffer circuits 74 and 76 have different potential vrampl or vramph).
Regarding claim 8, Kobayashi discloses aforementioned limitations of the parent claim. Additionally, Kobayahi discloses:
a signal processing portion (signal processing 208) configured to generate an image by using a signal output from the photoelectric conversion apparatus (Kobayashi, figs. 1, and 16-18, wherein an image is generated based on output from the photoelectric conversion device 100).
Regarding claim 9, Kobayashi discloses aforementioned limitations of the parent claim. Additionally, Kobayahi discloses a moving body (vehicle) comprising the photoelectric conversion apparatus according to claim 1 (see claim 1 above), the moving body comprising a control portion (control ECU 330) configured to control movement of the moving body by using a signal output from the photoelectric conversion apparatus (Kobayashi, figs. 17a, 17b, par [0172-0173], wherein the vehicle is controlled based on imaging system 300).
Regarding claim 10, Kobayashi discloses aforementioned limitations of the parent claim. Additionally, Kobayahi discloses equipment (equipment EQP) (Kobayashi, fig. 18, par [0178-0183]) comprising:
the photoelectric conversion apparatus according to claim 1 (see claim 1 above); and at least any of:
an optical apparatus (OPT) corresponding to the photoelectric conversion apparatus (APR) (Kobayashi, fig. 18, par [0178-0183])
a control apparatus (CTRL) that controls the photoelectric conversion apparatus ) (Kobayashi, fig. 18, par [0178-0183]);
a processing apparatus (PRCS) that processes a signal output from the photoelectric conversion apparatus (Kobayashi, fig. 18, par [0178-0183]);
a display apparatus (DSPL) that displays information obtained by the photoelectric conversion apparatus (Kobayashi, fig. 18, par [0178-0183]);
a storage apparatus (MMRY) that stores information obtained by the photoelectric conversion apparatus (Kobayashi, fig. 18, par [0178-0183]); and
a mechanical apparatus (MCHN) that operates on a basis of information obtained by the photoelectric conversion apparatus (Kobayashi, fig. 18, par [0178-0183]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Kobayashi (US 2024/0395839 to Kobayashi et al) in view of Endo (US 2016/0373675).
Regarding claim 5, Kobayashi discloses aforementioned limitations of the parent claim. However, Kobayahi does not discloses:
wherein the predetermined potential is GND.
On the other hand, in the same endeavor, Endo disclsoes
wherein the predetermined potential is GND (ground voltage) (Endo, fig. 6A, par [0080] wherein buffer 301 generates an output of ground voltage upon receiving a ground voltage).
Therefore, it would have been obvious to an artisan before the effective filing date of the current application to incorporate the disclosure by Endo into the apparatus by Kobayashi so as to achieve the invention as claimed because such incorporation improves image quality by eliminating noise, e.g., vertical stripes (Endo, par [0007]).
Allowable Subject Matter
Claims 2, 3, 4, 6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 2, the prior art of record neither anticipates nor renders obvious, in combination with other claim limitations, the claim language of “wherein the control portion is configured to, during a period in which a power consumption of the buffer circuit of at least one of the plurality of column circuits is controlled to be less than a power consumption of the buffer circuits of at least another one of the plurality of column circuits, control a potential of the output node of the buffer circuit of the at least one of the plurality of column circuits to the predetermined potential.”
Regarding claim 3, the prior art of record neither anticipates nor renders obvious, in combination with other claim limitations, the claim language of “wherein the control portion is configured to, during a period in which a power consumption of the buffer circuit included in the column circuit corresponding to one of an odd-numbered column and an even-numbered column among the plurality of column circuits is controlled to be less than a power consumption of the buffer circuit included in the column circuit corresponding to the other of the odd-numbered column and the even-numbered column, control a potential of the output node of the buffer circuit included in the column circuit corresponding to the one of the odd-numbered column and the even-numbered column to the predetermined potential.”
Regarding claims 4 and 6, the claims are objected as being dependent on claim 1.
Regarding claim 7, the prior art of record neither anticipates nor renders obvious, in combination with other claim limitations, the claim language of “wherein during a period in which first scan is performed to read out a signal from pixels in a portion of the rows among the plurality of rows, second scan is performed to read out a signal from a pixel in a different portion of the rows among the plurality of rows, and a period from start to end of the second scan is shorter than a period from start to end of the first scan.”
Claim 11 is allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 11, the prior art of record neither anticipates nor renders obvious, in combination with other claim limitations, the claim language of “a buffer circuit including an output node for outputting the reference signal to the comparison circuit of the column corresponding thereto, and the method comprises: controlling the buffer circuit by the control portion between a first state in which the buffer circuit operates and a second state in which a power consumption of the buffer circuit is less than that in the first state; and setting by the control portion a potential of the output node of the buffer circuit to a predetermined potential during a period in which the buffer circuit is controlled to the second state.”
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN H LE whose telephone number is (571)270-1130. The examiner can normally be reached Mon-Fri 9:00 am- 5:30 pm.
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/TUAN H LE/Examiner, Art Unit 2638
/LIN YE/Supervisory Patent Examiner, Art Unit 2638
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