Prosecution Insights
Last updated: July 17, 2026
Application No. 19/174,587

Log-Based Coordination of Operations of a Host System to Reduce Garbage Collection in a Data Storage Device

Non-Final OA §102§103§112
Filed
Apr 09, 2025
Priority
May 08, 2024 — provisional 63/644,318
Examiner
VERDERAMO III, RALPH A
Art Unit
2139
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
1y 9m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
337 granted / 426 resolved
+24.1% vs TC avg
Moderate +9% lift
Without
With
+9.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
9 currently pending
Career history
441
Total Applications
across all art units

Statute-Specific Performance

§101
3.8%
-36.2% vs TC avg
§103
75.9%
+35.9% vs TC avg
§102
8.1%
-31.9% vs TC avg
§112
6.4%
-33.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 426 resolved cases

Office Action

§102 §103 §112
CTNF 19/174,587 CTNF 82557 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Objections 07-29-01 AIA Claim 11 is objected to because of the following informalities: Line 3 states, “…identified from the log page retrieved at a plurality time instances …” Examiner believes that grammatically, this should instead be “at a plurality of time instances” . Appropriate correction is required. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 7 recites the limitation "wherein the communicating includes…" in line 1. There is insufficient antecedent basis for this limitation in the claim. While claim 1 previously provided support for this limitation the amendment moved “communicating” to a different dependent claim. Claim 20 recites the limitation "extracting, by the host system and from the garbage collection plan in the log page…" in line 3. There is insufficient antecedent basis for this limitation in the claim. “Garbage collection plan” was not used in claims 18 or 19, from which claim 20 depends. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-03-aia AIA Claim s 1, 12, and 18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Jones et al. US Patent Application Publication No. 2025/0085862 (herein after referred to as Jones) . Regarding claim 1 , Jones describes a method, comprising: writing, by a host system, data of storage space tenants to a memory sub-system (The host device 102 may issue data access commands (e.g., load/read, or store/write commands) to the storage device 104 over the host interface 106… (page 3, paragraph [0038]). ...The FDP protocol may allow the host processor 108 to tag writes to specific RUs so that the storage controller 120 may align data from multiple applications (page 4, paragraph [0050])) ; retrieving, by the host system, a log page in the memory sub-system (…the storage controller 112 monitors and logs different types of log data… (page 6, paragraph [0074]). …the storage memory 114 stores log data in one or more data structures 200. The data structures 200 may be stored, for example, in a shared portion 202 of the storage memory 114, such as, for example, a device cache. In some embodiments, the shared portion 202 of the storage memory 114 (e.g., the device cache) is exposed to the host processor 108. The host processor 108 may access and store the shared data structures 200 in a host cache 204 of the host memory 110 (page 4, paragraph [0047])) ; extracting, by the host system and from the log page, an indicator of usage level of storage resources in the memory sub-system (The monitored information may also include, for example, other data and statistics of the storage device 104. For example, the other device data may include, without limitation, temperature of the storage device, endurance estimate associated with the storage device (based on determining the number of write operations to the memory blocks), individual errors associated with underlying RUs (e.g., storage blocks mapped to the RUs), and/or other utilization statistics of the storage device. The other device data may also be stored in the shared data structures 200 (page 4, paragraph [0054])) ; and determining, by the host system, that the indicator meets a first condition (In some embodiments, the hint engine 208 is configured to periodically (e.g., on a regular or irregular basis) monitor the log data stored in the shared data structures 200 and provide a hint or recommendation for a drive activity to be performed by the storage controller 112… The rule may indicate a condition that triggers the recommendation. For example, a condition that triggers a GC recommendation may be that a number of available memory blocks (e.g., RUs) of the NVM 116 are below a first threshold (page 5, paragraph [0056])) . Regarding claim 12 , Jones describes a memory sub-system, comprising: a host interface (…the host device 102 may be connected to the storage device 104 over a host interface 106 (page 3, paragraph [0038])) ; memory cells having a storage capacity (…the FTL 120 may engage in wear leveling to move data around the storage cells of the NVM 116 to evenly distribute the writes to the NVM 1116 (page 4, paragraph [0045])) ; and a controller configured to provide data storage services over the host interface using the storage capacity; wherein the controller is configured to (storage controller 112 (page 6, paragraph [0074]). See also, Fig. 1) : determine a first usage level of the memory cells (…For example, the storage controller 112 may monitor usage of the memory blocks of the NVM 116 and update the filled table 500 and the free table 400 accordingly (page 6, paragraph [0074])) . Regarding claim 18 , Jones describes a non-transitory computer storage medium storing instructions which, when executed in a host system of a computing device, cause the host system to perform a method (Thus, it should be understood that each block of the block diagrams and flow diagrams may be implemented in the form of a computer program product… computing devices, computing entities, and/or the like carrying out instructions… on a computer-readable storage medium for execution (page 2, paragraph [0030])) , comprising: retrieving a log page from a memory sub- system (…the storage controller 112 monitors and logs different types of log data… (page 6, paragraph [0074]). …the storage memory 114 stores log data in one or more data structures 200. The data structures 200 may be stored, for example, in a shared portion 202 of the storage memory 114, such as, for example, a device cache. In some embodiments, the shared portion 202 of the storage memory 114 (e.g., the device cache) is exposed to the host processor 108. The host processor 108 may access and store the shared data structures 200 in a host cache 204 of the host memory 110 (page 4, paragraph [0047])) ; extracting, from the log page, an indicator of usage level of storage resources in the memory sub-system (The monitored information may also include, for example, other data and statistics of the storage device 104. For example, the other device data may include, without limitation, temperature of the storage device, endurance estimate associated with the storage device (based on determining the number of write operations to the memory blocks), individual errors associated with underlying RUs (e.g., storage blocks mapped to the RUs), and/or other utilization statistics of the storage device. The other device data may also be stored in the shared data structures 200 (page 4, paragraph [0054])) ; and determining that the indicator meets a first condition (In some embodiments, the hint engine 208 is configured to periodically (e.g., on a regular or irregular basis) monitor the log data stored in the shared data structures 200 and provide a hint or recommendation for a drive activity to be performed by the storage controller 112… The rule may indicate a condition that triggers the recommendation. For example, a condition that triggers a GC recommendation may be that a number of available memory blocks (e.g., RUs) of the NVM 116 are below a first threshold (page 5, paragraph [0056])) . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim s 2 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Jones in view of Horspool et al. US Patent Application Publication No. 2025/0110869 (herein after referred to as Horspool) . Regarding claim 2 , Jones describes the method of claim 1 (see above) , further comprising: wherein the log page is configured to further provide health information, error information, or vendor specific information, or any combination thereof (For example, the storage device may maintain information on available memory blocks, filled memory blocks, whether the filled blocks are valid or invalid, statistics about storage utilization, temperature inside the SSD, and/or other control and statistical information (also referred to as log information or log data). The temperature may include data temperature based on frequency of access of data (e.g., hot data being accessed more frequently than cold data)) and/or the physical temperature within the SSD (page 2, paragraph [0031]). The monitored information may also include, for example, other data and statistics of the storage device 104. For example, the other device data may include, without limitation, temperature of the storage device, endurance estimate associated with the storage device (based on determining the number of write operations to the memory blocks), individual errors associated with underlying RUs (e.g., storage blocks mapped to the RUs), and/or other utilization statistics of the storage device. The other device data may also be stored in the shared data structures 200 (page 4, paragraph [0054])) . Jones discloses that the FDP protocol may allow the host processor 108 to tag writes to specific RUs so that the storage controller 120 may align data from multiple applications. Jones further states, that the host/device cooperation may reduce write amplification, and allow the host to orchestrate GC (page 4, paragraph [0050]) . However, it does not explicitly suggest communicating with the storage space tenants to reduce garbage collection in the memory sub-system. Horspool describes a solid-state drive system with optimized garbage collection. Horspool also states that, in certain implementations, the plurality of data streams originates from (i) multiple streams from different applications running on the host, (ii) multiple streams from multiple instances of a single application, or (iii) multiple streams within a single application (page 2, paragraph [0011]) . Modern data center oriented SSD protocols implement techniques that extend the life of the SSD. Such protocols may have knowledge of the superblock size and manage the data written to superblocks according to the size. The protocol can open many superblocks to allow multiple separate host write streams to write data to the SSD with each superblock containing data from a single stream. The protocol will write data to a superblock, allow reads to the superblock and then delete all the data in the superblock with a single command. This reduces the amount of garbage collection required before the NAND blocks of the deleted data can be erased. An important element of the protocol is that superblocks contain data from a single stream, that is, superblocks do not contain a mix of data from different streams. This reduction of garbage collection based on single stream data superblocks and deallocation before writing will mean that the host can write much more data to the SSD before the drive wears out since the write amplification will be reduced compared to a standard SSD (page 2, paragraph [0019]) . The new garbage collection function of the present disclosure, garbage collection is only performed on superblocks from bad streams that do not obey the key rules. This will reduce the overall write amplification by identifying bad streams and garbage collecting only the bad streams (page 5, paragraph [0032]) . However, a person of ordinary skill in the art would understand that other rules or criteria may be used to determine a “bad stream” without departing from the scope of the present disclosure. According to embodiments of the present disclosure, once the bad data stream is identified, garbage collection is only performed on the superblocks associated with memory blocks containing invalid data from the bad data stream. No garbage collection is performed on superblocks associated with memory blocks containing valid data from good data streams (page 5, paragraph [0032]) . Therefore, it would have been obvious to a person of ordinary skill in the computer art before the effective filing date of the claimed invention to incorporate the Horspool teachings in the Jones system. Skilled artisan would have been motivated to incorporate the method of implementing targeted garbage collection as taught by Horspool in the Jones system for effectively reducing write amplification and improving SSD performance. In addition, both of the references teach features that are directed to analogous art and they are directed to the same field of endeavor, such as reducing write amplification. This close relation between both of the references highly suggests an expectation of success. Regarding claim 3 , Jones in view of Horspool describe the method of claim 2 (see above) , wherein the data of the storage space tenants are written into the memory sub-system according to a nonvolatile memory express (NVMe) protocol (The storage device 104 may be communicably connected to the host device 102 over the host interface 106. The host interface 106 may facilitate communications (e.g., using a connector and a protocol) between the host device 102 and the storage device 104. In some embodiments, the host interface may facilitate the exchange of storage or memory requests and responses between the host device 102 and the storage device 104… Non Volatile Memory Express (NVMe)… (Jones, page 3, paragraph [0041]). Modern data center oriented SSD protocols implement techniques that extend the life of the SSD. An example of such a protocol is the NVMe Flexible Data Placement (FDP) mode… (Horspool, page 2, paragraph [0019])) . 07-21-aia AIA Claim s 4 – 6, 13, 15 – 17 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Jones in view of Byun US Patent No. 11113189 (herein after referred to as Byun) . Regarding claim 4 , Jones describes the method of claim 1 (see above) , wherein the indicator of the usage level identifies a current usage level of storage resources in the memory sub-system at a time of writing the log page by the memory sub-system (…the storage controller 112 monitors and logs different types of log data… (page 6, paragraph [0074]). …the storage memory 114 stores log data in one or more data structures 200. The data structures 200 may be stored, for example, in a shared portion 202 of the storage memory 114, such as, for example, a device cache. In some embodiments, the shared portion 202 of the storage memory 114 (e.g., the device cache) is exposed to the host processor 108. The host processor 108 may access and store the shared data structures 200 in a host cache 204 of the host memory 110 (page 4, paragraph [0047]). …For example, the storage controller 112 may monitor usage of the memory blocks of the NVM 116 and update the filled table 500 and the free table 400 accordingly (page 6, paragraph [0074]). …For example, the storage controller 112 may monitor usage of the memory blocks of the NVM 116 and update the filled table 500 and the free table 400 accordingly (page 6, paragraph [0074])) . Jones discloses that the FDP protocol may allow the host processor 108 to tag writes to specific RUs so that the storage controller 120 may align data from multiple applications. Jones further states, that the host/device cooperation may reduce write amplification, and allow the host to orchestrate GC (page 4, paragraph [0050]) . Finally, Jones describes that the storage device may maintain information on available memory blocks, filled memory blocks, whether the filled blocks are valid or invalid, statistics about storage utilization, temperature inside the SSD, and/or other control and statistical information (also referred to as log information or log data) (page 2, paragraph [0031]) . However, it does not explicitly suggest the log page further includes a garbage collection plan. Byun discloses a memory system that performs read reclaim and garbage collection. Specifically, if the result of the comparison operation (S850) indicates that the read count value of the memory block MB1 on which the read operation has been performed is less than the first preset value (NO), the read count level determination block 1222C of the read reclaim control block 1222 determines a ratio of the read count value of the memory block MB1 with reference to the first preset value, and generates level information level_info, at step S870. For example, the read count level determination block 1222C may generate the level information as a first level when the read count value of the memory block MB1 on which the read operation has been completed is less than 70% of the first preset value, a second level when the read count value is equal to or greater than 70% and less than 80% of the first preset value, a third level when the read count value is equal to or greater than 80% and less than 90% of the first preset value, and a fourth level when the read count value is equal to or greater than 90% of the first preset value. The generated level information level_info is matched with logical addresses corresponding to the memory block MB1 by the FTL (1221 of FIG. 2), and the matched level information level_info is output to the host 1300 along with the command response signal CMD_response relative to the host command Host_CMD, at step S880. The garbage collection control block 1320 of the host 1300 increases, in response to the command response signal CMD_response, the read count value corresponding to each of the logical addresses LBAs on which the read operation has been completed, and additionally weights, in response to the level information level_info, the read count value of each of the logical addresses LBAs corresponding to the corresponding memory block MB1, at step S890. For example, when the level information level_info is the first level, the logical addresses LBAs corresponding to the related memory block MB1 is not weighted. When the level information level_info is the second level, the logical addresses LBAs corresponding to the related memory block MB1 is weighted. Furthermore, when the level information level_info is a third level, the logical addresses LBAs corresponding to the related memory block MB1 are selected as logical addresses on which the GC operation is to be performed, and information about the addresses is transmitted to the host processor 1310 [Garbage Collection Plan] . In addition, when the level information level_info is a fourth level, the logical addresses LBAs corresponding to the related memory block MB1 are selected as urgent logical addresses required for the GC operation to be immediately performed thereon, and information about the addresses and urgency is transmitted to the host processor 1310. The garbage collection control block 1320 compares the read count value of each of all logical addresses LBAs with the second preset value, at step S900. If a result of the comparison operation (S900) indicates that the read count value of a logical address is equal to or greater than the second preset value (YES), the corresponding logical address is determined as a logical address on which a GC operation is to be performed, and information about the address is transmitted to the host processor 1310. If the result of the comparison operation (S900) indicates that the read count value of a logical address is less than the second preset value (NO), the corresponding logical address is determined to be a logical address on which the GC operation is not to be performed. When the number of logical addresses selected as the subjects of the GC operation by the garbage collection control block 1320 is equal to or greater than a preset value, the host processor 1310 may generate a host command Host_CMD corresponding to a GC operation for the selected logical addresses, at step S910. Furthermore, if information about logical addresses selected as urgent logical addresses for the immediate GC operation by the garbage collection control block 1320 is received, the host processor 1310 may immediately generate a host command Host_CMD corresponding to a GC operation for the urgent logical addresses and output the host command Host_CMD along with the urgent logical addresses to the controller 1200 (column 15, line 9 – column 16, line 18) . As described above, the “level_info” is a representation of the usage level and the target usage level. For example, the read count level determination block may generate the level information as a third level when the read count value [usage level] of the memory block MB1 on which the read operation has been completed is greater than 80% and less than 90% of the first preset value [target usage] . When the level information level_info is a third level, the logical addresses LBAs corresponding to the related memory block MB1 are selected as logical addresses on which the GC operation is to be performed, and information about the addresses is transmitted to the host processor. Finally, the “level_info” is described as being sent to the host. Since the “level_info” levels indicate certain GC responses, such as the third level causing the relevant LBAs to be identified for garbage collection, this may be interpreted as a garbage collection plan. Since Jones also discloses sharing management log data, including statistics about storage utilization, with a host device (Jones, page 2, paragraph [0031] and [0032]) . Therefore, it would have been obvious to a person of ordinary skill in the computer art before the effective filing date of the claimed invention to incorporate the Byun teachings in the Jones system. Skilled artisan would have been motivated to incorporate the method of providing current usage and target usage statistics as taught by Byun in the shared management log data of the Jones system for effectively managing a read count value of each of the memory blocks and generating level information corresponding to the read count value that allows a host to request garbage collection based on said information. In addition, both of the references teach features that are directed to analogous art and they are directed to the same field of endeavor, such as managing garbage collection. This close relation between both of the references highly suggests an expectation of success. Regarding claim 5 , Jones in view of Byun describe the method of claim 4 (see above) , further comprising: extracting, by the host system and from the garbage collection plan in the log page, a target usage level of storage resources in the memory sub-system, wherein the memory sub-system is configured to refrain from garbage collection before the target usage level being reached (…may generate the level information as… a third level when the read count value is equal to or greater than 80% and less than 90% of the first preset value (Byun, column 15, lines 18 – 25) [The level_info represents both the current usage and its comparison to a target usage]. …when the level information level_info is a third level, the logical address LBAs corresponding to the related memory block MB1 are selected as logical addresses on which the GC operation is to be performed, and information about the addresses is transmitted to the host processor (Byun, column 15, lines 48 – 52) [Before the third level is presented the LBAs are not selected for GC]) . Regarding claim 6 , Jones in view of Byun describe the method of claim 5 (see above) , further comprising: extracting, by the host system and from the garbage collection plan in the log page, a logical address, wherein the memory sub-system is scheduled to copy data from first storage resources allocated as media for the logical address to second storage resources after the target usage level being reached (…may generate the level information as… a third level when the read count value is equal to or greater than 80% and less than 90% of the first preset value (Byun, column 15, lines 18 – 25) [The level_info represents both the current usage and its comparison to a target usage]. …when the level information level_info is a third level, the logical address LBAs corresponding to the related memory block MB1 are selected as logical addresses on which the GC operation is to be performed, and information about the addresses is transmitted to the host processor (Byun, column 15, lines 48 – 52) [Before the third level is presented the LBAs are not selected for GC]. The generated level information level_info is matched with logical addresses corresponding to the memory block MB1 by the FTL (1221 of Fig. 2), and the matched level information level_info is output to the host 1300 along with the command response signal CMD_response relative to the host command Host_CMD, at step S880 (Byun, column 15, lines 28 – 33). If a result of the comparison operation (S900) indicates that the read count value of a logical address is equal to or greater than the second preset value (YES), the corresponding logical address is determined as a logical address on which a GC operation is to be performed and information about the address is transmitted to the host processor (Byun, column 15, lines 62 – 67)) . Regarding claim 13 , Jones describes the memory sub-system of claim 12 (see above) , wherein the controller is further configured to: identify, in a log file (…the storage controller 112 monitors and logs different types of log data… (page 6, paragraph [0074]). …the storage memory 114 stores log data in one or more data structures 200. The data structures 200 may be stored, for example, in a shared portion 202 of the storage memory 114, such as, for example, a device cache. In some embodiments, the shared portion 202 of the storage memory 114 (e.g., the device cache) is exposed to the host processor 108. The host processor 108 may access and store the shared data structures 200 in a host cache 204 of the host memory 110 (page 4, paragraph [0047]). …For example, the storage controller 112 may monitor usage of the memory blocks of the NVM 116 and update the filled table 500 and the free table 400 accordingly (page 6, paragraph [0074])) , the first usage level (…For example, the storage controller 112 may monitor usage of the memory blocks of the NVM 116 and update the filled table 500 and the free table 400 accordingly (page 6, paragraph [0074])) . Jones discloses that the FDP protocol may allow the host processor 108 to tag writes to specific RUs so that the storage controller 120 may align data from multiple applications. Jones further states, that the host/device cooperation may reduce write amplification, and allow the host to orchestrate GC (page 4, paragraph [0050]) . Finally, Jones describes that the storage device may maintain information on available memory blocks, filled memory blocks, whether the filled blocks are valid or invalid, statistics about storage utilization, temperature inside the SSD, and/or other control and statistical information (also referred to as log information or log data) (page 2, paragraph [0031]) . However, it does not explicitly suggest identifying, in the log file, a target usage level of the memory cells, wherein the controller is to refrain from garbage collection before the target usage level is reached. Byun discloses a memory system that performs read reclaim and garbage collection. Specifically, if the result of the comparison operation (S850) indicates that the read count value of the memory block MB1 on which the read operation has been performed is less than the first preset value (NO), the read count level determination block 1222C of the read reclaim control block 1222 determines a ratio of the read count value of the memory block MB1 with reference to the first preset value, and generates level information level_info, at step S870. For example, the read count level determination block 1222C may generate the level information as a first level when the read count value of the memory block MB1 on which the read operation has been completed is less than 70% of the first preset value, a second level when the read count value is equal to or greater than 70% and less than 80% of the first preset value, a third level when the read count value is equal to or greater than 80% and less than 90% of the first preset value, and a fourth level when the read count value is equal to or greater than 90% of the first preset value. The generated level information level_info is matched with logical addresses corresponding to the memory block MB1 by the FTL (1221 of FIG. 2), and the matched level information level_info is output to the host 1300 along with the command response signal CMD_response relative to the host command Host_CMD, at step S880. The garbage collection control block 1320 of the host 1300 increases, in response to the command response signal CMD_response, the read count value corresponding to each of the logical addresses LBAs on which the read operation has been completed, and additionally weights, in response to the level information level_info, the read count value of each of the logical addresses LBAs corresponding to the corresponding memory block MB1, at step S890. For example, when the level information level_info is the first level, the logical addresses LBAs corresponding to the related memory block MB1 is not weighted. When the level information level_info is the second level, the logical addresses LBAs corresponding to the related memory block MB1 is weighted. Furthermore, when the level information level_info is a third level, the logical addresses LBAs corresponding to the related memory block MB1 are selected as logical addresses on which the GC operation is to be performed, and information about the addresses is transmitted to the host processor 1310. In addition, when the level information level_info is a fourth level, the logical addresses LBAs corresponding to the related memory block MB1 are selected as urgent logical addresses required for the GC operation to be immediately performed thereon, and information about the addresses and urgency is transmitted to the host processor 1310. The garbage collection control block 1320 compares the read count value of each of all logical addresses LBAs with the second preset value, at step S900. If a result of the comparison operation (S900) indicates that the read count value of a logical address is equal to or greater than the second preset value (YES), the corresponding logical address is determined as a logical address on which a GC operation is to be performed, and information about the address is transmitted to the host processor 1310. If the result of the comparison operation (S900) indicates that the read count value of a logical address is less than the second preset value (NO), the corresponding logical address is determined to be a logical address on which the GC operation is not to be performed. When the number of logical addresses selected as the subjects of the GC operation by the garbage collection control block 1320 is equal to or greater than a preset value, the host processor 1310 may generate a host command Host_CMD corresponding to a GC operation for the selected logical addresses, at step S910. Furthermore, if information about logical addresses selected as urgent logical addresses for the immediate GC operation by the garbage collection control block 1320 is received, the host processor 1310 may immediately generate a host command Host_CMD corresponding to a GC operation for the urgent logical addresses and output the host command Host_CMD along with the urgent logical addresses to the controller 1200 (column 15, line 9 – column 16, line 18) . As described above, the “level_info” is a representation of the usage level and the target usage level. For example, the read count level determination block may generate the level information as a first level when the read count value [usage level] of the memory block MB1 on which the read operation has been completed is less than 70% of the first preset value [target usage] . Finally, the “level_info” is described as being sent to the host. Since Jones also discloses sharing management log data, including statistics about storage utilization, with a host device (Jones, page 2, paragraph [0031] and [0032]) . Therefore, it would have been obvious to a person of ordinary skill in the computer art before the effective filing date of the claimed invention to incorporate the Byun teachings in the Jones system. Skilled artisan would have been motivated to incorporate the method of providing current usage and target usage statistics as taught by Byun in the shared management log data of the Jones system for effectively managing a read count value of each of the memory blocks and generating level information corresponding to the read count value that allows a host to request garbage collection based on said information. In addition, both of the references teach features that are directed to analogous art and they are directed to the same field of endeavor, such as managing garbage collection. This close relation between both of the references highly suggests an expectation of success. Regarding claim 15 , Jones in view of Byun describe the memory sub-system of claim 13 (see above) , wherein the controller is further configured to: provide, in the log file, identifications of targets for garbage collection scheduled after the target usage level is reached (…generates level information level_info, at step S870…a third level when the read count value is equal to or greater than 80% and less than 90% of the first preset value… (Byun, column 15, lines 15 – 25). The generated level information level_info is matched with logical addresses corresponding to the memory block MB1 by the FTL (1221 of Fig. 2), and the matched level information level_info is output to the host 1300 along with the command response signal CMD_response relative to the host command Host_CMD at step S880 (Byun, column 15, lines 28 – 33)) . Regarding claim 16 , Jones in view of Byun describe the memory sub-system of claim 15 (see above) , wherein the identifications of targets include identifications of reclaim units (…the FDP protocol allows data to be written to tan application-specific area of the NVM 116 referred to as a reclaim unit (RU)… The FDP protocol may allow the host processor 108 to tag writes to specific RUs so that the storage controller 120 may align data from multiple applications… (Jones, page 4, paragraph [0050])) . Regarding claim 17 , Jones in view of Byun describe the memory sub-system of claim 15 (see above) , wherein the identifications of targets include identifications of logical addresses having valid data stored in reclaim units scheduled to be erased after the target usage level is reached (Hereinafter, the term block or memory block will be used for referring to both RUs and NVM memory blocks (Jones, page 4, paragraph [0051]). …storage blocks mapped to the RUs… (Jones, page 4, paragraph [0054]). …underlying storage blocks of the RU… (Jones, page 5, paragraph [0057]). …a third level when the read count value is equal to or greater than 80% and less than 90% of the first preset value… (Byun, column 15, lines 15 – 25). …Furthermore, when the level information level_info is a third level, the logical addresses LBAs corresponding to the related memory block MB1 are selected as logical addresses on which the GC operation is to be performed, and information about the addresses is transmitted to the host processor 1310… (Byun, column 15, lines 47 – 52). …the memory device 1100 performs the GC operation by copying valid data stored in the memory blocks selected as victim blocks and storing the valid data in a memory block selected as a target block… (Byun, column 16, lines 29 – 33)) . Regarding claim 19 , Jones describes the non-transitory computer storage medium of claim 18 (see above) , wherein the method further comprises: performing, in response to the indicator meeting the first condition (…the storage controller 112 monitors and logs different types of log data… (page 6, paragraph [0074]). …the storage memory 114 stores log data in one or more data structures 200. The data structures 200 may be stored, for example, in a shared portion 202 of the storage memory 114, such as, for example, a device cache. In some embodiments, the shared portion 202 of the storage memory 114 (e.g., the device cache) is exposed to the host processor 108. The host processor 108 may access and store the shared data structures 200 in a host cache 204 of the host memory 110 (page 4, paragraph [0047]). …For example, the storage controller 112 may monitor usage of the memory blocks of the NVM 116 and update the filled table 500 and the free table 400 accordingly (page 6, paragraph [0074]). …For example, the storage controller 112 may monitor usage of the memory blocks of the NVM 116 and update the filled table 500 and the free table 400 accordingly (page 6, paragraph [0074])) . Jones discloses that the FDP protocol may allow the host processor 108 to tag writes to specific RUs so that the storage controller 120 may align data from multiple applications. Jones further states, that the host/device cooperation may reduce write amplification, and allow the host to orchestrate GC (page 4, paragraph [0050]) . Finally, Jones describes that the storage device may maintain information on available memory blocks, filled memory blocks, whether the filled blocks are valid or invalid, statistics about storage utilization, temperature inside the SSD, and/or other control and statistical information (also referred to as log information or log data) (page 2, paragraph [0031]) . However, it does not explicitly suggest operations to reduce garbage collection in the memory sub-system; and extracting, by the host system and from the log page, a target usage level of storage resources in the memory sub-system, wherein the memory sub-system is configured to refrain from garbage collection before the target usage level being reached. Byun discloses a memory system that performs read reclaim and garbage collection. Specifically, if the result of the comparison operation (S850) indicates that the read count value of the memory block MB1 on which the read operation has been performed is less than the first preset value (NO), the read count level determination block 1222C of the read reclaim control block 1222 determines a ratio of the read count value of the memory block MB1 with reference to the first preset value, and generates level information level_info, at step S870. For example, the read count level determination block 1222C may generate the level information as a first level when the read count value of the memory block MB1 on which the read operation has been completed is less than 70% of the first preset value, a second level when the read count value is equal to or greater than 70% and less than 80% of the first preset value, a third level when the read count value is equal to or greater than 80% and less than 90% of the first preset value, and a fourth level when the read count value is equal to or greater than 90% of the first preset value. The generated level information level_info is matched with logical addresses corresponding to the memory block MB1 by the FTL (1221 of FIG. 2), and the matched level information level_info is output to the host 1300 along with the command response signal CMD_response relative to the host command Host_CMD, at step S880. The garbage collection control block 1320 of the host 1300 increases, in response to the command response signal CMD_response, the read count value corresponding to each of the logical addresses LBAs on which the read operation has been completed, and additionally weights, in response to the level information level_info, the read count value of each of the logical addresses LBAs corresponding to the corresponding memory block MB1, at step S890. For example, when the level information level_info is the first level, the logical addresses LBAs corresponding to the related memory block MB1 is not weighted. When the level information level_info is the second level, the logical addresses LBAs corresponding to the related memory block MB1 is weighted. Furthermore, when the level information level_info is a third level, the logical addresses LBAs corresponding to the related memory block MB1 are selected as logical addresses on which the GC operation is to be performed, and information about the addresses is transmitted to the host processor 1310 [Garbage Collection Plan] . In addition, when the level information level_info is a fourth level, the logical addresses LBAs corresponding to the related memory block MB1 are selected as urgent logical addresses required for the GC operation to be immediately performed thereon, and information about the addresses and urgency is transmitted to the host processor 1310. The garbage collection control block 1320 compares the read count value of each of all logical addresses LBAs with the second preset value, at step S900. If a result of the comparison operation (S900) indicates that the read count value of a logical address is equal to or greater than the second preset value (YES), the corresponding logical address is determined as a logical address on which a GC operation is to be performed, and information about the address is transmitted to the host processor 1310. If the result of the comparison operation (S900) indicates that the read count value of a logical address is less than the second preset value (NO), the corresponding logical address is determined to be a logical address on which the GC operation is not to be performed. When the number of logical addresses selected as the subjects of the GC operation by the garbage collection control block 1320 is equal to or greater than a preset value, the host processor 1310 may generate a host command Host_CMD corresponding to a GC operation for the selected logical addresses, at step S910. Furthermore, if information about logical addresses selected as urgent logical addresses for the immediate GC operation by the garbage collection control block 1320 is received, the host processor 1310 may immediately generate a host command Host_CMD corresponding to a GC operation for the urgent logical addresses and output the host command Host_CMD along with the urgent logical addresses to the controller 1200 (column 15, line 9 – column 16, line 18) [The level_info represents both the current usage and its comparison to a target usage] [Before the third level is presented the LBAs are not selected for GC] . As described above, the “level_info” is a representation of the usage level and the target usage level. For example, the read count level determination block may generate the level information as a third level when the read count value [usage level] of the memory block MB1 on which the read operation has been completed is greater than 80% and less than 90% of the first preset value [target usage] . When the level information level_info is a third level, the logical addresses LBAs corresponding to the related memory block MB1 are selected as logical addresses on which the GC operation is to be performed, and information about the addresses is transmitted to the host processor. Finally, the “level_info” is described as being sent to the host. Since the “level_info” levels indicate certain GC responses, such as the third level causing the relevant LBAs to be identified for garbage collection, this may be interpreted as a garbage collection plan. Since Jones also discloses sharing management log data, including statistics about storage utilization, with a host device (Jones, page 2, paragraph [0031] and [0032]) . Therefore, it would have been obvious to a person of ordinary skill in the computer art before the effective filing date of the claimed invention to incorporate the Byun teachings in the Jones system. Skilled artisan would have been motivated to incorporate the method of providing current usage and target usage statistics as taught by Byun in the shared management log data of the Jones system for effectively managing a read count value of each of the memory blocks and generating level information corresponding to the read count value that allows a host to request garbage collection based on said information. In addition, both of the references teach features that are directed to analogous art and they are directed to the same field of endeavor, such as managing garbage collection. This close relation between both of the references highly suggests an expectation of success . 07-21-aia AIA Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Jones in view of Byun, further in view of Horspool . Regarding claim 7 , Jones in view of Byun describe the method of claim 6 (see above) . Jones discloses that the FDP protocol may allow the host processor 108 to tag writes to specific RUs so that the storage controller 120 may align data from multiple applications. Jones further states, that the host/device cooperation may reduce write amplification, and allow the host to orchestrate GC (page 4, paragraph [0050]) . Jones also states that the host may thus have access to drive-level statistics and other log data of the storage device in real-time, allowing for improved decision-making by the host as the host engages in the one or more drive activities, including drive activities that the host may have knowledge of while the storage device may be unaware of those drive activities (e.g., upcoming deallocation decisions of drive blocks by the host) (page 2, paragraph [0033]) . However, it does not explicitly suggest wherein the communicating includes: requesting a storage space tenant having data at the logical address to deallocate the logical address, to delete data from the logical address, or to overwrite data at the logical address. Horspool describes a solid-state drive system with optimized garbage collection. Horspool also states that, in certain implementations, the plurality of data streams originates from (i) multiple streams from different applications running on the host, (ii) multiple streams from multiple instances of a single application, or (iii) multiple streams within a single application (page 2, paragraph [0011]) . Modern data center oriented SSD protocols implement techniques that extend the life of the SSD. Such protocols may have knowledge of the superblock size and manage the data written to superblocks according to the size. The protocol can open many superblocks to allow multiple separate host write streams to write data to the SSD with each superblock containing data from a single stream. The protocol will write data to a superblock, allow reads to the superblock and then delete all the data in the superblock with a single command. This reduces the amount of garbage collection required before the NAND blocks of the deleted data can be erased. An important element of the protocol is that superblocks contain data from a single stream, that is, superblocks do not contain a mix of data from different streams. This reduction of garbage collection based on single stream data superblocks and deallocation before writing will mean that the host can write much more data to the SSD before the drive wears out since the write amplification will be reduced compared to a standard SSD (page 2, paragraph [0019]) . The key rules of the Flexible Data Placement Protocol are as follows. Firstly, the host must delete all data (using an NVMe ‘deallocate’ command, for example) in the superblock before over-writing the superblock (page 4, paragraph[ 0029]) . The new garbage collection function of the present disclosure, garbage collection is only performed on superblocks from bad streams that do not obey the key rules. This will reduce the overall write amplification by identifying bad streams and garbage collecting only the bad streams (page 5, paragraph [0032]) . However, a person of ordinary skill in the art would understand that other rules or criteria may be used to determine a “bad stream” without departing from the scope of the present disclosure. According to embodiments of the present disclosure, once the bad data stream is identified, garbage collection is only performed on the superblocks associated with memory blocks containing invalid data from the bad data stream. No garbage collection is performed on superblocks associated with memory blocks containing valid data from good data streams (page 5, paragraph [0032]) . Therefore, it would have been obvious to a person of ordinary skill in the computer art before the effective filing date of the claimed invention to incorporate the Horspool teachings in the Jones in view of Byun system. Skilled artisan would have been motivated to incorporate the method of implementing targeted garbage collection and preferring deallocation of superblocks as taught by Horspool in the Jones in view of Byun system for effectively reducing write amplification and improving SSD performance. In addition, both of the references teach features that are directed to analogous art and they are directed to the same field of endeavor, such as reducing write amplification. This close relation between both of the references highly suggests an expectation of success . 07-21-aia AIA Claim s 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Jones in view of Byun, further in view of Hashimoto et al. US Patent Application Publication No. 2016/0299715 (herein after referred to as Hashimoto) . Regarding claim 8 , Jones in view of Byun describe the method of claim 6 (see above) . Jones discloses that the FDP protocol may allow the host processor 108 to tag writes to specific RUs so that the storage controller 120 may align data from multiple applications. Jones further states, that the host/device cooperation may reduce write amplification, and allow the host to orchestrate GC (page 4, paragraph [0050]) . However, it does not explicitly suggest further comprising: determining, by the host system, a remaining life of first data at the logical address and in response to a determination that the remaining life of the first data is to extend beyond a time of the target usage level being reached: reading, by the host system, the first data from the logical address in the memory sub-system; and writing, by the host system, the first data back to the logical address in the memory sub-system. Hashimoto describes a storage system capable of invaliding data stored in a storage device. Specifically, the controller is configured to maintain a mapping of logical addresses to locations within the physical blocks, receive from a host a write command, and in response thereto, store first information indicating expiration time of data associated with the write command. When the expiration time passes, the controller is configured to determine the data as no longer valid (page 2, paragraph [0033]) . In the present embodiment, at Step S1720, valid data that are transferred from the active blocks 45 to the input block 44 include only unexpired data. That is, expired valid data, which have the expiration time ET smaller than a current time CT at the time of garbage collection, are excluded from data transferred to the input block 44. In other words, the controller 14 determines the data as no longer valid, when the expiration time passes. The expired valid data are erased from the storage device 2, similarly to invalid data (page 7, paragraph [0088]) . Therefore, it would have been obvious to a person of ordinary skill in the computer art before the effective filing date of the claimed invention to incorporate the Hashimoto teachings in the Jones in view of Byun system. Skilled artisan would have been motivated to incorporate the method of implementing garbage collecting only unexpired data as taught by Hashimoto in the Jones in view of Byun system for effectively reducing write amplification during garbage collection. In addition, both of the references teach features that are directed to analogous art and they are directed to the same field of endeavor, such as reducing write amplification. This close relation between both of the references highly suggests an expectation of success. Regarding claim 9 , Jones in view of Byun and Hashimoto describe the method of claim 8 (see above) , wherein the writing of the first data is in accordance with a protocol of flexible direct placement (…the shared data structures 200 adhere to the NVMe protocol, such as, for example a Flexible Data Placement Mode (FDP) portion of the NVMe protocol… In this regard, the FDP protocol allows data to be written to an application-specific area of the NVM 116 referred to as a reclaim unit (RU)… (Jones, page 4, paragraph [0050]) [Flexible direct placement appears to be another name for flexible data placement]) . 07-21-aia AIA Claim 10 is re jected under 35 U.S.C. 103 as being unpatentable over Jo nes in view of Byun and Hashimoto, further in view of Fischer et al. US Patent Application Publication No. 2018/0307598 (herein after referred to as Fischer). Re garding claim 10 , Jones in view of Byun and Hashimoto describe the method of claim 9 (see above) . They do not specifically disclose further comprising: determining, based on the remaining life of the first data, a reclaim unit handle; and specifying the reclaim unit handle in a data placement directive in a write command to write the first data back to the logical address in the memory sub-system. Fischer describes methods for multi-stream garbage collection on an SSD. Specifically, if/when garbage collection occurs, the stored stream characteristics may be compared against the stream characteristics of all active streams. The SSD may then choose the most appropriate (best fit) current stream ID [reclaim unit handle] to which to map the data being garbage collected. This requires either that some stream characteristics of each stream are communicated from host to SSD, or that an auto-streaming functionality is running on the SSD to infer the characteristics from the received data streams (page 3, paragraph [0047]) . Some stream characteristics that could be stored in the first page of every block include a Stream ID and the Expected lifetime of data (page 3, paragraphs [0048] – [0050]) . When a data block is garbage collected for the first time after being written by the user, the lifetime (so far) of the data may be computed as the time difference between the recorded block allocation timestamp and the current time [the remaining life] . If this lifetime so far exceeds the expected lifetime of the (current) stream, then the data could potentially be reclassified into a difference stream with longer expected lifetime (page 3, paragraph [0059]) . When garbage collecting data that is discovered (by comparing Stream timestamp) to have been stored for a now expired stream ID, such data could be stored into one (or one of a few) generic streams based on stream characteristics. Alternatively, such data could be mapped into a best-fit stream based on comparing stream characteristics stored in the first page of the erase block to the stream characteristics of the current streams (page 3, paragraph [0060]) [looking for “best fit” reclaim unit handle based on remaining life] . Restreamer logic 440 may use stream information—be it stream ID 315 of Fig. 6 or stream characteristics 605 of Fig. 6—to select an appropriate block to program valid page 530 of Fig. 5. If the stream from which valid page 530 of Fig. 5 has been closed, then restreamer logic 440 may use stream characteristics 605 of Fig. 6 to identify an open stream that has similar properties to the stream from which valid page 530 of Fig. 5 was written. In either case, valid page 530 of Fig. 5 is hopefully written to a block that contains other data with similar characteristics (page 6, paragraph [0099]) . Therefore, it would have been obvious to a person of ordinary skill in the computer art before the effective filing date of the claimed invention to incorporate the Fischer teachings in the Jones in view of Byun and Hashimoto system. Skilled artisan would have been motivated to incorporate the method of identifying a compatible stream matching stream characteristics during garbage collection as taught by Fischer in the Jones in view of Byun and Hashimoto system for effectively improving garbage collection in storage devices using multi-streaming or auto-streaming (Fischer, page 1, paragraph [0011])) . In addition, both of the references teach features that are directed to analogous art and they are directed to the same field of endeavor, such as reducing write amplification. This close relation between both of the references highly suggests an expectation of success . 07-21-aia AIA Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Jones in view of Byun, further in view of Cho et al. US Patent Application Publication No. 2020/0073798 (herein after referred to as Cho) . Regarding claim 14 , Jones in view of Byun describe the memory sub-system of claim 13 (see above) , wherein the memory cells are grouped as reclaim units (…the FDP protocol allows data to be written to an application-specific area of the NVM 116 referred to as a reclaim unit (RU) (Jones, page 4, paragraph [0050])) . While Jones discloses that the storage controller 112 may monitor usage of the memory blocks (Jones, page 6, paragraph [0074]) , it does not specify that the first usage level is indicative of a ratio between: a count of free reclaim units that have been erased and are ready for programming to store data; and a count of total reclaim units in the memory sub-system. Cho describes a memory controller including a block ratio calculator. Specifically, the block ratio calculator 2124a may calculate the ratio of free blocks among the memory blocks included in the memory device 2200. In other words, the block ratio calculator 2124a may calculate the ratio of the number of free blocks to which no data is written among the total number of memory blocks. Here, the total number of memory blocks may include the number of OP blocks allocated for over-provisioning (OP). An OP block may be an area allocated for performance management of the memory system (page 3, paragraph [0049]) . Therefore, it would have been obvious to a person of ordinary skill in the computer art before the effective filing date of the claimed invention to incorporate the Cho teachings in the Jones in view of Byun system. Skilled artisan would have been motivated to incorporate the method of calculating usage information in the form of a free block ratio as taught by Cho in the Jones in view of Byun system as an effective alternative to representing usage information. In addition, both of the references teach features that are directed to analogous art and they are directed to the same field of endeavor, such as garbage collection decisions. This close relation between both of the references highly suggests an expectation of success . Allowable Subject Matter Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims as well as addressing the identified grammatical objection above . 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: Claim 11 specifies that recording a history of usage levels of storage resources in the memory sub-system as identified from the log page retrieved at a plurality time instances; and determining the first condition from the history. Jones discloses that the hint engine 208 is configured to periodically monitor the log data stored in the shared structures 200 and provide a hint or recommendation for a drive activity to be performed by the storage controller (page 5, paragraph [0056]) . However this is not believed to teach or suggest the limitations claimed. Hashimoto discloses that the controller may periodically monitor the expiration time and determine whether or not the expiration time has passed. When the expiration time passes the controller may further invalidate the expired data by updating a look-up table (page 7, paragraph [0089]) . However this is not believed to teach or suggest the limitations claimed. Cho describes that a threshold value manager may receive, from the policy storage, information about which garbage collection policies were selected for previously performed garbage collection operations, and manage the information as history information. The threshold value manager may analyze the history information and determine the selection ratios of the garbage collection policies selected during the previously-performed garbage collection operations (page 4, paragraph [0060]) . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure : Helmick et al. US Patent Application Publication No. 2024/0012580 describes a method for reclaim unit formation and selection in a storage device. It discloses that a host may observe that data written by a user may be, or is likely to be compacted (e.g., garbage collected) at a file system level, database level and/or the like, and send this information to a storage device, for example, along with a write request (page 3, paragraph [0041]) . Additionally, the host may divide data into namespaces, for example, to provide isolation between sources of data such as applications, processes, logical block addresses (LBA) range, and/or the like. Thus, the host may deallocate some or all data belonging to a namespace at the same time, for example, when an application terminates (page 5, paragraph [0057]) . Geng et al. US Patent Application Publication No. 2024/0037027 describes that a processor may preferentially place the valid data of a evicting block in a block with a similar expected expiration time (i.e., a difference between the expected expiration time of the valid data of the evicting block and the expected expiration time of the selected target block being less than or equal to a preset value) (page 7, paragraph [0090]) . Any inquiry concerning this communication or earlier communications from the examiner should be directed to RALPH A VERDERAMO III whose telephone number is (571)270-1174. The examiner can normally be reached Monday through Friday 8:30 AM - 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached at (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RALPH A VERDERAMO III/Examiner, Art Unit 2139 /REGINALD G BRAGDON/Supervisory Patent Examiner, Art Unit 2139 rv June 12, 2026 Application/Control Number: 19/174,587 Page 2 Art Unit: 2139 Application/Control Number: 19/174,587 Page 3 Art Unit: 2139 Application/Control Number: 19/174,587 Page 4 Art Unit: 2139 Application/Control Number: 19/174,587 Page 5 Art Unit: 2139 Application/Control Number: 19/174,587 Page 6 Art Unit: 2139 Application/Control Number: 19/174,587 Page 7 Art Unit: 2139 Application/Control Number: 19/174,587 Page 8 Art Unit: 2139 Application/Control Number: 19/174,587 Page 9 Art Unit: 2139 Application/Control Number: 19/174,587 Page 10 Art Unit: 2139 Application/Control Number: 19/174,587 Page 11 Art Unit: 2139 Application/Control Number: 19/174,587 Page 12 Art Unit: 2139 Application/Control Number: 19/174,587 Page 13 Art Unit: 2139 Application/Control Number: 19/174,587 Page 14 Art Unit: 2139 Application/Control Number: 19/174,587 Page 15 Art Unit: 2139 Application/Control Number: 19/174,587 Page 16 Art Unit: 2139 Application/Control Number: 19/174,587 Page 17 Art Unit: 2139 Application/Control Number: 19/174,587 Page 18 Art Unit: 2139 Application/Control Number: 19/174,587 Page 19 Art Unit: 2139 Application/Control Number: 19/174,587 Page 20 Art Unit: 2139 Application/Control Number: 19/174,587 Page 21 Art Unit: 2139 Application/Control Number: 19/174,587 Page 22 Art Unit: 2139 Application/Control Number: 19/174,587 Page 23 Art Unit: 2139 Application/Control Number: 19/174,587 Page 24 Art Unit: 2139 Application/Control Number: 19/174,587 Page 25 Art Unit: 2139 Application/Control Number: 19/174,587 Page 26 Art Unit: 2139 Application/Control Number: 19/174,587 Page 27 Art Unit: 2139 Application/Control Number: 19/174,587 Page 28 Art Unit: 2139 Application/Control Number: 19/174,587 Page 29 Art Unit: 2139 Application/Control Number: 19/174,587 Page 30 Art Unit: 2139 Application/Control Number: 19/174,587 Page 31 Art Unit: 2139 Application/Control Number: 19/174,587 Page 32 Art Unit: 2139 Application/Control Number: 19/174,587 Page 33 Art Unit: 2139 Application/Control Number: 19/174,587 Page 34 Art Unit: 2139 Application/Control Number: 19/174,587 Page 35 Art Unit: 2139 Application/Control Number: 19/174,587 Page 36 Art Unit: 2139 Application/Control Number: 19/174,587 Page 37 Art Unit: 2139 Application/Control Number: 19/174,587 Page 38 Art Unit: 2139 Application/Control Number: 19/174,587 Page 39 Art Unit: 2139 Application/Control Number: 19/174,587 Page 40 Art Unit: 2139 Application/Control Number: 19/174,587 Page 41 Art Unit: 2139
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Prosecution Timeline

Apr 09, 2025
Application Filed
Dec 12, 2025
Response after Non-Final Action
Jun 18, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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