Prosecution Insights
Last updated: July 17, 2026
Application No. 19/174,927

QUBIT CAPACITOR AND QUANTUM CHIP

Non-Final OA §112
Filed
Apr 10, 2025
Priority
Oct 18, 2023 — CN 202311347863.1 +1 more
Examiner
HERNANDEZ, WILLIAM
Art Unit
Tech Center
Assignee
Yangtze Delta Industrial Innovation Center Of Quantum Science And Technology
OA Round
1 (Non-Final)
94%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 94% — above average
94%
Career Allowance Rate
892 granted / 951 resolved
+33.8% vs TC avg
Minimal +4% lift
Without
With
+4.2%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 7m
Avg Prosecution
10 currently pending
Career history
960
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
15.8%
-24.2% vs TC avg
§102
29.6%
-10.4% vs TC avg
§112
42.3%
+2.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 951 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 7 is objected to because of the following informalities: In claim 7, line 4, “to control excited state of the qubit capacitor” should read --to control an excited state of the qubit capacitor--. In claim 7, line 6, “to control frequency of the qubit capacitor” should read --to control a frequency of the qubit capacitor--. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 10 recites the limitation "each of the qubit capacitors" in 1. There is insufficient antecedent basis for this limitation in the claim. Perhaps claim 9 should be amended as follows: 9. A quantum chip comprising at least one Allowable Subject Matter Claims 1-9 are presently allowed. Claim 10 would be allowable if rewritten or amended to overcome the rejection under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Caudillo’s (USPAP 2019/0044046) Figs. 3-6 show quantum circuit assemblies with vertically-stacked parallel-plate capacitors. Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM HERNANDEZ whose telephone number is (571)272-8979. The examiner can normally be reached Mon to Fri; 10am to 6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached at (571) 270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM HERNANDEZ/Primary Examiner, Art Unit 2836
Read full office action

Prosecution Timeline

Apr 10, 2025
Application Filed
Jun 24, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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1y 10m to grant Granted Jul 14, 2026
Patent 12676602
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1y 10m to grant Granted Jul 07, 2026
Patent 12675129
CLOCK CONTROL DEVICE AND CLOCK CONTROL METHOD FOR SERIAL PERIPHERAL INTERFACE
1y 7m to grant Granted Jul 07, 2026
Patent 12671414
FAST DISCHARGE CIRCUIT
3y 3m to grant Granted Jun 30, 2026
Patent 12663447
ZERO-CROSSING DETECTION CIRCUIT
1y 9m to grant Granted Jun 23, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
94%
Grant Probability
98%
With Interview (+4.2%)
1y 7m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 951 resolved cases by this examiner. Grant probability derived from career allowance rate.

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