Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in reply to communication field on 04/20/2025. Claimed priority is granted from continuation application 18/397,072, filed on 12/27/2023, now patent No 12309076.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 04/11/2025 was filed simultaneously with the original application. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. US 12309076 B1. Although the claims at issue are not identical, they are not patentably distinct from each other because both set of claims substantially disclose the same invention direct3d to scheduling traffic across parallel links by representing link weights as strings, intervening the repr3esented information and determining queueing or scheduling based on the resulting interleaving.
In particular, independent claim 1 of the instant application broadly recites representing weights associated with parallel links as strings, interleaving portions of the strings, and determining a queue from the interleaved portions. Independent claim 1 of the 12309076 patent weights to bit strings, transforming the bit strings into sparse bit strings, generating a representative vector of sequentially interleaved bits, and scheduling assignments according to the generated vector.
The additional limitations of the patented claims merely specify one known implementation of the broader concepts recited in the instant application and therefore do not render the claimed inventions patentably distinct. Likewise, the omission of the sparse-bit-string and representative-vector limitations from the instant application would have been an obvious variation to one of ordinary skilled on the art because the application retains the same fundamental scheduling architecture while generalizing the representation and interleaving operations.
Accordingly, the pending claims merely broaden or otherwise constitute and obvious variation of the patented and are unpatentable under the doctrine of obviousness-type double patenting.
Claims Mapping Table.
Limitations
US Patent US 12309076 A1
Annotation
Processor Comprising one or more circuits
Processor comprising one or more circuits
Identical preamble
Represent weights associated with a plurality with a plurality of parallel links as a plurality of strings
Map individual weights of a plurality of parallel links to a plurality of bit strings
The patented claim expressed maps weights to bit strings. The application’s “strings” encompasses bit strings and is broader.
interleave portions of the plurality of strings
Transform the bit strings into sparse bit strings and generate a vector representing bits interleaving sequentially from the sparse bit strings
The patent recites a more specific implementation of interleaving. The application omits the intermediate sparse-bit-string/vector operations.
Determine, based at least in part on the interleaved portions, a wueue for one or more of the parallel links
Schedule, based on the vector, assignments for the plurality of parallel links
Determining a queue and scheduling assignments are closely related scheduling operations. The patent recites narrower implementation using the representative vector.
Claim 2
Claim 2
Both determine weights based on traffic/assignments. Patent wording is narrower.
Claim 3
Claim 3
Same underlying weight encoding concept.
Claims 4-5
Claims 4-5
Essentially identical topology limitations.
Claims 6-7
Claims 6-7
Same mapping function/LFSR concept.
Claim 8
Claim 8
Capacity-based port selection/queue adjustment versus sending assignments; closely related scheduling refinement.
Claim 9
Claim 9
Both recite weighted round-robin scheduling.
Claim 10
Claim 10
Queue/scheduling of packets from switches.
Claims 11-20
Claims 11-20
Method/system counterparts tracking the same subject matter.
Why OTDP Is Appropriate
The issued patent narrows the scheduling algorithm by expressly reciting:
Mapping weights to bit strings;
Transforming the bit strings into sparse bit strings;
Generating a representative vector of sequentially interleaved bits; and
Scheduling based on the vector.
The pending application instead recites the broader concepts of:
Representing weights as strings;
Interleaving portions of the strings; and
Determining a queue based on the interleaved portions
The application therefore omits implementation details while covering substantially the same inventive concept.
CONCLUSION
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jude Jean-Gilles whose telephone number is 571-272-3914. The examiner can normally be reached on Mon-Fri, from 9:00AM-5:00PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tonia Dollinger can be reached on 571-272-4170. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUDE JEAN GILLES/Primary Examiner, Art Unit 2459
August 5, 2026
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